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-rw-r--r--src/soc/amd/stoneyridge/include/soc/southbridge.h2
-rw-r--r--src/soc/amd/stoneyridge/sb_util.c10
-rw-r--r--src/soc/amd/stoneyridge/southbridge.c10
3 files changed, 16 insertions, 6 deletions
diff --git a/src/soc/amd/stoneyridge/include/soc/southbridge.h b/src/soc/amd/stoneyridge/include/soc/southbridge.h
index aed3288ae8..098d24edbb 100644
--- a/src/soc/amd/stoneyridge/include/soc/southbridge.h
+++ b/src/soc/amd/stoneyridge/include/soc/southbridge.h
@@ -533,6 +533,8 @@ uint8_t smbus_read8(uint8_t offset);
uint16_t smbus_read16(uint8_t offset);
void smbus_write8(uint8_t offset, uint8_t value);
void smbus_write16(uint8_t offset, uint16_t value);
+uint8_t aoac_read8(uint8_t reg);
+void aoac_write8(uint8_t reg, uint8_t value);
void bootblock_fch_early_init(void);
void bootblock_fch_init(void);
/**
diff --git a/src/soc/amd/stoneyridge/sb_util.c b/src/soc/amd/stoneyridge/sb_util.c
index 4bffdbc5cf..530e9cd946 100644
--- a/src/soc/amd/stoneyridge/sb_util.c
+++ b/src/soc/amd/stoneyridge/sb_util.c
@@ -271,6 +271,16 @@ void xhci_pm_write32(uint8_t reg, uint32_t value)
/* aoac read/write - access registers at 0xfed81e00 - not currently used */
+u8 aoac_read8(u8 reg)
+{
+ return read8((void *)(ACPIMMIO_AOAC_BASE + reg));
+}
+
+void aoac_write8(u8 reg, u8 value)
+{
+ write8((void *)(ACPIMMIO_AOAC_BASE + reg), value);
+}
+
uint16_t pm_acpi_pm_cnt_blk(void)
{
return pm_read16(PM1_CNT_BLK);
diff --git a/src/soc/amd/stoneyridge/southbridge.c b/src/soc/amd/stoneyridge/southbridge.c
index 66894a24b4..7dc27c86da 100644
--- a/src/soc/amd/stoneyridge/southbridge.c
+++ b/src/soc/amd/stoneyridge/southbridge.c
@@ -279,20 +279,18 @@ int sb_set_wideio_range(uint16_t start, uint16_t size)
static void power_on_aoac_device(int aoac_device_control_register)
{
uint8_t byte;
- uint8_t *register_pointer = (uint8_t *)(uintptr_t)ACPIMMIO_AOAC_BASE
- + aoac_device_control_register;
/* Power on the UART and AMBA devices */
- byte = read8(register_pointer);
+ byte = aoac_read8(aoac_device_control_register);
byte |= FCH_AOAC_PWR_ON_DEV;
- write8(register_pointer, byte);
+ aoac_write8(aoac_device_control_register, byte);
}
static bool is_aoac_device_enabled(int aoac_device_status_register)
{
uint8_t byte;
- byte = read8((uint8_t *)(uintptr_t)ACPIMMIO_AOAC_BASE
- + aoac_device_status_register);
+
+ byte = aoac_read8(aoac_device_status_register);
byte &= (FCH_AOAC_PWR_RST_STATE | FCH_AOAC_RST_CLK_OK_STATE);
if (byte == (FCH_AOAC_PWR_RST_STATE | FCH_AOAC_RST_CLK_OK_STATE))
return true;