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-rw-r--r--src/cpu/intel/Kconfig1
-rw-r--r--src/cpu/intel/microcode/Kconfig7
-rw-r--r--src/cpu/intel/microcode/Makefile.inc7
3 files changed, 11 insertions, 4 deletions
diff --git a/src/cpu/intel/Kconfig b/src/cpu/intel/Kconfig
index 3fad7969f5..f5d0ab9268 100644
--- a/src/cpu/intel/Kconfig
+++ b/src/cpu/intel/Kconfig
@@ -35,3 +35,4 @@ source src/cpu/intel/socket_rPGA989/Kconfig
source src/cpu/intel/fit/Kconfig
source src/cpu/intel/turbo/Kconfig
source src/cpu/intel/common/Kconfig
+source src/cpu/intel/microcode/Kconfig
diff --git a/src/cpu/intel/microcode/Kconfig b/src/cpu/intel/microcode/Kconfig
new file mode 100644
index 0000000000..b78389215d
--- /dev/null
+++ b/src/cpu/intel/microcode/Kconfig
@@ -0,0 +1,7 @@
+config MICROCODE_UPDATE_PRE_RAM
+ bool
+ depends on SUPPORT_CPU_UCODE_IN_CBFS
+ default y if C_ENVIRONMENT_BOOTBLOCK
+ help
+ Select this option if you want to update the microcode
+ during the cache as ram setup.
diff --git a/src/cpu/intel/microcode/Makefile.inc b/src/cpu/intel/microcode/Makefile.inc
index f589430771..2df1d5eb6f 100644
--- a/src/cpu/intel/microcode/Makefile.inc
+++ b/src/cpu/intel/microcode/Makefile.inc
@@ -1,6 +1,5 @@
-################################################################################
-## One small file with the awesome super-power of updating the CPU microcode
-## directly from CBFS. You have been WARNED!!!
-################################################################################
+bootblock-$(CONFIG_MICROCODE_UPDATE_PRE_RAM) += microcode_asm.S
+romstage-$(CONFIG_MICROCODE_UPDATE_PRE_RAM) += microcode_asm.S
+
ramstage-$(CONFIG_SUPPORT_CPU_UCODE_IN_CBFS) += microcode.c
romstage-$(CONFIG_SUPPORT_CPU_UCODE_IN_CBFS) += microcode.c