summaryrefslogtreecommitdiff
path: root/src
diff options
context:
space:
mode:
Diffstat (limited to 'src')
-rw-r--r--src/southbridge/amd/cimx_wrapper/sb800/Amd.h2
-rw-r--r--src/vendorcode/amd/cimx/sb800/AMDSBLIB.h11
-rw-r--r--src/vendorcode/amd/cimx/sb800/SBCMN.c2
3 files changed, 13 insertions, 2 deletions
diff --git a/src/southbridge/amd/cimx_wrapper/sb800/Amd.h b/src/southbridge/amd/cimx_wrapper/sb800/Amd.h
index 5eaad0adaa..6f2d5f17a6 100644
--- a/src/southbridge/amd/cimx_wrapper/sb800/Amd.h
+++ b/src/southbridge/amd/cimx_wrapper/sb800/Amd.h
@@ -161,7 +161,7 @@ typedef struct _SB_CPUID_DATA {
IN OUT unsigned int EBX_Reg; ///< CPUID instruction result in EBX
IN OUT unsigned int ECX_Reg; ///< CPUID instruction result in ECX
IN OUT unsigned int EDX_Reg; ///< CPUID instruction result in EDX
-} SB_CPUID_DATA;
+} CPUID_DATA;
#define WARM_RESET 1
#define COLD_RESET 2 // Cold reset
diff --git a/src/vendorcode/amd/cimx/sb800/AMDSBLIB.h b/src/vendorcode/amd/cimx/sb800/AMDSBLIB.h
index e5ecd3b582..83722d8f5d 100644
--- a/src/vendorcode/amd/cimx/sb800/AMDSBLIB.h
+++ b/src/vendorcode/amd/cimx/sb800/AMDSBLIB.h
@@ -104,3 +104,14 @@ AGESA_STATUS AmdSbDispatcher (IN void *pConfig);
*
*/
void AmdSbCopyMem (IN void* pDest, IN void* pSource, IN unsigned int Length);
+
+
+/* SB800 CIMx and AGESA V5 can share lib functions */
+unsigned char ReadIo8(IN unsigned short Address);
+unsigned short ReadIo16(IN unsigned short Address);
+unsigned int ReadIo32(IN unsigned short Address);
+void WriteIo8(IN unsigned short Address, IN unsigned char Data);
+void WriteIo16(IN unsigned short Address, IN unsigned short Data);
+void WriteIo32(IN unsigned short Address, IN unsigned int Data);
+void CpuidRead(IN unsigned int CpuidFcnAddress, OUT CPUID_DATA *Value);
+unsigned char ReadNumberOfCpuCores(void);
diff --git a/src/vendorcode/amd/cimx/sb800/SBCMN.c b/src/vendorcode/amd/cimx/sb800/SBCMN.c
index a27f0feaaa..ea1c029d1f 100644
--- a/src/vendorcode/amd/cimx/sb800/SBCMN.c
+++ b/src/vendorcode/amd/cimx/sb800/SBCMN.c
@@ -329,7 +329,7 @@ commonInitEarlyBoot (
{
UINT32 abValue;
UINT16 dwTempVar;
- SB_CPUID_DATA CpuId;
+ CPUID_DATA CpuId;
UINT8 cimNativepciesupport;
UINT8 cimIrConfig;
UINT8 Data;