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-rw-r--r--src/arch/x86/include/arch/io.h6
-rw-r--r--src/northbridge/amd/amdfam10/amdfam10.h6
-rw-r--r--src/northbridge/amd/amdfam10/setup_resource_map.c8
3 files changed, 10 insertions, 10 deletions
diff --git a/src/arch/x86/include/arch/io.h b/src/arch/x86/include/arch/io.h
index 9e2a877906..e4e3067a75 100644
--- a/src/arch/x86/include/arch/io.h
+++ b/src/arch/x86/include/arch/io.h
@@ -235,12 +235,6 @@ static inline int __ffs(u32 value)
#ifdef __SIMPLE_DEVICE__
-#define PCI_ADDR(SEGBUS, DEV, FN, WHERE) ( \
- (((SEGBUS) & 0xFFF) << 20) | \
- (((DEV) & 0x1F) << 15) | \
- (((FN) & 0x07) << 12) | \
- ((WHERE) & 0xFFF))
-
#define PCI_DEV(SEGBUS, DEV, FN) ( \
(((SEGBUS) & 0xFFF) << 20) | \
(((DEV) & 0x1F) << 15) | \
diff --git a/src/northbridge/amd/amdfam10/amdfam10.h b/src/northbridge/amd/amdfam10/amdfam10.h
index e1c88c9140..c912f18bad 100644
--- a/src/northbridge/amd/amdfam10/amdfam10.h
+++ b/src/northbridge/amd/amdfam10/amdfam10.h
@@ -29,6 +29,12 @@ struct MCTStatStruc;
/* Definitions for setup_resourcemap() variants. */
+#define PCI_ADDR(SEGBUS, DEV, FN, WHERE) ( \
+ (((SEGBUS) & 0xFFF) << 20) | \
+ (((DEV) & 0x1F) << 15) | \
+ (((FN) & 0x07) << 12) | \
+ ((WHERE) & 0xFFF))
+
#define ADDRMAP_REG(r) PCI_ADDR(CONFIG_CBB, CONFIG_CDB, 1, r)
#define RES_PCI_IO 0x10
diff --git a/src/northbridge/amd/amdfam10/setup_resource_map.c b/src/northbridge/amd/amdfam10/setup_resource_map.c
index 23e2ba378c..5984178522 100644
--- a/src/northbridge/amd/amdfam10/setup_resource_map.c
+++ b/src/northbridge/amd/amdfam10/setup_resource_map.c
@@ -30,8 +30,8 @@ void setup_resource_map(const u32 *register_values, u32 max)
u32 where;
u32 reg;
- dev = register_values[i] & ~0xff;
- where = register_values[i] & 0xff;
+ dev = register_values[i] & ~0xfff;
+ where = register_values[i] & 0xfff;
reg = pci_read_config32(dev, where);
reg &= register_values[i+1];
reg |= register_values[i+2];
@@ -144,8 +144,8 @@ void setup_resource_map_x(const u32 *register_values, u32 max)
pci_devfn_t dev;
u32 where;
u32 reg;
- dev = register_values[i+1] & ~0xff;
- where = register_values[i+1] & 0xff;
+ dev = register_values[i+1] & ~0xfff;
+ where = register_values[i+1] & 0xfff;
reg = pci_read_config32(dev, where);
reg &= register_values[i+2];
reg |= register_values[i+3];