diff options
Diffstat (limited to 'src')
| -rw-r--r-- | src/commonlib/include/commonlib/clamp.h | 22 | ||||
| -rw-r--r-- | src/northbridge/intel/sandybridge/raminit_ivy.c | 30 |
2 files changed, 38 insertions, 14 deletions
diff --git a/src/commonlib/include/commonlib/clamp.h b/src/commonlib/include/commonlib/clamp.h new file mode 100644 index 0000000000..e01a107ed4 --- /dev/null +++ b/src/commonlib/include/commonlib/clamp.h @@ -0,0 +1,22 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ + +#ifndef COMMONLIB_CLAMP_H +#define COMMONLIB_CLAMP_H + +#include <stdint.h> + +/* + * Clamp a value, so that it is between a lower and an upper bound. + */ +static inline u32 clamp_u32(const u32 min, const u32 val, const u32 max) +{ + if (val > max) + return max; + + if (val < min) + return min; + + return val; +} + +#endif /* COMMONLIB_CLAMP_H */ diff --git a/src/northbridge/intel/sandybridge/raminit_ivy.c b/src/northbridge/intel/sandybridge/raminit_ivy.c index 6484139a94..6ff82dd011 100644 --- a/src/northbridge/intel/sandybridge/raminit_ivy.c +++ b/src/northbridge/intel/sandybridge/raminit_ivy.c @@ -1,6 +1,7 @@ /* SPDX-License-Identifier: GPL-2.0-only */ /* This file is part of the coreboot project. */ +#include <commonlib/clamp.h> #include <console/console.h> #include <console/usb.h> #include <delay.h> @@ -9,24 +10,25 @@ #include "raminit_common.h" #include "raminit_tables.h" +#define IVB_MIN_DCLK_133_MULT 3 +#define IVB_MAX_DCLK_133_MULT 10 +#define IVB_MIN_DCLK_100_MULT 7 +#define IVB_MAX_DCLK_100_MULT 12 + /* Frequency multiplier */ -static u32 get_FRQ(u32 tCK, u8 base_freq) +static u32 get_FRQ(const ramctr_timing *ctrl) { - const u32 FRQ = 256000 / (tCK * base_freq); + const u32 FRQ = 256000 / (ctrl->tCK * ctrl->base_freq); - if (base_freq == 100) { - if (FRQ > 12) - return 12; - if (FRQ < 7) - return 7; - } else { - if (FRQ > 10) - return 10; - if (FRQ < 3) - return 3; + if (IS_IVY_CPU(ctrl->cpu)) { + if (ctrl->base_freq == 100) + return clamp_u32(IVB_MIN_DCLK_100_MULT, FRQ, IVB_MAX_DCLK_100_MULT); + + if (ctrl->base_freq == 133) + return clamp_u32(IVB_MIN_DCLK_133_MULT, FRQ, IVB_MAX_DCLK_133_MULT); } - return FRQ; + die("Unsupported CPU or base frequency."); } /* Get REFI based on frequency index, tREFI = 7.8usec */ @@ -204,7 +206,7 @@ static void find_cas_tck(ramctr_timing *ctrl) } /* Frequency multiplier */ - ctrl->FRQ = get_FRQ(ctrl->tCK, ctrl->base_freq); + ctrl->FRQ = get_FRQ(ctrl); printk(BIOS_DEBUG, "Selected DRAM frequency: %u MHz\n", NS2MHZ_DIV256 / ctrl->tCK); printk(BIOS_DEBUG, "Selected CAS latency : %uT\n", val); |