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-rw-r--r--src/arch/x86/lib/romstage_console.c4
-rw-r--r--src/console/Kconfig96
-rw-r--r--src/console/Makefile.inc2
-rw-r--r--src/console/console.c2
-rw-r--r--src/drivers/Kconfig1
-rw-r--r--src/drivers/usb/Kconfig94
-rw-r--r--src/lib/coreboot_table.c4
7 files changed, 106 insertions, 97 deletions
diff --git a/src/arch/x86/lib/romstage_console.c b/src/arch/x86/lib/romstage_console.c
index 6566b2fe87..5e7923e64f 100644
--- a/src/arch/x86/lib/romstage_console.c
+++ b/src/arch/x86/lib/romstage_console.c
@@ -37,7 +37,7 @@ void console_tx_byte(unsigned char byte)
#if CONFIG_CONSOLE_SERIAL8250
uart_tx_byte(byte);
#endif
-#if CONFIG_USBDEBUG && (CONFIG_USBDEBUG_IN_ROMSTAGE || !defined(__PRE_RAM__))
+#if CONFIG_CONSOLE_USB && (CONFIG_USBDEBUG_IN_ROMSTAGE || !defined(__PRE_RAM__))
usb_tx_byte(0, byte);
#endif
#if CONFIG_CONSOLE_NE2K
@@ -62,7 +62,7 @@ void console_tx_flush(void)
#if CONFIG_CONSOLE_NE2K
ne2k_transmit(CONFIG_CONSOLE_NE2K_IO_PORT);
#endif
-#if CONFIG_USBDEBUG && (CONFIG_USBDEBUG_IN_ROMSTAGE || !defined(__PRE_RAM__))
+#if CONFIG_CONSOLE_USB && (CONFIG_USBDEBUG_IN_ROMSTAGE || !defined(__PRE_RAM__))
usb_tx_flush(0);
#endif
}
diff --git a/src/console/Kconfig b/src/console/Kconfig
index 40903c1c16..bb64f29587 100644
--- a/src/console/Kconfig
+++ b/src/console/Kconfig
@@ -141,100 +141,14 @@ config SPKMODEM
help
Send coreboot debug output through speaker
-# Use "select HAVE_USBDEBUG" on southbridges which have Debug Port code.
-config HAVE_USBDEBUG
- bool
- default y if HAVE_USBDEBUG_OPTIONS
+config CONSOLE_USB
+ bool "USB dongle console output"
+ depends on USBDEBUG
default n
-
-# Use "select HAVE_USBDEBUG_OPTIONS" on southbridges with multiple
-# EHCI controllers or multiple ports with Debug Port capability
-config HAVE_USBDEBUG_OPTIONS
- def_bool n
-
-config USBDEBUG
- bool "USB 2.0 EHCI debug dongle support"
- default n
- depends on HAVE_USBDEBUG
help
- This option allows you to use a so-called USB EHCI Debug device
- (such as the Ajays NET20DC, AMIDebug RX, or a system using the
- Linux "EHCI Debug Device gadget" driver found in recent kernel)
- to retrieve the coreboot debug messages (instead, or in addition
- to, a serial port).
-
- This feature is NOT supported on all chipsets in coreboot!
-
- It also requires a USB2 controller which supports the EHCI
- Debug Port capability.
-
- See http://www.coreboot.org/EHCI_Debug_Port for an up-to-date list
- of supported controllers.
-
- If unsure, say N.
-
-if USBDEBUG
-
-config USBDEBUG_IN_ROMSTAGE
- bool "Enable early (pre-RAM) usbdebug console output."
- default y
- depends on EARLY_CBMEM_INIT && EARLY_CONSOLE
- help
- Configuring USB controllers in system-agent binary may cause
- problems to usbdebug. Disabling this option delays usbdebug to
- be setup on entry to ramstage.
-
- If unsure, say Y.
-
-config USBDEBUG_HCD_INDEX
- int
- default 0
- prompt "Index for EHCI controller to use with usbdebug" if HAVE_USBDEBUG_OPTIONS
- help
- Some boards have multiple EHCI controllers with possibly only
- one having the Debug Port capability on an external USB port.
-
- Mapping of this index to PCI device functions is southbridge
- specific and mainboard level Kconfig should already provide
- a working default value here.
-
-config USBDEBUG_DEFAULT_PORT
- int
- default 0
- prompt "Default USB port to use as Debug Port" if HAVE_USBDEBUG_OPTIONS
- help
- Selects which physical USB port usbdebug dongle is connected to.
- Setting of 0 means to scan possible ports starting from 1.
-
- Intel platforms have hardwired the debug port location and this
- setting makes no difference there.
-
- Hence, if you select the correct port here, you can speed up
- your boot time. Which USB port number refers to which actual
- port on your mainboard (potentially also USB pin headers on
- your mainboard) is highly board-specific, and you'll likely
- have to find out by trial-and-error.
-
-choice
- prompt "Type of dongle"
- default USBDEBUG_DONGLE_STD
-
-config USBDEBUG_DONGLE_STD
- bool "Net20DC or compatible"
-
-config USBDEBUG_DONGLE_BEAGLEBONE
- bool "BeagleBone"
- help
- Use this to configure the USB hub on BeagleBone board.
-
-endchoice
-
-config USBDEBUG_OPTIONAL_HUB_PORT
- int
- default 2 if USBDEBUG_DONGLE_BEAGLEBONE
- default 0
+ Send coreboot debug output to USB.
-endif # USBDEBUG
+ Configuration for USB hardware is under menu Generic Drivers.
# TODO: Deps?
# TODO: Improve description.
diff --git a/src/console/Makefile.inc b/src/console/Makefile.inc
index 54d59cdeca..f158670a34 100644
--- a/src/console/Makefile.inc
+++ b/src/console/Makefile.inc
@@ -20,7 +20,7 @@ bootblock-y += die.c
ramstage-$(CONFIG_CONSOLE_SERIAL8250) += uart8250_console.c
ramstage-$(CONFIG_CONSOLE_SERIAL8250MEM) += uart8250mem_console.c
ramstage-$(CONFIG_SPKMODEM) += spkmodem_console.c
-ramstage-$(CONFIG_USBDEBUG) += usbdebug_console.c
+ramstage-$(CONFIG_CONSOLE_USB) += usbdebug_console.c
ramstage-$(CONFIG_CONSOLE_NE2K) += ne2k_console.c
ramstage-$(CONFIG_CONSOLE_CBMEM) += cbmem_console.c
ramstage-$(CONFIG_CONSOLE_QEMU_DEBUGCON) += qemu_debugcon_console.c
diff --git a/src/console/console.c b/src/console/console.c
index e09625f251..9e9e4e2556 100644
--- a/src/console/console.c
+++ b/src/console/console.c
@@ -116,7 +116,7 @@ void console_init(void)
#if CONFIG_SPKMODEM
spkmodem_init();
#endif
-#if CONFIG_USBDEBUG_IN_ROMSTAGE && !defined(__BOOT_BLOCK__)
+#if CONFIG_CONSOLE_USB && CONFIG_USBDEBUG_IN_ROMSTAGE && !defined(__BOOT_BLOCK__)
usbdebug_init();
#endif
diff --git a/src/drivers/Kconfig b/src/drivers/Kconfig
index 01bed21059..5267ff8f5d 100644
--- a/src/drivers/Kconfig
+++ b/src/drivers/Kconfig
@@ -38,4 +38,5 @@ source src/drivers/spi/Kconfig
source src/drivers/ti/Kconfig
source src/drivers/trident/Kconfig
source src/drivers/uart/Kconfig
+source src/drivers/usb/Kconfig
source src/drivers/xpowers/Kconfig
diff --git a/src/drivers/usb/Kconfig b/src/drivers/usb/Kconfig
new file mode 100644
index 0000000000..28b95c6263
--- /dev/null
+++ b/src/drivers/usb/Kconfig
@@ -0,0 +1,94 @@
+ # Use "select HAVE_USBDEBUG" on southbridges which have Debug Port code.
+config HAVE_USBDEBUG
+ bool
+ default y if HAVE_USBDEBUG_OPTIONS
+ default n
+
+# Use "select HAVE_USBDEBUG_OPTIONS" on southbridges with multiple
+# EHCI controllers or multiple ports with Debug Port capability
+config HAVE_USBDEBUG_OPTIONS
+ def_bool n
+
+config USBDEBUG
+ bool "USB 2.0 EHCI debug dongle support"
+ default n
+ depends on HAVE_USBDEBUG
+ help
+ This option allows you to use a so-called USB EHCI Debug device
+ (such as the Ajays NET20DC, AMIDebug RX, or a system using the
+ Linux "EHCI Debug Device gadget" driver found in recent kernel)
+ to retrieve the coreboot debug messages (instead, or in addition
+ to, a serial port).
+
+ This feature is NOT supported on all chipsets in coreboot!
+
+ It also requires a USB2 controller which supports the EHCI
+ Debug Port capability.
+
+ See http://www.coreboot.org/EHCI_Debug_Port for an up-to-date list
+ of supported controllers.
+
+ If unsure, say N.
+
+if USBDEBUG
+
+config USBDEBUG_IN_ROMSTAGE
+ bool "Enable early (pre-RAM) usbdebug"
+ default y
+ depends on EARLY_CBMEM_INIT && EARLY_CONSOLE
+ help
+ Configuring USB controllers in system-agent binary may cause
+ problems to usbdebug. Disabling this option delays usbdebug to
+ be setup on entry to ramstage.
+
+ If unsure, say Y.
+
+config USBDEBUG_HCD_INDEX
+ int
+ default 0
+ prompt "Index for EHCI controller to use with usbdebug" if HAVE_USBDEBUG_OPTIONS
+ help
+ Some boards have multiple EHCI controllers with possibly only
+ one having the Debug Port capability on an external USB port.
+
+ Mapping of this index to PCI device functions is southbridge
+ specific and mainboard level Kconfig should already provide
+ a working default value here.
+
+config USBDEBUG_DEFAULT_PORT
+ int
+ default 0
+ prompt "Default USB port to use as Debug Port" if HAVE_USBDEBUG_OPTIONS
+ help
+ Selects which physical USB port usbdebug dongle is connected to.
+ Setting of 0 means to scan possible ports starting from 1.
+
+ Intel platforms have hardwired the debug port location and this
+ setting makes no difference there.
+
+ Hence, if you select the correct port here, you can speed up
+ your boot time. Which USB port number refers to which actual
+ port on your mainboard (potentially also USB pin headers on
+ your mainboard) is highly board-specific, and you'll likely
+ have to find out by trial-and-error.
+
+choice
+ prompt "Type of dongle"
+ default USBDEBUG_DONGLE_STD
+
+config USBDEBUG_DONGLE_STD
+ bool "Net20DC or compatible"
+
+config USBDEBUG_DONGLE_BEAGLEBONE
+ bool "BeagleBone"
+ help
+ Use this to configure the USB hub on BeagleBone board.
+
+endchoice
+
+config USBDEBUG_OPTIONAL_HUB_PORT
+ int
+ default 2 if USBDEBUG_DONGLE_BEAGLEBONE
+ default 0
+
+endif # USBDEBUG
diff --git a/src/lib/coreboot_table.c b/src/lib/coreboot_table.c
index 4d392191a4..9bfe34fcf3 100644
--- a/src/lib/coreboot_table.c
+++ b/src/lib/coreboot_table.c
@@ -136,7 +136,7 @@ static struct lb_serial *lb_serial(struct lb_header *header)
}
#if CONFIG_CONSOLE_SERIAL8250 || CONFIG_CONSOLE_SERIAL8250MEM || \
- CONFIG_CONSOLE_SERIAL_UART || CONFIG_USBDEBUG
+ CONFIG_CONSOLE_SERIAL_UART || CONFIG_CONSOLE_USB
static void add_console(struct lb_header *header, u16 consoletype)
{
struct lb_console *console;
@@ -156,7 +156,7 @@ static void lb_console(struct lb_header *header)
#if CONFIG_CONSOLE_SERIAL8250MEM || CONFIG_CONSOLE_SERIAL_UART
add_console(header, LB_TAG_CONSOLE_SERIAL8250MEM);
#endif
-#if CONFIG_USBDEBUG
+#if CONFIG_CONSOLE_USB
add_console(header, LB_TAG_CONSOLE_EHCI);
#endif
}
generated by cgit v1.2.3 (git 2.25.1) at 2024-11-11 10:38:45 +0000