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-rw-r--r--src/arch/arm/id.S1
-rw-r--r--src/arch/arm64/id.S1
-rw-r--r--src/arch/ppc64/bootblock.S1
-rw-r--r--src/arch/x86/c_start.S6
-rw-r--r--src/arch/x86/id.S1
-rw-r--r--src/cpu/intel/fit/fit.S2
6 files changed, 0 insertions, 12 deletions
diff --git a/src/arch/arm/id.S b/src/arch/arm/id.S
index 3d3df9643a..a8f7a797f1 100644
--- a/src/arch/arm/id.S
+++ b/src/arch/arm/id.S
@@ -19,4 +19,3 @@ part:
.globl __id_end
__id_end:
-.previous
diff --git a/src/arch/arm64/id.S b/src/arch/arm64/id.S
index 3d3df9643a..a8f7a797f1 100644
--- a/src/arch/arm64/id.S
+++ b/src/arch/arm64/id.S
@@ -19,4 +19,3 @@ part:
.globl __id_end
__id_end:
-.previous
diff --git a/src/arch/ppc64/bootblock.S b/src/arch/ppc64/bootblock.S
index 106c61ad95..8b66fcdfbd 100644
--- a/src/arch/ppc64/bootblock.S
+++ b/src/arch/ppc64/bootblock.S
@@ -31,4 +31,3 @@ part:
.globl __id_end
__id_end:
-.previous
diff --git a/src/arch/x86/c_start.S b/src/arch/x86/c_start.S
index c46a45c729..a7af64f9bf 100644
--- a/src/arch/x86/c_start.S
+++ b/src/arch/x86/c_start.S
@@ -235,10 +235,4 @@ setCodeSelectorLongJump:
# restore rsp, it might not have been 16-byte aligned on entry
mov %rdx, %rsp
ret
-
- .previous
-.code64
-#else
- .previous
-.code32
#endif
diff --git a/src/arch/x86/id.S b/src/arch/x86/id.S
index 798b25d1f1..a7b4be7aa8 100644
--- a/src/arch/x86/id.S
+++ b/src/arch/x86/id.S
@@ -25,4 +25,3 @@ part:
.globl __id_end
__id_end:
-.previous
diff --git a/src/cpu/intel/fit/fit.S b/src/cpu/intel/fit/fit.S
index 3b7396c5ce..afecacdcd8 100644
--- a/src/cpu/intel/fit/fit.S
+++ b/src/cpu/intel/fit/fit.S
@@ -6,7 +6,6 @@
fit_pointer:
.long fit_table
.long 0
-.previous
.section .text
.align 16
@@ -29,4 +28,3 @@ fit_table:
.byte 0x7d
.fill CONFIG_CPU_INTEL_NUM_FIT_ENTRIES*16
fit_table_end:
-.previous