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-rw-r--r--src/ec/51nb/npce985la0dx/Kconfig28
-rw-r--r--src/ec/51nb/npce985la0dx/Makefile.inc23
-rw-r--r--src/ec/51nb/npce985la0dx/npce985la0dx.c23
3 files changed, 74 insertions, 0 deletions
diff --git a/src/ec/51nb/npce985la0dx/Kconfig b/src/ec/51nb/npce985la0dx/Kconfig
new file mode 100644
index 0000000000..caa5624ab9
--- /dev/null
+++ b/src/ec/51nb/npce985la0dx/Kconfig
@@ -0,0 +1,28 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+# This file is part of the coreboot project.
+
+config EC_51NB_NPCE985LA0DX
+ bool
+ default n
+ help
+ Support for the 51NB NPCE985LA0DX EC
+
+if EC_51NB_NPCE985LA0DX
+
+comment "Please select the following otherwise your laptop cannot be powered on."
+
+config EC_51NB_NPCE985LA0DX_FIRMWARE
+ bool "Add firmware image for 51NB NPCE985LA0DX EC"
+ depends on EC_51NB_NPCE985LA0DX
+ default n
+ help
+ Select this option to add the firmware blob for the 51NB EC.
+ You need this blob to power on your machine.
+
+config EC_51NB_NPCE985LA0DX_FW
+ string "51NB EC firmware path"
+ depends on EC_51NB_NPCE985LA0DX_FIRMWARE
+ default "ec.bin"
+ help
+ The path and filename of the file to use as 51NB firmware.
+endif
diff --git a/src/ec/51nb/npce985la0dx/Makefile.inc b/src/ec/51nb/npce985la0dx/Makefile.inc
new file mode 100644
index 0000000000..810b324b8a
--- /dev/null
+++ b/src/ec/51nb/npce985la0dx/Makefile.inc
@@ -0,0 +1,23 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+# This file is part of the coreboot project.
+
+ifeq ($(CONFIG_EC_51NB_NPCE985LA0DX),y)
+
+files_added::
+ifeq ($(CONFIG_EC_51NB_NPCE985LA0DX_FIRMWARE),y)
+ $(CBFSTOOL) $(obj)/coreboot.rom write -r EC -f $(CONFIG_EC_51NB_NPCE985LA0DX_FW) --fill-upward
+endif
+
+build_complete::
+ifeq ($(CONFIG_EC_51NB_NPCE985LA0DX_FIRMWARE),)
+ printf "\n** WARNING **\n"
+ printf "You haven't added the firmware blobs for 51NB EC.\n"
+ printf "You may be unable to power on your laptop without these blobs.\n"
+ printf "Please select the following option to add them:\n\n"
+ printf " Chipset --->\n"
+ printf " [*] Add firmware images for 51NB EC\n\n"
+endif
+
+ramstage-y += npce985la0dx.c
+
+endif
diff --git a/src/ec/51nb/npce985la0dx/npce985la0dx.c b/src/ec/51nb/npce985la0dx/npce985la0dx.c
new file mode 100644
index 0000000000..0e0fcd1b90
--- /dev/null
+++ b/src/ec/51nb/npce985la0dx/npce985la0dx.c
@@ -0,0 +1,23 @@
+/* SPDX-License-Identifier: GPL-2.0-or-later */
+/* This file is part of the coreboot project. */
+
+#include <device/pnp.h>
+
+/*
+ * This embedded controller looks awfully like a Super I/O chip. LDNs 5 and 6
+ * need to be enabled to turn on the keyboard and mouse controller, and LDN
+ * 0x11 needs to be enabled to turn on ACPI embedded controller functionality.
+ */
+static struct pnp_info dev_infos[] = {
+ { NULL, 0x05 }, { NULL, 0x06 }, { NULL, 0x11 }
+};
+
+static void ec_51nb_npce985la0dx_ops_enable(struct device *dev)
+{
+ pnp_enable_devices(dev, &pnp_ops, ARRAY_SIZE(dev_infos), dev_infos);
+}
+
+struct chip_operations ec_51nb_npce985la0dx_ops = {
+ CHIP_NAME("51NB EC")
+ .enable_dev = ec_51nb_npce985la0dx_ops_enable,
+};