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-rw-r--r--src/mainboard/dell/s1850/romstage.c1
-rw-r--r--src/mainboard/intel/jarrell/romstage.c1
-rw-r--r--src/mainboard/supermicro/x6dai_g/romstage.c1
-rw-r--r--src/mainboard/supermicro/x6dhe_g/romstage.c1
-rw-r--r--src/mainboard/supermicro/x6dhe_g2/romstage.c1
-rw-r--r--src/mainboard/supermicro/x6dhr_ig/romstage.c1
-rw-r--r--src/mainboard/supermicro/x6dhr_ig2/romstage.c1
-rw-r--r--src/northbridge/intel/e7520/raminit.c3
-rw-r--r--src/northbridge/intel/e7525/raminit.c1
9 files changed, 3 insertions, 8 deletions
diff --git a/src/mainboard/dell/s1850/romstage.c b/src/mainboard/dell/s1850/romstage.c
index c2533d72e5..d96e196dc7 100644
--- a/src/mainboard/dell/s1850/romstage.c
+++ b/src/mainboard/dell/s1850/romstage.c
@@ -5,7 +5,6 @@
#include <arch/romcc_io.h>
#include <cpu/x86/lapic.h>
#include <stdlib.h>
-#include <pc80/mc146818rtc.h>
#include <console/console.h>
#include "lib/ramtest.c"
#include "southbridge/intel/i82801ex/i82801ex_early_smbus.c"
diff --git a/src/mainboard/intel/jarrell/romstage.c b/src/mainboard/intel/jarrell/romstage.c
index 1caf4b9548..4df85cfe80 100644
--- a/src/mainboard/intel/jarrell/romstage.c
+++ b/src/mainboard/intel/jarrell/romstage.c
@@ -5,7 +5,6 @@
#include <arch/romcc_io.h>
#include <cpu/x86/lapic.h>
#include <stdlib.h>
-#include <pc80/mc146818rtc.h>
#include <console/console.h>
#include "lib/ramtest.c"
#include "southbridge/intel/i82801ex/i82801ex_early_smbus.c"
diff --git a/src/mainboard/supermicro/x6dai_g/romstage.c b/src/mainboard/supermicro/x6dai_g/romstage.c
index bfbb3bcb7f..6f8ea1264f 100644
--- a/src/mainboard/supermicro/x6dai_g/romstage.c
+++ b/src/mainboard/supermicro/x6dai_g/romstage.c
@@ -5,7 +5,6 @@
#include <arch/romcc_io.h>
#include <cpu/x86/lapic.h>
#include <stdlib.h>
-#include <pc80/mc146818rtc.h>
#include <console/console.h>
#include "lib/ramtest.c"
#include "pc80/udelay_io.c"
diff --git a/src/mainboard/supermicro/x6dhe_g/romstage.c b/src/mainboard/supermicro/x6dhe_g/romstage.c
index 8151518eee..745da9a059 100644
--- a/src/mainboard/supermicro/x6dhe_g/romstage.c
+++ b/src/mainboard/supermicro/x6dhe_g/romstage.c
@@ -5,7 +5,6 @@
#include <arch/romcc_io.h>
#include <cpu/x86/lapic.h>
#include <stdlib.h>
-#include <pc80/mc146818rtc.h>
#include <console/console.h>
#include "lib/ramtest.c"
#include "pc80/udelay_io.c"
diff --git a/src/mainboard/supermicro/x6dhe_g2/romstage.c b/src/mainboard/supermicro/x6dhe_g2/romstage.c
index 7f20e0a697..6a2b2ea0c5 100644
--- a/src/mainboard/supermicro/x6dhe_g2/romstage.c
+++ b/src/mainboard/supermicro/x6dhe_g2/romstage.c
@@ -5,7 +5,6 @@
#include <arch/romcc_io.h>
#include <cpu/x86/lapic.h>
#include <stdlib.h>
-#include <pc80/mc146818rtc.h>
#include <console/console.h>
#include "lib/ramtest.c"
#include "southbridge/intel/i82801ex/i82801ex_early_smbus.c"
diff --git a/src/mainboard/supermicro/x6dhr_ig/romstage.c b/src/mainboard/supermicro/x6dhr_ig/romstage.c
index 1269eb97c2..9d56f5c3ac 100644
--- a/src/mainboard/supermicro/x6dhr_ig/romstage.c
+++ b/src/mainboard/supermicro/x6dhr_ig/romstage.c
@@ -5,7 +5,6 @@
#include <arch/romcc_io.h>
#include <cpu/x86/lapic.h>
#include <stdlib.h>
-#include <pc80/mc146818rtc.h>
#include <console/console.h>
#include "lib/ramtest.c"
#include "southbridge/intel/i82801ex/i82801ex_early_smbus.c"
diff --git a/src/mainboard/supermicro/x6dhr_ig2/romstage.c b/src/mainboard/supermicro/x6dhr_ig2/romstage.c
index 245c03ed8c..a0f6b4951c 100644
--- a/src/mainboard/supermicro/x6dhr_ig2/romstage.c
+++ b/src/mainboard/supermicro/x6dhr_ig2/romstage.c
@@ -5,7 +5,6 @@
#include <arch/romcc_io.h>
#include <cpu/x86/lapic.h>
#include <stdlib.h>
-#include <pc80/mc146818rtc.h>
#include <console/console.h>
#include "lib/ramtest.c"
#include "southbridge/intel/i82801ex/i82801ex_early_smbus.c"
diff --git a/src/northbridge/intel/e7520/raminit.c b/src/northbridge/intel/e7520/raminit.c
index 0ef73cc026..e9827c43b9 100644
--- a/src/northbridge/intel/e7520/raminit.c
+++ b/src/northbridge/intel/e7520/raminit.c
@@ -23,6 +23,7 @@
#include <stdlib.h>
#include "raminit.h"
#include "e7520.h"
+#include <pc80/mc146818rtc.h>
#if CONFIG_HAVE_OPTION_TABLE
#include "option_table.h"
#endif
@@ -626,7 +627,7 @@ static int spd_set_dram_controller_mode(const struct mem_controller *ctrl,
if (read_option(CMOS_VSTART_ECC_memory, CMOS_VLEN_ECC_memory, 1) == 0) {
ecc = 0; /* ECC off in CMOS so disable it */
print_debug("ECC off\n");
- } else
+ } else
#endif
{
print_debug("ECC on\n");
diff --git a/src/northbridge/intel/e7525/raminit.c b/src/northbridge/intel/e7525/raminit.c
index a33b0c7680..b482bb9fec 100644
--- a/src/northbridge/intel/e7525/raminit.c
+++ b/src/northbridge/intel/e7525/raminit.c
@@ -23,6 +23,7 @@
#include <stdlib.h>
#include "raminit.h"
#include "e7525.h"
+#include <pc80/mc146818rtc.h>
#if CONFIG_HAVE_OPTION_TABLE
#include "option_table.h"
#endif