diff options
Diffstat (limited to 'src')
29 files changed, 48 insertions, 114 deletions
diff --git a/src/cpu/x86/smm/smm_module_handler.c b/src/cpu/x86/smm/smm_module_handler.c index 37af199080..02682b4191 100644 --- a/src/cpu/x86/smm/smm_module_handler.c +++ b/src/cpu/x86/smm/smm_module_handler.c @@ -91,6 +91,8 @@ static void smi_restore_pci_address(void) static const struct smm_runtime *smm_runtime; +struct global_nvs *gnvs; + void *smm_get_save_state(int cpu) { char *base; diff --git a/src/include/cpu/x86/smm.h b/src/include/cpu/x86/smm.h index 56352c5d6f..6671a513fc 100644 --- a/src/include/cpu/x86/smm.h +++ b/src/include/cpu/x86/smm.h @@ -86,7 +86,9 @@ struct smm_module_params { typedef asmlinkage void (*smm_handler_t)(void *); /* SMM Runtime helpers. */ -struct global_nvs *smm_get_gnvs(void); +#if ENV_SMM +extern struct global_nvs *gnvs; +#endif /* Entry point for SMM modules. */ asmlinkage void smm_handler_start(void *params); diff --git a/src/mainboard/getac/p470/smihandler.c b/src/mainboard/getac/p470/smihandler.c index 145c942b0c..21f4e3e21f 100644 --- a/src/mainboard/getac/p470/smihandler.c +++ b/src/mainboard/getac/p470/smihandler.c @@ -11,11 +11,6 @@ #define MAX_LCD_BRIGHTNESS 0xd8 -/* The southbridge SMI handler checks whether gnvs has a - * valid pointer before calling the trap handler - */ -extern struct global_nvs *gnvs; - int mainboard_io_trap_handler(int smif) { u8 reg8; diff --git a/src/mainboard/google/auron/smihandler.c b/src/mainboard/google/auron/smihandler.c index edbd9b652d..7e22fbb6c8 100644 --- a/src/mainboard/google/auron/smihandler.c +++ b/src/mainboard/google/auron/smihandler.c @@ -65,7 +65,7 @@ void mainboard_smi_sleep(u8 slp_typ) /* Disable USB charging if required */ switch (slp_typ) { case ACPI_S3: - if (smm_get_gnvs()->s3u0 == 0) { + if (gnvs->s3u0 == 0) { google_chromeec_set_usb_charge_mode( 0, USB_CHARGE_MODE_DISABLED); google_chromeec_set_usb_charge_mode( @@ -78,7 +78,7 @@ void mainboard_smi_sleep(u8 slp_typ) google_chromeec_set_wake_mask(MAINBOARD_EC_S3_WAKE_EVENTS); break; case ACPI_S5: - if (smm_get_gnvs()->s5u0 == 0) { + if (gnvs->s5u0 == 0) { google_chromeec_set_usb_charge_mode( 0, USB_CHARGE_MODE_DISABLED); google_chromeec_set_usb_charge_mode( diff --git a/src/mainboard/google/butterfly/mainboard_smi.c b/src/mainboard/google/butterfly/mainboard_smi.c index 4d5bc4f9be..d71d9bf028 100644 --- a/src/mainboard/google/butterfly/mainboard_smi.c +++ b/src/mainboard/google/butterfly/mainboard_smi.c @@ -23,7 +23,7 @@ void mainboard_smi_sleep(u8 slp_typ) printk(BIOS_DEBUG, "mainboard_smi_sleep: %x\n", slp_typ); /* Tell the EC to Enable USB power for S3 if requested */ - if (smm_get_gnvs()->s3u0 != 0 || smm_get_gnvs()->s3u1 != 0) + if (gnvs->s3u0 != 0 || gnvs->s3u1 != 0) ec_mem_write(EC_EC_PSW, ec_mem_read(EC_EC_PSW) | EC_PSW_USB); /* Disable wake on USB, LAN & RTC */ diff --git a/src/mainboard/google/cyan/smihandler.c b/src/mainboard/google/cyan/smihandler.c index 693a72d2a8..d9121e16d0 100644 --- a/src/mainboard/google/cyan/smihandler.c +++ b/src/mainboard/google/cyan/smihandler.c @@ -24,7 +24,7 @@ int mainboard_io_trap_handler(int smif) switch (smif) { case 0x99: printk(BIOS_DEBUG, "Sample\n"); - smm_get_gnvs()->smif = 0; + gnvs->smif = 0; break; default: return 0; @@ -86,10 +86,10 @@ void mainboard_smi_sleep(uint8_t slp_typ) /* Disable USB charging if required */ switch (slp_typ) { case ACPI_S3: - if (smm_get_gnvs()->s3u0 == 0) + if (gnvs->s3u0 == 0) google_chromeec_set_usb_charge_mode( 0, USB_CHARGE_MODE_DISABLED); - if (smm_get_gnvs()->s3u1 == 0) + if (gnvs->s3u1 == 0) google_chromeec_set_usb_charge_mode( 1, USB_CHARGE_MODE_DISABLED); @@ -99,10 +99,10 @@ void mainboard_smi_sleep(uint8_t slp_typ) enable_gpe(WAKE_GPIO_EN); break; case ACPI_S5: - if (smm_get_gnvs()->s5u0 == 0) + if (gnvs->s5u0 == 0) google_chromeec_set_usb_charge_mode( 0, USB_CHARGE_MODE_DISABLED); - if (smm_get_gnvs()->s5u1 == 0) + if (gnvs->s5u1 == 0) google_chromeec_set_usb_charge_mode( 1, USB_CHARGE_MODE_DISABLED); diff --git a/src/mainboard/google/glados/smihandler.c b/src/mainboard/google/glados/smihandler.c index ee01eabed4..85b394f430 100644 --- a/src/mainboard/google/glados/smihandler.c +++ b/src/mainboard/google/glados/smihandler.c @@ -18,7 +18,7 @@ int mainboard_io_trap_handler(int smif) switch (smif) { case 0x99: printk(BIOS_DEBUG, "Sample\n"); - smm_get_gnvs()->smif = 0; + gnvs->smif = 0; break; default: return 0; diff --git a/src/mainboard/google/jecht/smihandler.c b/src/mainboard/google/jecht/smihandler.c index 7072f8b59b..02430b88c2 100644 --- a/src/mainboard/google/jecht/smihandler.c +++ b/src/mainboard/google/jecht/smihandler.c @@ -15,7 +15,7 @@ int mainboard_io_trap_handler(int smif) switch (smif) { case 0x99: printk(BIOS_DEBUG, "Sample\n"); - smm_get_gnvs()->smif = 0; + gnvs->smif = 0; break; default: return 0; diff --git a/src/mainboard/google/link/mainboard_smi.c b/src/mainboard/google/link/mainboard_smi.c index e60ceae649..827ec17de8 100644 --- a/src/mainboard/google/link/mainboard_smi.c +++ b/src/mainboard/google/link/mainboard_smi.c @@ -49,18 +49,18 @@ void mainboard_smi_sleep(u8 slp_typ) /* Disable USB charging if required */ switch (slp_typ) { case ACPI_S3: - if (smm_get_gnvs()->s3u0 == 0) + if (gnvs->s3u0 == 0) google_chromeec_set_usb_charge_mode( 0, USB_CHARGE_MODE_DISABLED); - if (smm_get_gnvs()->s3u1 == 0) + if (gnvs->s3u1 == 0) google_chromeec_set_usb_charge_mode( 1, USB_CHARGE_MODE_DISABLED); break; case ACPI_S5: - if (smm_get_gnvs()->s5u0 == 0) + if (gnvs->s5u0 == 0) google_chromeec_set_usb_charge_mode( 0, USB_CHARGE_MODE_DISABLED); - if (smm_get_gnvs()->s5u1 == 0) + if (gnvs->s5u1 == 0) google_chromeec_set_usb_charge_mode( 1, USB_CHARGE_MODE_DISABLED); break; diff --git a/src/mainboard/google/parrot/smihandler.c b/src/mainboard/google/parrot/smihandler.c index abfe3a3b18..a359e06af3 100644 --- a/src/mainboard/google/parrot/smihandler.c +++ b/src/mainboard/google/parrot/smihandler.c @@ -62,7 +62,7 @@ void mainboard_smi_sleep(u8 slp_typ) /* Tell the EC to Disable USB power */ - if (smm_get_gnvs()->s3u0 == 0 && smm_get_gnvs()->s3u1 == 0) { + if (gnvs->s3u0 == 0 && gnvs->s3u1 == 0) { ec_kbc_write_cmd(0x45); ec_kbc_write_ib(0xF2); } diff --git a/src/mainboard/google/rambi/mainboard_smi.c b/src/mainboard/google/rambi/mainboard_smi.c index e6e40aa7fd..76cc0ed1a4 100644 --- a/src/mainboard/google/rambi/mainboard_smi.c +++ b/src/mainboard/google/rambi/mainboard_smi.c @@ -55,10 +55,10 @@ void mainboard_smi_sleep(uint8_t slp_typ) /* Disable USB charging if required */ switch (slp_typ) { case ACPI_S3: - if (smm_get_gnvs()->s3u0 == 0) + if (gnvs->s3u0 == 0) google_chromeec_set_usb_charge_mode( 0, USB_CHARGE_MODE_DISABLED); - if (smm_get_gnvs()->s3u1 == 0) + if (gnvs->s3u1 == 0) google_chromeec_set_usb_charge_mode( 1, USB_CHARGE_MODE_DISABLED); @@ -68,10 +68,10 @@ void mainboard_smi_sleep(uint8_t slp_typ) enable_gpe(WAKE_GPIO_EN); break; case ACPI_S5: - if (smm_get_gnvs()->s5u0 == 0) + if (gnvs->s5u0 == 0) google_chromeec_set_usb_charge_mode( 0, USB_CHARGE_MODE_DISABLED); - if (smm_get_gnvs()->s5u1 == 0) + if (gnvs->s5u1 == 0) google_chromeec_set_usb_charge_mode( 1, USB_CHARGE_MODE_DISABLED); diff --git a/src/mainboard/google/slippy/smihandler.c b/src/mainboard/google/slippy/smihandler.c index 70c42291e2..7ac5ef7353 100644 --- a/src/mainboard/google/slippy/smihandler.c +++ b/src/mainboard/google/slippy/smihandler.c @@ -59,10 +59,10 @@ void mainboard_smi_sleep(u8 slp_typ) /* Disable USB charging if required */ switch (slp_typ) { case ACPI_S3: - if (smm_get_gnvs()->s3u0 == 0) + if (gnvs->s3u0 == 0) google_chromeec_set_usb_charge_mode( 0, USB_CHARGE_MODE_DISABLED); - if (smm_get_gnvs()->s3u1 == 0) + if (gnvs->s3u1 == 0) google_chromeec_set_usb_charge_mode( 1, USB_CHARGE_MODE_DISABLED); @@ -77,10 +77,10 @@ void mainboard_smi_sleep(u8 slp_typ) break; case ACPI_S4: case ACPI_S5: - if (smm_get_gnvs()->s5u0 == 0) + if (gnvs->s5u0 == 0) google_chromeec_set_usb_charge_mode( 0, USB_CHARGE_MODE_DISABLED); - if (smm_get_gnvs()->s5u1 == 0) + if (gnvs->s5u1 == 0) google_chromeec_set_usb_charge_mode( 1, USB_CHARGE_MODE_DISABLED); diff --git a/src/mainboard/google/stout/mainboard_smi.c b/src/mainboard/google/stout/mainboard_smi.c index 0b6b227707..ef4b4cd1ca 100644 --- a/src/mainboard/google/stout/mainboard_smi.c +++ b/src/mainboard/google/stout/mainboard_smi.c @@ -49,7 +49,7 @@ void mainboard_smi_sleep(u8 slp_typ) * charge smart phone. * 1/1 USB on, yellow port in AUTO mode and didn't support wake up system. */ - if (smm_get_gnvs()->s3u0 != 0 || smm_get_gnvs()->s3u1 != 0) { + if (gnvs->s3u0 != 0 || gnvs->s3u1 != 0) { ec_write(EC_PERIPH_CNTL_3, ec_read(EC_PERIPH_CNTL_3) | 0x00); ec_write(EC_USB_S3_EN, ec_read(EC_USB_S3_EN) | 0x01); printk(BIOS_DEBUG, "USB wake from S3 enabled.\n"); @@ -59,7 +59,7 @@ void mainboard_smi_sleep(u8 slp_typ) * the XHCI PME to prevent wake when the port power is cut * after the transition into suspend. */ - if (smm_get_gnvs()->xhci) { + if (gnvs->xhci) { u32 reg32 = pci_read_config32(PCH_XHCI_DEV, 0x74); reg32 &= ~(1 << 8); /* disable PME */ reg32 |= (1 << 15); /* clear PME status */ diff --git a/src/mainboard/intel/cannonlake_rvp/smihandler.c b/src/mainboard/intel/cannonlake_rvp/smihandler.c index d055e5addf..734ab8ce8c 100644 --- a/src/mainboard/intel/cannonlake_rvp/smihandler.c +++ b/src/mainboard/intel/cannonlake_rvp/smihandler.c @@ -11,7 +11,7 @@ int mainboard_io_trap_handler(int smif) switch (smif) { case 0x99: printk(BIOS_DEBUG, "Sample\n"); - smm_get_gnvs()->smif = 0; + gnvs->smif = 0; break; default: return 0; diff --git a/src/mainboard/intel/kblrvp/smihandler.c b/src/mainboard/intel/kblrvp/smihandler.c index 9d87a387c1..4c9531ce01 100644 --- a/src/mainboard/intel/kblrvp/smihandler.c +++ b/src/mainboard/intel/kblrvp/smihandler.c @@ -15,7 +15,7 @@ int mainboard_io_trap_handler(int smif) switch (smif) { case 0x99: printk(BIOS_DEBUG, "Sample\n"); - smm_get_gnvs()->smif = 0; + gnvs->smif = 0; break; default: return 0; diff --git a/src/mainboard/intel/kunimitsu/smihandler.c b/src/mainboard/intel/kunimitsu/smihandler.c index 3246803bbf..1299ccecf0 100644 --- a/src/mainboard/intel/kunimitsu/smihandler.c +++ b/src/mainboard/intel/kunimitsu/smihandler.c @@ -16,7 +16,7 @@ int mainboard_io_trap_handler(int smif) switch (smif) { case 0x99: printk(BIOS_DEBUG, "Sample\n"); - smm_get_gnvs()->smif = 0; + gnvs->smif = 0; break; default: return 0; diff --git a/src/mainboard/intel/strago/smihandler.c b/src/mainboard/intel/strago/smihandler.c index 4116ed4242..fc77103537 100644 --- a/src/mainboard/intel/strago/smihandler.c +++ b/src/mainboard/intel/strago/smihandler.c @@ -23,7 +23,7 @@ int mainboard_io_trap_handler(int smif) switch (smif) { case 0x99: printk(BIOS_DEBUG, "Sample\n"); - smm_get_gnvs()->smif = 0; + gnvs->smif = 0; break; default: return 0; @@ -82,10 +82,10 @@ void mainboard_smi_sleep(uint8_t slp_typ) /* Disable USB charging if required */ switch (slp_typ) { case ACPI_S3: - if (smm_get_gnvs()->s3u0 == 0) + if (gnvs->s3u0 == 0) google_chromeec_set_usb_charge_mode( 0, USB_CHARGE_MODE_DISABLED); - if (smm_get_gnvs()->s3u1 == 0) + if (gnvs->s3u1 == 0) google_chromeec_set_usb_charge_mode( 1, USB_CHARGE_MODE_DISABLED); @@ -95,10 +95,10 @@ void mainboard_smi_sleep(uint8_t slp_typ) enable_gpe(WAKE_GPIO_EN); break; case ACPI_S5: - if (smm_get_gnvs()->s5u0 == 0) + if (gnvs->s5u0 == 0) google_chromeec_set_usb_charge_mode( 0, USB_CHARGE_MODE_DISABLED); - if (smm_get_gnvs()->s5u1 == 0) + if (gnvs->s5u1 == 0) google_chromeec_set_usb_charge_mode( 1, USB_CHARGE_MODE_DISABLED); diff --git a/src/soc/intel/baytrail/smihandler.c b/src/soc/intel/baytrail/smihandler.c index 2a56f84949..e5f53ff4aa 100644 --- a/src/soc/intel/baytrail/smihandler.c +++ b/src/soc/intel/baytrail/smihandler.c @@ -18,8 +18,6 @@ #include <soc/pmc.h> #include <soc/nvs.h> -/* GNVS needs to be set by coreboot initiating a software SMI. */ -static struct global_nvs *gnvs; static int smm_initialized; int southbridge_io_trap_handler(int smif) @@ -44,11 +42,6 @@ void southbridge_smi_set_eos(void) enable_smi(EOS); } -struct global_nvs *smm_get_gnvs(void) -{ - return gnvs; -} - static void busmaster_disable_on_bus(int bus) { int slot, func; diff --git a/src/soc/intel/braswell/smihandler.c b/src/soc/intel/braswell/smihandler.c index 28765d0780..a2c26c119f 100644 --- a/src/soc/intel/braswell/smihandler.c +++ b/src/soc/intel/braswell/smihandler.c @@ -18,8 +18,6 @@ #include <soc/gpio.h> #include <smmstore.h> -/* GNVS needs to be set by coreboot initiating a software SMI. */ -static struct global_nvs *gnvs; static int smm_initialized; int southbridge_io_trap_handler(int smif) @@ -45,11 +43,6 @@ void southbridge_smi_set_eos(void) enable_smi(EOS); } -struct global_nvs *smm_get_gnvs(void) -{ - return gnvs; -} - static void busmaster_disable_on_bus(int bus) { int slot, func; diff --git a/src/soc/intel/broadwell/smihandler.c b/src/soc/intel/broadwell/smihandler.c index c7cefdc576..86be400e71 100644 --- a/src/soc/intel/broadwell/smihandler.c +++ b/src/soc/intel/broadwell/smihandler.c @@ -25,16 +25,6 @@ static u8 smm_initialized = 0; -/* - * GNVS needs to be updated by an 0xEA PM Trap (B2) after it has been located - * by coreboot. - */ -static struct global_nvs *gnvs; -struct global_nvs *smm_get_gnvs(void) -{ - return gnvs; -} - int southbridge_io_trap_handler(int smif) { switch (smif) { diff --git a/src/soc/intel/common/block/smm/smihandler.c b/src/soc/intel/common/block/smm/smihandler.c index 73dfda5741..7bd17c3e78 100644 --- a/src/soc/intel/common/block/smm/smihandler.c +++ b/src/soc/intel/common/block/smm/smihandler.c @@ -26,9 +26,6 @@ #include <spi-generic.h> #include <stdint.h> -/* GNVS needs to be set by coreboot initiating a software SMI. */ -static struct global_nvs *gnvs; - /* SoC overrides. */ __weak const struct smm_save_state_ops *get_smm_save_state_ops(void) @@ -125,11 +122,6 @@ void southbridge_smi_set_eos(void) pmc_enable_smi(EOS); } -struct global_nvs *smm_get_gnvs(void) -{ - return gnvs; -} - static void busmaster_disable_on_bus(int bus) { int slot, func; diff --git a/src/soc/intel/common/block/smm/smitraphandler.c b/src/soc/intel/common/block/smm/smitraphandler.c index 1d6fb816bb..99825f10ba 100644 --- a/src/soc/intel/common/block/smm/smitraphandler.c +++ b/src/soc/intel/common/block/smm/smitraphandler.c @@ -24,7 +24,6 @@ /* Inherited from cpu/x86/smm.h resulting in a different signature */ int southbridge_io_trap_handler(int smif) { - struct global_nvs *gnvs = smm_get_gnvs(); switch (smif) { case 0x32: printk(BIOS_DEBUG, "OS Init\n"); @@ -61,7 +60,6 @@ void smihandler_southbridge_monitor( u32 data, mask = 0; u8 trap_sts; int i; - struct global_nvs *gnvs = smm_get_gnvs(); /* TRSR - Trap Status Register */ trap_sts = pcr_read8(PID_PSTH, PCR_PSTH_TRPST); diff --git a/src/soc/intel/denverton_ns/smihandler.c b/src/soc/intel/denverton_ns/smihandler.c index aa87630906..5eecba7a31 100644 --- a/src/soc/intel/denverton_ns/smihandler.c +++ b/src/soc/intel/denverton_ns/smihandler.c @@ -16,8 +16,6 @@ #include <soc/pm.h> #include <soc/nvs.h> -/* GNVS needs to be set by coreboot initiating a software SMI. */ -static struct global_nvs *gnvs; static int smm_initialized; int southbridge_io_trap_handler(int smif) @@ -37,9 +35,10 @@ int southbridge_io_trap_handler(int smif) return 0; } -void southbridge_smi_set_eos(void) { enable_smi(EOS); } - -struct global_nvs *smm_get_gnvs(void) { return gnvs; } +void southbridge_smi_set_eos(void) +{ + enable_smi(EOS); +} static void busmaster_disable_on_bus(int bus) { diff --git a/src/southbridge/intel/bd82x6x/smihandler.c b/src/southbridge/intel/bd82x6x/smihandler.c index b257fb69fb..8af14283c3 100644 --- a/src/southbridge/intel/bd82x6x/smihandler.c +++ b/src/southbridge/intel/bd82x6x/smihandler.c @@ -17,12 +17,6 @@ #include "pch.h" #include "nvs.h" -static struct global_nvs *gnvs; -struct global_nvs *smm_get_gnvs(void) -{ - return gnvs; -} - int southbridge_io_trap_handler(int smif) { switch (smif) { @@ -186,7 +180,7 @@ void southbridge_smi_monitor(void) void southbridge_smm_xhci_sleep(u8 slp_type) { - if (smm_get_gnvs()->xhci) + if (gnvs->xhci) xhci_sleep(slp_type); } diff --git a/src/southbridge/intel/i82801gx/smihandler.c b/src/southbridge/intel/i82801gx/smihandler.c index 1757872f2b..7aee63b457 100644 --- a/src/southbridge/intel/i82801gx/smihandler.c +++ b/src/southbridge/intel/i82801gx/smihandler.c @@ -21,9 +21,6 @@ u16 pmbase = DEFAULT_PMBASE; u8 smm_initialized = 0; -/* GNVS needs to be updated by an 0xEA PM Trap (B2) after it has been located by coreboot. */ -struct global_nvs *gnvs = (struct global_nvs *)0x0; - void southbridge_update_gnvs(u8 apm_cnt, int *smm_done) { gnvs = *(struct global_nvs **)0x500; diff --git a/src/southbridge/intel/i82801ix/smihandler.c b/src/southbridge/intel/i82801ix/smihandler.c index 070b7a60b8..c352e5d76c 100644 --- a/src/southbridge/intel/i82801ix/smihandler.c +++ b/src/southbridge/intel/i82801ix/smihandler.c @@ -9,10 +9,11 @@ #include "nvs.h" -/* GNVS needs to be updated by an 0xEA PM Trap (B2) after it has been located - * by coreboot. - */ -struct global_nvs *gnvs = (struct global_nvs *)0x0; +#if !CONFIG(SMM_TSEG) +/* For qemu/x86-q35 to build properly. */ +struct global_nvs *gnvs; +#endif + void *tcg = (void *)0x0; void *smi1 = (void *)0x0; diff --git a/src/southbridge/intel/i82801jx/smihandler.c b/src/southbridge/intel/i82801jx/smihandler.c index af242aaf19..b6161e9d81 100644 --- a/src/southbridge/intel/i82801jx/smihandler.c +++ b/src/southbridge/intel/i82801jx/smihandler.c @@ -15,10 +15,6 @@ u16 pmbase = DEFAULT_PMBASE; u8 smm_initialized = 0; -/* GNVS needs to be updated by an 0xEA PM Trap (B2) after it has been located - * by coreboot. - */ -struct global_nvs *gnvs = (struct global_nvs *)0x0; void *tcg = (void *)0x0; void *smi1 = (void *)0x0; diff --git a/src/southbridge/intel/ibexpeak/smihandler.c b/src/southbridge/intel/ibexpeak/smihandler.c index 2679351436..2bc31cf0cf 100644 --- a/src/southbridge/intel/ibexpeak/smihandler.c +++ b/src/southbridge/intel/ibexpeak/smihandler.c @@ -23,15 +23,6 @@ #include <southbridge/intel/common/gpio.h> #include <southbridge/intel/common/pmutil.h> -/* GNVS needs to be updated by an 0xEA PM Trap (B2) after it has been located - * by coreboot. - */ -static struct global_nvs *gnvs; -struct global_nvs *smm_get_gnvs(void) -{ - return gnvs; -} - int southbridge_io_trap_handler(int smif) { switch (smif) { diff --git a/src/southbridge/intel/lynxpoint/smihandler.c b/src/southbridge/intel/lynxpoint/smihandler.c index 0bc1e2a86f..6e14985307 100644 --- a/src/southbridge/intel/lynxpoint/smihandler.c +++ b/src/southbridge/intel/lynxpoint/smihandler.c @@ -21,15 +21,6 @@ static u8 smm_initialized = 0; -/* GNVS needs to be updated by an 0xEA PM Trap (B2) after it has been located - * by coreboot. - */ -static struct global_nvs *gnvs; -struct global_nvs *smm_get_gnvs(void) -{ - return gnvs; -} - int southbridge_io_trap_handler(int smif) { switch (smif) { |