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-rw-r--r--src/Kconfig15
-rw-r--r--src/device/pci_device.c6
-rw-r--r--src/include/device/device.h5
-rw-r--r--src/mainboard/emulation/qemu-q35/devicetree.cb4
4 files changed, 27 insertions, 3 deletions
diff --git a/src/Kconfig b/src/Kconfig
index f538a1cc18..3742c04675 100644
--- a/src/Kconfig
+++ b/src/Kconfig
@@ -354,6 +354,21 @@ config RAMPAYLOAD
Skip PCI enumeration logic and only allocate BAR for fixed devices
(bootable devices, TPM over GSPI).
+config CONFIGURABLE_RAMSTAGE
+ bool "Enable a configurable ramstage."
+ default y if ARCH_X86
+ help
+ A configurable ramstage allows you to select which parts of the ramstage
+ to run. Currently, we can only select a minimal PCI scanning step.
+ The minimal PCI scanning will only check those parts that are enabled
+ in the devicetree.cb. By convention none of those devices should be bridges.
+
+config MINIMAL_PCI_SCANNING
+ bool "Enable minimal PCI scanning"
+ depends on CONFIGURABLE_RAMSTAGE
+ help
+ If this option is enabled, coreboot will scan only devices
+ marked as mandatory in devicetree.cb
endmenu
menu "Mainboard"
diff --git a/src/device/pci_device.c b/src/device/pci_device.c
index 47c0e9f2d2..b1e88a6896 100644
--- a/src/device/pci_device.c
+++ b/src/device/pci_device.c
@@ -1195,6 +1195,12 @@ void pci_scan_bus(struct bus *bus, unsigned int min_devfn,
* non-existence and single function devices.
*/
for (devfn = min_devfn; devfn <= max_devfn; devfn++) {
+ if (CONFIG(MINIMAL_PCI_SCANNING)) {
+ dev = pcidev_path_behind(bus, devfn);
+ if (!dev || !dev->mandatory)
+ continue;
+ }
+
/* First thing setup the device structure. */
dev = pci_scan_get_dev(bus, devfn);
diff --git a/src/include/device/device.h b/src/include/device/device.h
index c3a1106023..333ac5d404 100644
--- a/src/include/device/device.h
+++ b/src/include/device/device.h
@@ -119,7 +119,10 @@ struct device {
unsigned int initialized : 1; /* 1 if we have initialized the device */
unsigned int on_mainboard : 1;
unsigned int disable_pcie_aspm : 1;
- unsigned int hidden : 1; /* set if we should hide from UI */
+ /* set if we should hide from UI */
+ unsigned int hidden : 1;
+ /* set if this device is used even in minimum PCI cases */
+ unsigned int mandatory : 1;
u8 command;
uint16_t hotplug_buses; /* Number of hotplug buses to allocate */
diff --git a/src/mainboard/emulation/qemu-q35/devicetree.cb b/src/mainboard/emulation/qemu-q35/devicetree.cb
index 671a2d631d..c032606e67 100644
--- a/src/mainboard/emulation/qemu-q35/devicetree.cb
+++ b/src/mainboard/emulation/qemu-q35/devicetree.cb
@@ -5,10 +5,10 @@ chip mainboard/emulation/qemu-q35
end
end
device domain 0 on
- device pci 0.0 on end # northbridge (q35)
+ device pci 0.0 mandatory end # northbridge (q35)
chip southbridge/intel/i82801ix
# present unconditionally
- device pci 1f.0 on end # LPC
+ device pci 1f.0 mandatory end # LPC
device pci 1f.2 on end # SATA
device pci 1f.3 on end # SMBus