diff options
Diffstat (limited to 'src')
35 files changed, 237 insertions, 215 deletions
diff --git a/src/arch/i386/include/arch/smp/mpspec.h b/src/arch/i386/include/arch/smp/mpspec.h index 98c21c5bcc..32ed2d752a 100644 --- a/src/arch/i386/include/arch/smp/mpspec.h +++ b/src/arch/i386/include/arch/smp/mpspec.h @@ -274,7 +274,7 @@ unsigned long write_smp_table(unsigned long addr) return addr; } #endif -#define write_smp_table(addr) addr +#define write_smp_table(addr) (addr) #endif /* HAVE_MP_TABLE */ #endif diff --git a/src/arch/i386/init/crt0.S.lb b/src/arch/i386/init/crt0.S.lb index 29e3e28277..f0326fa8f8 100644 --- a/src/arch/i386/init/crt0.S.lb +++ b/src/arch/i386/init/crt0.S.lb @@ -37,15 +37,17 @@ #include "crt0_includes.h" +#ifndef CONSOLE_DEBUG_TX_STRING /* uses: esp, ebx, ax, dx */ -#define __CONSOLE_TX_STRING(string) \ +# define __CRT_CONSOLE_TX_STRING(string) \ mov string, %ebx ; \ - CALLSP(console_tx_string) + CALLSP(crt_console_tx_string) -#if ASM_CONSOLE_LOGLEVEL > BIOS_DEBUG -#define CONSOLE_DEBUG_TX_STRING(string) __CONSOLE_TX_STRING(string) -#else -#define CONSOLE_DEBUG_TX_STRING(string) +# if defined(TTYS0_BASE) && (ASM_CONSOLE_LOGLEVEL > BIOS_DEBUG) +# define CONSOLE_DEBUG_TX_STRING(string) __CRT_CONSOLE_TX_STRING(string) +# else +# define CONSOLE_DEBUG_TX_STRING(string) +# endif #endif /* clear boot_complete flag */ @@ -167,9 +169,9 @@ decompr_end_n2b: hlt jmp .Lhlt -#if ASM_CONSOLE_LOGLEVEL > BIOS_DEBUG +#ifdef __CRT_CONSOLE_TX_STRING /* Uses esp, ebx, ax, dx */ -console_tx_string: +crt_console_tx_string: mov (%ebx), %al inc %ebx cmp $0, %al @@ -207,8 +209,10 @@ console_tx_string: mov %ah, %al outb %al, %dx - jmp console_tx_string + jmp crt_console_tx_string +#endif /* __CRT_CONSOLE_TX_STRING */ +#if defined(CONSOLE_DEBUG_TX_STRING) && (ASM_CONSOLE_LOGLEVEL > BIOS_DEBUG) .section ".rom.data" str_copying_to_ram: .string "Copying LinuxBIOS to ram.\r\n" str_pre_main: .string "Jumping to LinuxBIOS.\r\n" diff --git a/src/arch/i386/lib/console.c b/src/arch/i386/lib/console.c index d9e06e0f6b..f667795f05 100644 --- a/src/arch/i386/lib/console.c +++ b/src/arch/i386/lib/console.c @@ -64,6 +64,7 @@ static void __console_tx_string(int loglevel, const char *str) } } +#define NOINLINE __attribute__((noinline)) static void print_emerg_char(unsigned char byte) { __console_tx_char(BIOS_EMERG, byte); } static void print_emerg_hex8(unsigned char value){ __console_tx_hex8(BIOS_EMERG, value); } static void print_emerg_hex16(unsigned short value){ __console_tx_hex16(BIOS_EMERG, value); } @@ -111,18 +112,6 @@ static void print_debug_hex8(unsigned char value) { __console_tx_hex8(BIOS_DEBUG static void print_debug_hex16(unsigned short value){ __console_tx_hex16(BIOS_DEBUG, value); } static void print_debug_hex32(unsigned int value) { __console_tx_hex32(BIOS_DEBUG, value); } static void print_debug(const char *str) { __console_tx_string(BIOS_DEBUG, str); } -static void print_debug_hex8_(unsigned char value) __attribute__((noinline)) -{ - print_debug_hex8(value); -} -static void print_debug_hex32_(unsigned int value) __attribute__((noinline)) -{ - print_debug_hex32(value); -} -static void print_debug_(const char *str) __attribute__((noinline)) -{ - print_debug(str); -} static void print_spew_char(unsigned char byte) { __console_tx_char(BIOS_SPEW, byte); } static void print_spew_hex8(unsigned char value) { __console_tx_hex8(BIOS_SPEW, value); } @@ -130,6 +119,56 @@ static void print_spew_hex16(unsigned short value){ __console_tx_hex16(BIOS_SPEW static void print_spew_hex32(unsigned int value) { __console_tx_hex32(BIOS_SPEW, value); } static void print_spew(const char *str) { __console_tx_string(BIOS_SPEW, str); } +/* Non inline versions.... */ + +static void print_alert_char_(unsigned char value) NOINLINE { print_alert_char(value); } +static void print_alert_hex8_(unsigned char value) NOINLINE { print_alert_hex8(value); } +static void print_alert_hex16_(unsigned short value) NOINLINE { print_alert_hex16(value); } +static void print_alert_hex32_(unsigned int value) NOINLINE { print_alert_hex32(value); } +static void print_alert_(const char *str) NOINLINE { print_alert(str); } + +static void print_crit_char_(unsigned char value) NOINLINE { print_crit_char(value); } +static void print_crit_hex8_(unsigned char value) NOINLINE { print_crit_hex8(value); } +static void print_crit_hex16_(unsigned short value) NOINLINE { print_crit_hex16(value); } +static void print_crit_hex32_(unsigned int value) NOINLINE { print_crit_hex32(value); } +static void print_crit_(const char *str) NOINLINE { print_crit(str); } + +static void print_err_char_(unsigned char value) NOINLINE { print_err_char(value); } +static void print_err_hex8_(unsigned char value) NOINLINE { print_err_hex8(value); } +static void print_err_hex16_(unsigned short value) NOINLINE { print_err_hex16(value); } +static void print_err_hex32_(unsigned int value) NOINLINE { print_err_hex32(value); } +static void print_err_(const char *str) NOINLINE { print_err(str); } + +static void print_warning_char_(unsigned char value) NOINLINE { print_warning_char(value); } +static void print_warning_hex8_(unsigned char value) NOINLINE { print_warning_hex8(value); } +static void print_warning_hex16_(unsigned short value) NOINLINE { print_warning_hex16(value); } +static void print_warning_hex32_(unsigned int value) NOINLINE { print_warning_hex32(value); } +static void print_warning_(const char *str) NOINLINE { print_warning(str); } + +static void print_notice_char_(unsigned char value) NOINLINE { print_notice_char(value); } +static void print_notice_hex8_(unsigned char value) NOINLINE { print_notice_hex8(value); } +static void print_notice_hex16_(unsigned short value) NOINLINE { print_notice_hex16(value); } +static void print_notice_hex32_(unsigned int value) NOINLINE { print_notice_hex32(value); } +static void print_notice_(const char *str) NOINLINE { print_notice(str); } + +static void print_info_char_(unsigned char value) NOINLINE { print_info_char(value); } +static void print_info_hex8_(unsigned char value) NOINLINE { print_info_hex8(value); } +static void print_info_hex16_(unsigned short value) NOINLINE { print_info_hex16(value); } +static void print_info_hex32_(unsigned int value) NOINLINE { print_info_hex32(value); } +static void print_info_(const char *str) NOINLINE { print_info(str); } + +static void print_debug_char_(unsigned char value) NOINLINE { print_debug_char(value); } +static void print_debug_hex8_(unsigned char value) NOINLINE { print_debug_hex8(value); } +static void print_debug_hex16_(unsigned short value) NOINLINE { print_debug_hex16(value); } +static void print_debug_hex32_(unsigned int value) NOINLINE { print_debug_hex32(value); } +static void print_debug_(const char *str) NOINLINE { print_debug(str); } + +static void print_spew_char_(unsigned char value) NOINLINE { print_spew_char(value); } +static void print_spew_hex8_(unsigned char value) NOINLINE { print_spew_hex8(value); } +static void print_spew_hex16_(unsigned short value) NOINLINE { print_spew_hex16(value); } +static void print_spew_hex32_(unsigned int value) NOINLINE { print_spew_hex32(value); } +static void print_spew_(const char *str) NOINLINE { print_spew(str); } + #ifndef LINUXBIOS_EXTRA_VERSION #define LINUXBIOS_EXTRA_VERSION "" #endif diff --git a/src/arch/i386/lib/id.inc b/src/arch/i386/lib/id.inc index 44c452b03a..46b4424511 100644 --- a/src/arch/i386/lib/id.inc +++ b/src/arch/i386/lib/id.inc @@ -1,4 +1,3 @@ - .section ".id", "a", @progbits .globl __id_start diff --git a/src/arch/ppc/include/div64.h b/src/arch/ppc/include/div64.h index a841abf954..7d9a7b6117 100644 --- a/src/arch/ppc/include/div64.h +++ b/src/arch/ppc/include/div64.h @@ -1 +1,2 @@ +#define ULONG_MAX 4294967295 #include <arch-generic/div64.h> diff --git a/src/arch/ppc/lib/cpu.c b/src/arch/ppc/lib/cpu.c index efb914b059..adf5358c28 100644 --- a/src/arch/ppc/lib/cpu.c +++ b/src/arch/ppc/lib/cpu.c @@ -3,7 +3,6 @@ #include <string.h> #include <cpu/cpu.h> #include <cpu/ppc/cpuid.h> -#include <smp/start_stop.h> #include "ppc.h" #include "ppcreg.h" diff --git a/src/cpu/amd/socket_754/Config.lb b/src/cpu/amd/socket_754/Config.lb index a4c6cf3890..60a735a48b 100644 --- a/src/cpu/amd/socket_754/Config.lb +++ b/src/cpu/amd/socket_754/Config.lb @@ -1,3 +1,7 @@ -#config chip.h -#object socket_754.o +uses CONFIG_CHIP_NAME + +if CONFIG_CHIP_NAME + config chip.h +end +object socket_754.o dir /cpu/amd/model_fxx diff --git a/src/cpu/amd/socket_940/socket_940.c b/src/cpu/amd/socket_940/socket_940.c index d412538ed1..dc825a214f 100644 --- a/src/cpu/amd/socket_940/socket_940.c +++ b/src/cpu/amd/socket_940/socket_940.c @@ -1,8 +1,6 @@ #include <device/device.h> #include "chip.h" -#if CONFIG_CHIP_NAME == 1 struct chip_operations cpu_amd_socket_940_ops = { CHIP_NAME("socket 940") }; -#endif diff --git a/src/cpu/intel/model_f2x/Config.lb b/src/cpu/intel/model_f2x/Config.lb index ef9d095ac5..3cf5062931 100644 --- a/src/cpu/intel/model_f2x/Config.lb +++ b/src/cpu/intel/model_f2x/Config.lb @@ -10,4 +10,3 @@ dir /cpu/x86/cache dir /cpu/intel/microcode dir /cpu/intel/hyperthreading driver model_f2x_init.o - diff --git a/src/cpu/intel/slot_2/chip.h b/src/cpu/intel/slot_2/chip.h index 6143302144..0f504dbc5f 100644 --- a/src/cpu/intel/slot_2/chip.h +++ b/src/cpu/intel/slot_2/chip.h @@ -1,4 +1,4 @@ -extern struct chip_operations cpu_intel_slot_2_control; +extern struct chip_operations cpu_intel_slot_2_ops; struct cpu_intel_slot_2_config { }; diff --git a/src/cpu/intel/slot_2/slot_2.c b/src/cpu/intel/slot_2/slot_2.c index cc0fad34bc..19bbea8133 100644 --- a/src/cpu/intel/slot_2/slot_2.c +++ b/src/cpu/intel/slot_2/slot_2.c @@ -2,6 +2,6 @@ #include "chip.h" -struct chip_operations cpu_intel_slot_2_control = { +struct chip_operations cpu_intel_slot_2_ops = { CHIP_NAME("slot 2") }; diff --git a/src/cpu/intel/socket_mPGA603/chip.h b/src/cpu/intel/socket_mPGA603/chip.h index eee4b9cf90..0170297e68 100644 --- a/src/cpu/intel/socket_mPGA603/chip.h +++ b/src/cpu/intel/socket_mPGA603/chip.h @@ -1,4 +1,4 @@ -extern struct chip_operations cpu_intel_socket_mPGA603_control; +extern struct chip_operations cpu_intel_socket_mPGA603_ops; struct cpu_intel_socket_mPGA603_config { }; diff --git a/src/cpu/intel/socket_mPGA603/socket_mPGA603_400Mhz.c b/src/cpu/intel/socket_mPGA603/socket_mPGA603_400Mhz.c index e589f1ddc5..fdb90e69e4 100644 --- a/src/cpu/intel/socket_mPGA603/socket_mPGA603_400Mhz.c +++ b/src/cpu/intel/socket_mPGA603/socket_mPGA603_400Mhz.c @@ -2,6 +2,6 @@ #include "chip.h" -struct chip_opertations cpu_intel_socket_mPGA603_control = { +struct chip_opertations cpu_intel_socket_mPGA603_ops = { CHIP_NAME("socket mPGA603_400Mhz") }; diff --git a/src/cpu/intel/socket_mPGA604_533Mhz/Config.lb b/src/cpu/intel/socket_mPGA604_533Mhz/Config.lb index fde9b9c165..1271d16978 100644 --- a/src/cpu/intel/socket_mPGA604_533Mhz/Config.lb +++ b/src/cpu/intel/socket_mPGA604_533Mhz/Config.lb @@ -1,4 +1,6 @@ -#config chip.h -#object socket_mPGA604_533Mhz.o +uses CONFIG_CHIP_NAME +if CONFIG_CHIP_NAME + config chip.h +end +object socket_mPGA604_533Mhz.o dir /cpu/intel/model_f2x - diff --git a/src/cpu/intel/socket_mPGA604_800Mhz/chip.h b/src/cpu/intel/socket_mPGA604_800Mhz/chip.h index ebbbab89f0..b181737c18 100644 --- a/src/cpu/intel/socket_mPGA604_800Mhz/chip.h +++ b/src/cpu/intel/socket_mPGA604_800Mhz/chip.h @@ -1,4 +1,4 @@ -extern struct chip_operations cpu_intel_socket_mPGA604_800Mhz_control; +extern struct chip_operations cpu_intel_socket_mPGA604_800Mhz_ops; struct cpu_intel_socket_mPGA604_800Mhz_config { }; diff --git a/src/cpu/intel/socket_mPGA604_800Mhz/socket_mPGA604_800Mhz.c b/src/cpu/intel/socket_mPGA604_800Mhz/socket_mPGA604_800Mhz.c index e99e2a1c95..77ec2dc621 100644 --- a/src/cpu/intel/socket_mPGA604_800Mhz/socket_mPGA604_800Mhz.c +++ b/src/cpu/intel/socket_mPGA604_800Mhz/socket_mPGA604_800Mhz.c @@ -2,6 +2,6 @@ #include "chip.h" -struct chip_operations cpu_intel_socket_mPGA604_800Mhz_control = { +struct chip_operations cpu_intel_socket_mPGA604_800Mhz_ops = { CHIP_NAME("socket mPGA604_800Mhz") }; diff --git a/src/cpu/via/model_centaur/model_centaur_init.c b/src/cpu/via/model_centaur/model_centaur_init.c index af2b7464b1..52e8ee44a6 100644 --- a/src/cpu/via/model_centaur/model_centaur_init.c +++ b/src/cpu/via/model_centaur/model_centaur_init.c @@ -11,28 +11,11 @@ #include <cpu/x86/cache.h> #include <cpu/x86/mtrr.h> -static uint32_t microcode_updates[] = { - /* WARNING - Intel has a new data structure that has variable length - * microcode update lengths. They are encoded in int 8 and 9. A - * dummy header of nulls must terminate the list. - */ - - /* Dummy terminator */ - 0x0, 0x0, 0x0, 0x0, - 0x0, 0x0, 0x0, 0x0, - 0x0, 0x0, 0x0, 0x0, - 0x0, 0x0, 0x0, 0x0, -}; - - static void model_centaur_init(device_t dev) { /* Turn on caching if we haven't already */ x86_enable_cache(); x86_mtrr_check(); - - /* Update the microcode */ - intel_update_microcode(microcode_updates); /* Enable the local cpu apics */ setup_lapic(); diff --git a/src/cpu/x86/16bit/reset16.lds b/src/cpu/x86/16bit/reset16.lds index d01f094b3c..4c42c76b37 100644 --- a/src/cpu/x86/16bit/reset16.lds +++ b/src/cpu/x86/16bit/reset16.lds @@ -13,4 +13,3 @@ SECTIONS { BYTE(0x00); } } - diff --git a/src/cpu/x86/mtrr/earlymtrr.c b/src/cpu/x86/mtrr/earlymtrr.c index bf8058069c..af4aa30499 100644 --- a/src/cpu/x86/mtrr/earlymtrr.c +++ b/src/cpu/x86/mtrr/earlymtrr.c @@ -15,17 +15,11 @@ # error "CONFIG_LB_MEM_TOPK not defined" #endif -#if __ROMCC__ == 0 && __ROMCC_MINOR__ <= 64 - -#warning "Not checking if XIP_ROM_SIZE is valid to avoid romcc preprocessor deficiency" - -#else -# if defined(XIP_ROM_SIZE) && ((XIP_ROM_SIZE & (XIP_ROM_SIZE -1)) != 0) -# error "XIP_ROM_SIZE is not a power of 2" -# endif -# if defined(XIP_ROM_SIZE) && ((XIP_ROM_BASE % XIP_ROM_SIZE) != 0) -# error "XIP_ROM_BASE is not a multiple of XIP_ROM_SIZE" -# endif +#if defined(XIP_ROM_SIZE) && ((XIP_ROM_SIZE & (XIP_ROM_SIZE -1)) != 0) +# error "XIP_ROM_SIZE is not a power of 2" +#endif +#if defined(XIP_ROM_SIZE) && ((XIP_ROM_BASE % XIP_ROM_SIZE) != 0) +# error "XIP_ROM_BASE is not a multiple of XIP_ROM_SIZE" #endif #if (CONFIG_LB_MEM_TOPK & (CONFIG_LB_MEM_TOPK -1)) != 0 diff --git a/src/include/arch-generic/div64.h b/src/include/arch-generic/div64.h index a6bc97532a..4015810d8c 100644 --- a/src/include/arch-generic/div64.h +++ b/src/include/arch-generic/div64.h @@ -17,7 +17,9 @@ * beware of side effects! */ +#ifndef ULONG_MAX #include <limits.h> +#endif #include <stdint.h> #if ULONG_MAX == 4294967295 diff --git a/src/include/device/pci_ids.h b/src/include/device/pci_ids.h index f4b0109c49..93f72e0fe4 100644 --- a/src/include/device/pci_ids.h +++ b/src/include/device/pci_ids.h @@ -1782,6 +1782,17 @@ #define PCI_DEVICE_ID_INTEL_82801ER_EHCI 0x24dd #define PCI_DEVICE_ID_INTEL_82801ER_IDE 0x24db #define PCI_DEVICE_ID_INTEL_82801ER_SATA 0x24df +#define PCI_DEVICE_ID_INTEL_6300ESB_ISA 0x25a1 +#define PCI_DEVICE_ID_INTEL_6300ESB_AC97_AUDIO 0x25a6 +#define PCI_DEVICE_ID_INTEL_6300ESB_AC97_MODEM 0x25a7 +#define PCI_DEVICE_ID_INTEL_6300ESB_EHCI 0x25ad +#define PCI_DEVICE_ID_INTEL_6300ESB_IDE 0x25a2 +#define PCI_DEVICE_ID_INTEL_6300ESB_PCI 0x244e +#define PCI_DEVICE_ID_INTEL_6300ESB_USB 0x25a9 +#define PCI_DEVICE_ID_INTEL_6300ESB_SMB 0x25a4 +#define PCI_DEVICE_ID_INTEL_6300ESB_USB2 0x25aa +#define PCI_DEVICE_ID_INTEL_6300ESB_USB3 0x25ad +#define PCI_DEVICE_ID_INTEL_6300ESB_SATA 0x25a3 #define PCI_DEVICE_ID_INTEL_80310 0x530d #define PCI_DEVICE_ID_INTEL_82810_MC1 0x7120 #define PCI_DEVICE_ID_INTEL_82810_IG1 0x7121 diff --git a/src/lib/malloc.c b/src/lib/malloc.c index 5364e4cf22..bd403e47e9 100644 --- a/src/lib/malloc.c +++ b/src/lib/malloc.c @@ -1,5 +1,4 @@ #include <stdlib.h> -#include <string.h> #include <console/console.h> #if 0 diff --git a/src/lib/uart8250.c b/src/lib/uart8250.c index e3a1255dc6..0336926925 100644 --- a/src/lib/uart8250.c +++ b/src/lib/uart8250.c @@ -20,7 +20,7 @@ #define UART_MSR 0x06 #define UART_SCR 0x07 -static int uart8250_can_tx_byte(unsigned base_port) +static inline int uart8250_can_tx_byte(unsigned base_port) { return inb(base_port + UART_LSR) & 0x20; } diff --git a/src/mainboard/arima/hdama/mptable.c b/src/mainboard/arima/hdama/mptable.c index a9c5cbfea2..9287b7333e 100644 --- a/src/mainboard/arima/hdama/mptable.c +++ b/src/mainboard/arima/hdama/mptable.c @@ -144,56 +144,48 @@ void *smp_write_config_table(void *v) smp_write_lintsrc(mc, mp_NMI, MP_IRQ_TRIGGER_DEFAULT|MP_IRQ_POLARITY_DEFAULT, bus_isa, 0x00, MP_APIC_ALL, 0x01); - /* PCI Ints: Type Polarity Trigger Bus ID PCIDEVNUM|IRQ APIC ID PIN# */ + /* PCI Ints: Type Trigger Polarity Bus ID PCIDEVNUM|IRQ APIC ID PIN# */ /* On board nics */ - smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_DEFAULT|MP_IRQ_POLARITY_DEFAULT, bus_8131_1, (0x03<<2)|0, 0x02, 0x13); - smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_DEFAULT|MP_IRQ_POLARITY_DEFAULT, bus_8131_1, (0x04<<2)|0, 0x02, 0x13); + smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_DEFAULT|MP_IRQ_POLARITY_DEFAULT, bus_8131_1, (0x03<<2)|0, 0x02, 0x13); + smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_DEFAULT|MP_IRQ_POLARITY_DEFAULT, bus_8131_1, (0x04<<2)|0, 0x02, 0x13); /* PCI Slot 1 */ - smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_DEFAULT|MP_IRQ_POLARITY_DEFAULT, bus_8131_2, (0x01<<2)|0, 0x02, 0x11); - smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_DEFAULT|MP_IRQ_POLARITY_DEFAULT, bus_8131_2, (0x01<<2)|1, 0x02, 0x12); - smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_DEFAULT|MP_IRQ_POLARITY_DEFAULT, bus_8131_2, (0x01<<2)|2, 0x02, 0x13); - smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_DEFAULT|MP_IRQ_POLARITY_DEFAULT, bus_8131_2, (0x01<<2)|3, 0x02, 0x10); + smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_DEFAULT|MP_IRQ_POLARITY_DEFAULT, bus_8131_2, (0x01<<2)|0, 0x02, 0x11); + smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_DEFAULT|MP_IRQ_POLARITY_DEFAULT, bus_8131_2, (0x01<<2)|1, 0x02, 0x12); + smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_DEFAULT|MP_IRQ_POLARITY_DEFAULT, bus_8131_2, (0x01<<2)|2, 0x02, 0x13); + smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_DEFAULT|MP_IRQ_POLARITY_DEFAULT, bus_8131_2, (0x01<<2)|3, 0x02, 0x10); /* PCI Slot 2 */ - smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_DEFAULT|MP_IRQ_POLARITY_DEFAULT, bus_8131_2, (0x02<<2)|0, 0x02, 0x12); - smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_DEFAULT|MP_IRQ_POLARITY_DEFAULT, bus_8131_2, (0x02<<2)|1, 0x02, 0x13); - smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_DEFAULT|MP_IRQ_POLARITY_DEFAULT, bus_8131_2, (0x02<<2)|2, 0x02, 0x10); - smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_DEFAULT|MP_IRQ_POLARITY_DEFAULT, bus_8131_2, (0x02<<2)|3, 0x02, 0x11); + smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_DEFAULT|MP_IRQ_POLARITY_DEFAULT, bus_8131_2, (0x02<<2)|0, 0x02, 0x12); + smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_DEFAULT|MP_IRQ_POLARITY_DEFAULT, bus_8131_2, (0x02<<2)|1, 0x02, 0x13); + smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_DEFAULT|MP_IRQ_POLARITY_DEFAULT, bus_8131_2, (0x02<<2)|2, 0x02, 0x10); + smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_DEFAULT|MP_IRQ_POLARITY_DEFAULT, bus_8131_2, (0x02<<2)|3, 0x02, 0x11); /* PCI Slot 3 */ - smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_DEFAULT|MP_IRQ_POLARITY_DEFAULT, bus_8131_1, (0x01<<2)|0, 0x02, 0x11); - smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_DEFAULT|MP_IRQ_POLARITY_DEFAULT, bus_8131_1, (0x01<<2)|1, 0x02, 0x12); - smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_DEFAULT|MP_IRQ_POLARITY_DEFAULT, bus_8131_1, (0x01<<2)|2, 0x02, 0x13); - smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_DEFAULT|MP_IRQ_POLARITY_DEFAULT, bus_8131_1, (0x01<<2)|3, 0x02, 0x10); + smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_DEFAULT|MP_IRQ_POLARITY_DEFAULT, bus_8131_1, (0x01<<2)|0, 0x02, 0x11); + smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_DEFAULT|MP_IRQ_POLARITY_DEFAULT, bus_8131_1, (0x01<<2)|1, 0x02, 0x12); + smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_DEFAULT|MP_IRQ_POLARITY_DEFAULT, bus_8131_1, (0x01<<2)|2, 0x02, 0x13); + smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_DEFAULT|MP_IRQ_POLARITY_DEFAULT, bus_8131_1, (0x01<<2)|3, 0x02, 0x10); /* PCI Slot 4 */ - smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_DEFAULT|MP_IRQ_POLARITY_DEFAULT, bus_8131_1, (2<<2)|0, 0x02, 0x12); - smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_DEFAULT|MP_IRQ_POLARITY_DEFAULT, bus_8131_1, (2<<2)|1, 0x02, 0x13); - smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_DEFAULT|MP_IRQ_POLARITY_DEFAULT, bus_8131_1, (2<<2)|2, 0x02, 0x10); - smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_DEFAULT|MP_IRQ_POLARITY_DEFAULT, bus_8131_1, (2<<2)|3, 0x02, 0x11); + smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_DEFAULT|MP_IRQ_POLARITY_DEFAULT, bus_8131_1, (0x02<<2)|0, 0x02, 0x12); + smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_DEFAULT|MP_IRQ_POLARITY_DEFAULT, bus_8131_1, (0x02<<2)|1, 0x02, 0x13); + smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_DEFAULT|MP_IRQ_POLARITY_DEFAULT, bus_8131_1, (0x02<<2)|2, 0x02, 0x10); + smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_DEFAULT|MP_IRQ_POLARITY_DEFAULT, bus_8131_1, (0x02<<2)|3, 0x02, 0x11); /* PCI Slot 5 */ #warning "FIXME get the irqs right, it's just hacked to work for now" - smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_DEFAULT|MP_IRQ_POLARITY_DEFAULT, - bus_8111_1, (5<<2)|0, 0x02, 0x11); - smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_DEFAULT|MP_IRQ_POLARITY_DEFAULT, - bus_8111_1, (5<<2)|1, 0x02, 0x12); - smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_DEFAULT|MP_IRQ_POLARITY_DEFAULT, - bus_8111_1, (5<<2)|2, 0x02, 0x13); - smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_DEFAULT|MP_IRQ_POLARITY_DEFAULT, - bus_8111_1, (5<<2)|3, 0x02, 0x10); + smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_DEFAULT|MP_IRQ_POLARITY_DEFAULT, bus_8111_1, (0x05<<2)|0, 0x02, 0x11); + smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_DEFAULT|MP_IRQ_POLARITY_DEFAULT, bus_8111_1, (0x05<<2)|1, 0x02, 0x12); + smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_DEFAULT|MP_IRQ_POLARITY_DEFAULT, bus_8111_1, (0x05<<2)|2, 0x02, 0x13); + smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_DEFAULT|MP_IRQ_POLARITY_DEFAULT, bus_8111_1, (0x05<<2)|3, 0x02, 0x10); /* PCI Slot 6 */ #warning "FIXME get the irqs right, it's just hacked to work for now" - smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_DEFAULT|MP_IRQ_POLARITY_DEFAULT, - bus_8111_1, (4<<2)|0, 0x02, 0x10); - smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_DEFAULT|MP_IRQ_POLARITY_DEFAULT, - bus_8111_1, (4<<2)|1, 0x02, 0x11); - smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_DEFAULT|MP_IRQ_POLARITY_DEFAULT, - bus_8111_1, (4<<2)|2, 0x02, 0x12); - smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_DEFAULT|MP_IRQ_POLARITY_DEFAULT, - bus_8111_1, (4<<2)|3, 0x02, 0x13); + smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_DEFAULT|MP_IRQ_POLARITY_DEFAULT, bus_8111_1, (0x04<<2)|0, 0x02, 0x10); + smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_DEFAULT|MP_IRQ_POLARITY_DEFAULT, bus_8111_1, (0x04<<2)|1, 0x02, 0x11); + smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_DEFAULT|MP_IRQ_POLARITY_DEFAULT, bus_8111_1, (0x04<<2)|2, 0x02, 0x12); + smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_DEFAULT|MP_IRQ_POLARITY_DEFAULT, bus_8111_1, (0x04<<2)|3, 0x02, 0x13); /* There is no extension information... */ diff --git a/src/northbridge/amd/amdk8/coherent_ht.c b/src/northbridge/amd/amdk8/coherent_ht.c index 25779a2bf2..9152ea80a5 100644 --- a/src/northbridge/amd/amdk8/coherent_ht.c +++ b/src/northbridge/amd/amdk8/coherent_ht.c @@ -25,7 +25,6 @@ */ #define generate_temp_row(...) ((generate_row(__VA_ARGS__)&(~0x0f0000))|0x010000) -#define clear_temp_row(x) fill_row(x,7,DEFAULT) #define enable_bsp_routing() enable_routing(0) #define NODE_HT(x) PCI_DEV(0,24+x,0) @@ -56,7 +55,7 @@ static u8 link_to_register(int ldt) if (ldt&0x02) return 0x00; /* we should never get here */ - print_debug("Unknown Link\n"); + print_spew("Unknown Link\n"); return 0; } @@ -281,29 +280,29 @@ static void fill_row(u8 node, u8 row, u32 value) pci_write_config32(NODE_HT(node), 0x40+(row<<2), value); } -static void setup_row(u8 source, u8 dest, u8 cpus) +static void setup_row(u8 source, u8 dest, u8 nodes) { - fill_row(source,dest,generate_row(source,dest,cpus)); + fill_row(source,dest,generate_row(source,dest,nodes)); } -static void setup_temp_row(u8 source, u8 dest, u8 cpus) +static void setup_temp_row(u8 source, u8 dest, u8 nodes) { - fill_row(source,7,generate_temp_row(source,dest,cpus)); + fill_row(source,7,generate_temp_row(source,dest,nodes)); } -static void setup_node(u8 node, u8 cpus) +static void setup_node(u8 node, u8 nodes) { u8 row; - for(row=0; row<cpus; row++) - setup_row(node, row, cpus); + for(row=0; row<nodes; row++) + setup_row(node, row, nodes); } -static void setup_remote_row(u8 source, u8 dest, u8 cpus) +static void setup_remote_row(u8 source, u8 dest, u8 nodes) { - fill_row(7, dest, generate_row(source, dest, cpus)); + fill_row(7, dest, generate_row(source, dest, nodes)); } -static void setup_remote_node(u8 node, u8 cpus) +static void setup_remote_node(u8 node, u8 nodes) { static const uint8_t pci_reg[] = { 0x44, 0x4c, 0x54, 0x5c, 0x64, 0x6c, 0x74, 0x7c, @@ -318,8 +317,8 @@ static void setup_remote_node(u8 node, u8 cpus) int i; print_spew("setup_remote_node: "); - for(row=0; row<cpus; row++) - setup_remote_row(node, row, cpus); + for(row=0; row<nodes; row++) + setup_remote_row(node, row, nodes); /* copy the default resource map from node 0 */ for(i = 0; i < sizeof(pci_reg)/sizeof(pci_reg[0]); i++) { @@ -336,11 +335,11 @@ static void setup_remote_node(u8 node, u8 cpus) #endif #if CONFIG_MAX_CPUS > 2 -static void setup_temp_node(u8 node, u8 cpus) +static void setup_temp_node(u8 node, u8 nodes) { u8 row; - for(row=0; row<cpus; row++) - fill_row(7,row,generate_row(node,row,cpus)); + for(row=0; row<nodes; row++) + fill_row(7,row,generate_row(node,row,nodes)); } #endif @@ -351,7 +350,7 @@ static void setup_uniprocessor(void) } struct setup_smp_result { - int cpus; + int nodes; int needs_reset; }; @@ -359,46 +358,42 @@ struct setup_smp_result { static struct setup_smp_result setup_smp(void) { struct setup_smp_result result; - result.cpus = 2; + result.nodes = 2; result.needs_reset = 0; print_spew("Enabling SMP settings\r\n"); - setup_row(0, 0, result.cpus); + setup_row(0, 0, result.nodes); /* Setup and check a temporary connection to node 1 */ - setup_temp_row(0, 1, result.cpus); + setup_temp_row(0, 1, result.nodes); if (!check_connection(0, 7, link_to_register(link_connection(0,1)))) { - print_debug("No connection to Node 1.\r\n"); - clear_temp_row(0); /* delete temp connection */ + print_spew("No connection to Node 1.\r\n"); setup_uniprocessor(); /* and get up working */ - result.cpus = 1; + result.nodes = 1; return result; } /* We found 2 nodes so far */ - setup_node(0, result.cpus); /* Node 1 is there. Setup Node 0 correctly */ - setup_remote_node(1, result.cpus); /* Setup the routes on the remote node */ + setup_node(0, result.nodes); /* Node 1 is there. Setup Node 0 correctly */ + setup_remote_node(1, result.nodes); /* Setup the routes on the remote node */ rename_temp_node(1); /* Rename Node 7 to Node 1 */ enable_routing(1); /* Enable routing on Node 1 */ - clear_temp_row(0); /* delete temporary connection */ - - result.needs_reset = - optimize_connection(NODE_HT(0), 0x80 + link_to_register(link_connection(0,1)), - NODE_HT(1), 0x80 + link_to_register(link_connection(1,0)) ); + result.needs_reset = optimize_connection( + NODE_HT(0), 0x80 + link_to_register(link_connection(0,1)), + NODE_HT(1), 0x80 + link_to_register(link_connection(1,0)) ); #if CONFIG_MAX_CPUS > 2 - result.cpus=4; + result.nodes=4; /* Setup and check temporary connection from Node 0 to Node 2 */ - setup_temp_row(0,2, result.cpus); + setup_temp_row(0,2, result.nodes); if (!check_connection(0, 7, link_to_register(link_connection(0,2))) ) { - print_debug("No connection to Node 2.\r\n"); - clear_temp_row(0); /* delete temp connection */ - result.cpus = 2; + print_spew("No connection to Node 2.\r\n"); + result.nodes = 2; return result; } @@ -406,38 +401,31 @@ static struct setup_smp_result setup_smp(void) * connection from node 0 to node 3 via node 1 */ - setup_temp_row(0,1, result.cpus); /* temp. link between nodes 0 and 1 */ - setup_temp_row(1,3, result.cpus); /* temp. link between nodes 1 and 3 */ + setup_temp_row(0,1, result.nodes); /* temp. link between nodes 0 and 1 */ + setup_temp_row(1,3, result.nodes); /* temp. link between nodes 1 and 3 */ if (!check_connection(1, 7, link_to_register(link_connection(1,3)))) { - print_debug("No connection to Node 3.\r\n"); - clear_temp_row(0); /* delete temp connection */ - clear_temp_row(1); /* delete temp connection */ - result.cpus = 2; + print_spew("No connection to Node 3.\r\n"); + result.nodes = 2; return result; } /* We found 4 nodes so far. Now setup all nodes for 4p */ - setup_node(0, result.cpus); /* The first 2 nodes are configured */ - setup_node(1, result.cpus); /* already. Just configure them for 4p */ + setup_node(0, result.nodes); /* The first 2 nodes are configured */ + setup_node(1, result.nodes); /* already. Just configure them for 4p */ - setup_temp_row(0,2, result.cpus); - setup_temp_node(2, result.cpus); + setup_temp_row(0,2, result.nodes); + setup_temp_node(2, result.nodes); rename_temp_node(2); enable_routing(2); - setup_temp_row(0,1, result.cpus); - setup_temp_row(1,3, result.cpus); - setup_temp_node(3, result.cpus); + setup_temp_row(0,1, result.nodes); + setup_temp_row(1,3, result.nodes); + setup_temp_node(3, result.nodes); rename_temp_node(3); enable_routing(3); /* enable routing on node 3 (temp.) */ - clear_temp_row(0); - clear_temp_row(1); - clear_temp_row(2); - clear_temp_row(3); - /* optimize physical connections - by LYH */ result.needs_reset = optimize_connection( NODE_HT(0), 0x80 + link_to_register(link_connection(0,2)), @@ -453,50 +441,57 @@ static struct setup_smp_result setup_smp(void) #endif /* CONFIG_MAX_CPUS > 2 */ - print_debug_hex8(result.cpus); + print_debug_hex8(result.nodes); print_debug(" nodes initialized.\r\n"); return result; } #endif -#if CONFIG_MAX_CPUS > 1 -static unsigned verify_mp_capabilities(unsigned cpus) +static unsigned verify_mp_capabilities(unsigned nodes) { unsigned node, row, mask; bool mp_cap=TRUE; - if (cpus > 2) { + if (nodes > 2) { mask=0x06; /* BigMPCap */ - } else { + } else if (nodes == 2) { mask=0x02; /* MPCap */ + } else { + mask=0x00; /* Non SMP */ } - for (node=0; node<cpus; node++) { + for (node=0; node<nodes; node++) { if ((pci_read_config32(NODE_MC(node), 0xe8) & mask) != mask) { mp_cap = FALSE; } } if (mp_cap) { - return cpus; + return nodes; } - /* one of our cpus is not mp capable */ + /* one of our nodes is not mp capable */ print_err("One of the CPUs is not MP capable. Going back to UP\r\n"); + return 1; +} - for (node = cpus; node > 0; node--) { - for (row = cpus; row > 0; row--) { - fill_row(NODE_HT(node-1), row-1, DEFAULT); +static void clear_dead_routes(unsigned nodes) +{ + int last_row; + int node, row; + last_row = nodes; + if (nodes == 1) { + last_row = 0; + } + for(node = 7; node >= 0; node--) { + for(row = 7; row >= last_row; row--) { + fill_row(node, row, DEFAULT); } } - setup_uniprocessor(); - return 1; } -#endif - -static void coherent_ht_finalize(unsigned cpus) +static void coherent_ht_finalize(unsigned nodes) { unsigned node; bool rev_a0; @@ -507,11 +502,9 @@ static void coherent_ht_finalize(unsigned cpus) * registers on Hammer A0 revision. */ -#if 1 - print_debug("coherent_ht_finalize\r\n"); -#endif + print_spew("coherent_ht_finalize\r\n"); rev_a0 = is_cpu_rev_a0(); - for (node = 0; node < cpus; node++) { + for (node = 0; node < nodes; node++) { device_t dev; uint32_t val; dev = NODE_HT(node); @@ -519,7 +512,7 @@ static void coherent_ht_finalize(unsigned cpus) /* Set the Total CPU and Node count in the system */ val = pci_read_config32(dev, 0x60); val &= (~0x000F0070); - val |= ((cpus-1)<<16)|((cpus-1)<<4); + val |= ((nodes-1)<<16)|((nodes-1)<<4); pci_write_config32(dev, 0x60, val); /* Only respond to real cpu pci configuration cycles @@ -537,22 +530,20 @@ static void coherent_ht_finalize(unsigned cpus) pci_write_config32(dev, 0x68, val); if (rev_a0) { - print_debug("shit it is an old cup\n"); + print_spew("shit it is an old cup\n"); pci_write_config32(dev, 0x94, 0); pci_write_config32(dev, 0xb4, 0); pci_write_config32(dev, 0xd4, 0); } } -#if 1 - print_debug("done\r\n"); -#endif + print_spew("done\r\n"); } -static int apply_cpu_errata_fixes(unsigned cpus, int needs_reset) +static int apply_cpu_errata_fixes(unsigned nodes, int needs_reset) { unsigned node; - for(node = 0; node < cpus; node++) { + for(node = 0; node < nodes; node++) { device_t dev; uint32_t cmd; dev = NODE_MC(node); @@ -601,10 +592,10 @@ static int apply_cpu_errata_fixes(unsigned cpus, int needs_reset) return needs_reset; } -static int optimize_link_read_pointers(unsigned cpus, int needs_reset) +static int optimize_link_read_pointers(unsigned nodes, int needs_reset) { unsigned node; - for(node = 0; node < cpus; node = node + 1) { + for(node = 0; node < nodes; node = node + 1) { device_t f0_dev, f3_dev; uint32_t cmd_ref, cmd; int link; @@ -619,7 +610,8 @@ static int optimize_link_read_pointers(unsigned cpus, int needs_reset) if (link_type & LinkConnected) { cmd &= 0xff << (link *8); /* FIXME this assumes the device on the other - * side is an AMD device */ + * side is an AMD device + */ cmd |= 0x25 << (link *8); } } @@ -634,23 +626,24 @@ static int optimize_link_read_pointers(unsigned cpus, int needs_reset) static int setup_coherent_ht_domain(void) { struct setup_smp_result result; - result.cpus = 1; + result.nodes = 1; result.needs_reset = 0; enable_bsp_routing(); -#if CONFIG_MAX_CPUS == 1 - setup_uniprocessor(); -#else +#if CONFIG_MAX_CPUS > 1 result = setup_smp(); - result.cpus = verify_mp_capabilities(result.cpus); #endif - - coherent_ht_finalize(result.cpus); - result.needs_reset = apply_cpu_errata_fixes(result.cpus, result.needs_reset); + result.nodes = verify_mp_capabilities(result.nodes); + clear_dead_routes(result.nodes); + if (result.nodes == 1) { + setup_uniprocessor(); + } + coherent_ht_finalize(result.nodes); + result.needs_reset = apply_cpu_errata_fixes(result.nodes, result.needs_reset); #if CONFIG_MAX_CPUS > 1 /* Why doesn't this work on the solo? */ - result.needs_reset = optimize_link_read_pointers(result.cpus, result.needs_reset); + result.needs_reset = optimize_link_read_pointers(result.nodes, result.needs_reset); #endif return result.needs_reset; diff --git a/src/northbridge/amd/amdk8/incoherent_ht.c b/src/northbridge/amd/amdk8/incoherent_ht.c index c8e0770534..55b37cc4a8 100644 --- a/src/northbridge/amd/amdk8/incoherent_ht.c +++ b/src/northbridge/amd/amdk8/incoherent_ht.c @@ -12,7 +12,8 @@ static unsigned ht_lookup_slave_capability(device_t dev) hdr_type &= 0x7f; if ((hdr_type == PCI_HEADER_TYPE_NORMAL) || - (hdr_type == PCI_HEADER_TYPE_BRIDGE)) { + (hdr_type == PCI_HEADER_TYPE_BRIDGE)) + { pos = PCI_CAPABILITY_LIST; } if (pos > PCI_CAP_LIST_NEXT) { @@ -48,7 +49,8 @@ static void ht_collapse_previous_enumeration(unsigned bus) id = pci_read_config32(dev, PCI_VENDOR_ID); if ((id == 0xffffffff) || (id == 0x00000000) || - (id == 0x0000ffff) || (id == 0xffff0000)) { + (id == 0x0000ffff) || (id == 0xffff0000)) + { continue; } @@ -90,7 +92,7 @@ static unsigned ht_read_freq_cap(device_t dev, unsigned pos) return freq_cap; } -#define LINK_OFFS(WIDTH,FREQ,FREQ_CAP) \ +#define LINK_OFFS(WIDTH,FREQ,FREQ_CAP) \ (((WIDTH & 0xff) << 16) | ((FREQ & 0xff) << 8) | (FREQ_CAP & 0xFF)) #define LINK_WIDTH(OFFS) ((OFFS >> 16) & 0xFF) @@ -212,8 +214,8 @@ static int ht_setup_chain(device_t udev, unsigned upos) id = pci_read_config32(dev, PCI_VENDOR_ID); /* If the chain is enumerated quit */ if (((id & 0xffff) == 0x0000) || ((id & 0xffff) == 0xffff) || - (((id >> 16) & 0xffff) == 0xffff) || - (((id >> 16) & 0xffff) == 0x0000)) { + (((id >> 16) & 0xffff) == 0xffff) || + (((id >> 16) & 0xffff) == 0x0000)) { break; } diff --git a/src/pc80/i8259.c b/src/pc80/i8259.c index cd3ef0bbcc..8ebcd27dd1 100644 --- a/src/pc80/i8259.c +++ b/src/pc80/i8259.c @@ -1,6 +1,3 @@ - - - #include <arch/io.h> /* code taken from: ! diff --git a/src/pc80/keyboard.c b/src/pc80/keyboard.c index 331f5ab345..d293f714de 100644 --- a/src/pc80/keyboard.c +++ b/src/pc80/keyboard.c @@ -5,7 +5,7 @@ /* much better keyboard init courtesy ollie@sis.com.tw TODO: Typematic Setting, the keyboard is too slow for me */ -void pc_keyboard_init(struct pc_keyboard *keyboard) +static void pc_keyboard_init(struct pc_keyboard *keyboard) { volatile unsigned char regval; diff --git a/src/ram/ramtest.c b/src/ram/ramtest.c index d2c750eec6..2ae5303e8e 100644 --- a/src/ram/ramtest.c +++ b/src/ram/ramtest.c @@ -38,7 +38,7 @@ static void ram_fill(unsigned long start, unsigned long stop) /* Display address being filled */ if (!(addr & 0xffff)) { print_debug_hex32(addr); - print_debug("\r"); + print_debug(" \r"); } write_phys(addr, addr); }; @@ -50,6 +50,7 @@ static void ram_fill(unsigned long start, unsigned long stop) static void ram_verify(unsigned long start, unsigned long stop) { unsigned long addr; + int i = 0; /* * Verify. */ @@ -63,7 +64,7 @@ static void ram_verify(unsigned long start, unsigned long stop) /* Display address being tested */ if (!(addr & 0xffff)) { print_debug_hex32(addr); - print_debug("\r"); + print_debug(" \r"); } value = read_phys(addr); if (value != addr) { @@ -72,6 +73,8 @@ static void ram_verify(unsigned long start, unsigned long stop) print_err_char(':'); print_err_hex32(value); print_err("\r\n"); + i++; + if(i>256) break; } } /* Display final address */ diff --git a/src/southbridge/amd/amd8111/Config.lb b/src/southbridge/amd/amd8111/Config.lb index 584b15ecd4..9b53c26da4 100644 --- a/src/southbridge/amd/amd8111/Config.lb +++ b/src/southbridge/amd/amd8111/Config.lb @@ -8,4 +8,5 @@ driver amd8111_acpi.o #driver amd8111_ac97.o #driver amd8111_nic.o driver amd8111_pci.o +driver amd8111_smbus.o object amd8111_reset.o diff --git a/src/southbridge/amd/amd8111/amd8111_usb.c b/src/southbridge/amd/amd8111/amd8111_usb.c index f1ff4b1e4e..5a01a97c58 100644 --- a/src/southbridge/amd/amd8111/amd8111_usb.c +++ b/src/southbridge/amd/amd8111/amd8111_usb.c @@ -19,7 +19,8 @@ static void lpci_set_subsystem(device_t dev, unsigned vendor, unsigned device) static struct pci_operations lops_pci = { .set_subsystem = lpci_set_subsystem, }; -static struct device_operations smbus_ops = { + +static struct device_operations usb_ops = { .read_resources = pci_dev_read_resources, .set_resources = pci_dev_set_resources, .enable_resources = pci_dev_enable_resources, @@ -29,8 +30,8 @@ static struct device_operations smbus_ops = { .ops_pci = &lops_pci, }; -static struct pci_driver smbus_driver __pci_driver = { - .ops = &smbus_ops, +static struct pci_driver usb_driver __pci_driver = { + .ops = &usb_ops, .vendor = PCI_VENDOR_ID_AMD, .device = PCI_DEVICE_ID_AMD_8111_USB, }; diff --git a/src/superio/NSC/pc97307/chip.h b/src/superio/NSC/pc97307/chip.h index 369c47a44b..63db6ba168 100644 --- a/src/superio/NSC/pc97307/chip.h +++ b/src/superio/NSC/pc97307/chip.h @@ -14,7 +14,7 @@ #define SIO_COM2_BASE 0x2F8 #endif -extern struct chip_operations superio_NSC_pc97307_control; +extern struct chip_operations superio_NSC_pc97307_ops; #include <pc80/keyboard.h> #include <uart8250.h> diff --git a/src/superio/NSC/pc97307/superio.c b/src/superio/NSC/pc97307/superio.c index 2f06b766e0..ebe5d36ee2 100644 --- a/src/superio/NSC/pc97307/superio.c +++ b/src/superio/NSC/pc97307/superio.c @@ -72,7 +72,7 @@ static struct pnp_info pnp_dev_info[] = { static void enable_dev(struct device *dev) { - pnp_enable_devices(dev, &pnp_ops, + pnp_enable_devices(dev, &ops, sizeof(pnp_dev_info)/sizeof(pnp_dev_info[0]), pnp_dev_info); } diff --git a/src/superio/winbond/w83627hf/superio.c b/src/superio/winbond/w83627hf/superio.c index 79d0bf0af2..f4315b3008 100644 --- a/src/superio/winbond/w83627hf/superio.c +++ b/src/superio/winbond/w83627hf/superio.c @@ -211,7 +211,7 @@ static struct pnp_info pnp_dev_info[] = { static void enable_dev(struct device *dev) { - pnp_enable_devices(dev, &pnp_ops, + pnp_enable_devices(dev, &ops, sizeof(pnp_dev_info)/sizeof(pnp_dev_info[0]), pnp_dev_info); } diff --git a/src/superio/winbond/w83627thf/superio.c b/src/superio/winbond/w83627thf/superio.c index 7cefff4260..4d4a120606 100644 --- a/src/superio/winbond/w83627thf/superio.c +++ b/src/superio/winbond/w83627thf/superio.c @@ -100,7 +100,7 @@ static struct pnp_info pnp_dev_info[] = { static void enable_dev(device_t dev) { - pnp_enable_devices(dev, &pnp_ops, + pnp_enable_devices(dev, &ops, sizeof(pnp_dev_info)/sizeof(pnp_dev_info[0]), pnp_dev_info); } |