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-rw-r--r--src/drivers/intel/fsp2_0/Kconfig4
-rw-r--r--src/mainboard/intel/galileo/Kconfig3
-rw-r--r--src/soc/intel/apollolake/Kconfig2
-rw-r--r--src/soc/intel/cannonlake/Kconfig1
-rw-r--r--src/soc/intel/denverton_ns/Kconfig3
-rw-r--r--src/soc/intel/skylake/Kconfig1
6 files changed, 10 insertions, 4 deletions
diff --git a/src/drivers/intel/fsp2_0/Kconfig b/src/drivers/intel/fsp2_0/Kconfig
index 864b3a1a2d..7f3d165547 100644
--- a/src/drivers/intel/fsp2_0/Kconfig
+++ b/src/drivers/intel/fsp2_0/Kconfig
@@ -1,7 +1,7 @@
#
# This file is part of the coreboot project.
#
-# Copyright (C) 2015-2016 Intel Corp.
+# Copyright (C) 2015-2018 Intel Corp.
#
# This program is free software; you can redistribute it and/or modify
# it under the terms of the GNU General Public License as published by
@@ -15,7 +15,7 @@
config PLATFORM_USES_FSP2_0
bool
- select UDK_2015_BINDING
+ default n
help
Include FSP 2.0 wrappers and functionality
diff --git a/src/mainboard/intel/galileo/Kconfig b/src/mainboard/intel/galileo/Kconfig
index 12cbb6c849..edea30f30f 100644
--- a/src/mainboard/intel/galileo/Kconfig
+++ b/src/mainboard/intel/galileo/Kconfig
@@ -1,7 +1,7 @@
##
## This file is part of the coreboot project.
##
-## Copyright (C) 2015-2017 Intel Corp.
+## Copyright (C) 2015-2018 Intel Corp.
##
## This program is free software; you can redistribute it and/or modify
## it under the terms of the GNU General Public License as published by
@@ -58,6 +58,7 @@ config FSP_VERSION_1_1
config FSP_VERSION_2_0
bool "FSP 2.0"
select PLATFORM_USES_FSP2_0
+ select UDK_2015_BINDING
select POSTCAR_STAGE
help
Use FSP 2.0 binary
diff --git a/src/soc/intel/apollolake/Kconfig b/src/soc/intel/apollolake/Kconfig
index bd6f645c79..b7f2dc92c4 100644
--- a/src/soc/intel/apollolake/Kconfig
+++ b/src/soc/intel/apollolake/Kconfig
@@ -98,6 +98,8 @@ config CPU_SPECIFIC_OPTIONS
select TSC_MONOTONIC_TIMER
select HAVE_MONOTONIC_TIMER
select PLATFORM_USES_FSP2_0
+ select UDK_2015_BINDING if !SOC_INTEL_GLK
+ select UDK_2017_BINDING if SOC_INTEL_GLK
select HAVE_HARD_RESET
select INTEL_GMA_ADD_VBT_DATA_FILE if RUN_FSP_GOP
select HAVE_FSP_GOP
diff --git a/src/soc/intel/cannonlake/Kconfig b/src/soc/intel/cannonlake/Kconfig
index 8eee6f4fdd..a131ad4547 100644
--- a/src/soc/intel/cannonlake/Kconfig
+++ b/src/soc/intel/cannonlake/Kconfig
@@ -75,6 +75,7 @@ config CPU_SPECIFIC_OPTIONS
select TSC_CONSTANT_RATE
select TSC_MONOTONIC_TIMER
select UDELAY_TSC
+ select UDK_2017_BINDING
config UART_DEBUG
bool "Enable UART debug port."
diff --git a/src/soc/intel/denverton_ns/Kconfig b/src/soc/intel/denverton_ns/Kconfig
index cb13f3f56b..8d9a55002f 100644
--- a/src/soc/intel/denverton_ns/Kconfig
+++ b/src/soc/intel/denverton_ns/Kconfig
@@ -1,7 +1,7 @@
##
## This file is part of the coreboot project.
##
-## Copyright (C) 2014 - 2017 Intel Corporation.
+## Copyright (C) 2014 - 2018 Intel Corporation.
##
## This program is free software; you can redistribute it and/or modify
## it under the terms of the GNU General Public License as published by
@@ -50,6 +50,7 @@ config CPU_SPECIFIC_OPTIONS
select TSC_MONOTONIC_TIMER
select TSC_SYNC_MFENCE
select UDELAY_TSC
+ select UDK_2015_BINDING
config FSP_T_ADDR
hex "Intel FSP-T (temp ram init) binary location"
diff --git a/src/soc/intel/skylake/Kconfig b/src/soc/intel/skylake/Kconfig
index 794b8e946f..a486bd6574 100644
--- a/src/soc/intel/skylake/Kconfig
+++ b/src/soc/intel/skylake/Kconfig
@@ -104,6 +104,7 @@ config USE_FSP2_0_DRIVER
def_bool y
depends on MAINBOARD_USES_FSP2_0
select PLATFORM_USES_FSP2_0
+ select UDK_2015_BINDING
select INTEL_GMA_ADD_VBT_DATA_FILE if RUN_FSP_GOP
select POSTCAR_CONSOLE
select POSTCAR_STAGE