diff options
Diffstat (limited to 'src')
| -rw-r--r-- | src/soc/amd/picasso/Kconfig | 22 | ||||
| -rw-r--r-- | src/soc/amd/picasso/Makefile.inc | 32 |
2 files changed, 32 insertions, 22 deletions
diff --git a/src/soc/amd/picasso/Kconfig b/src/soc/amd/picasso/Kconfig index 2578b468aa..ce1f0743f5 100644 --- a/src/soc/amd/picasso/Kconfig +++ b/src/soc/amd/picasso/Kconfig @@ -51,6 +51,7 @@ config CPU_SPECIFIC_OPTIONS select PLATFORM_USES_FSP2_0 select FSP_USES_CB_STACK select UDK_2017_BINDING + select CACHE_MRC_SETTINGS select HAVE_CF9_RESET config PRERAM_CBMEM_CONSOLE_SIZE @@ -289,24 +290,23 @@ config AMD_PUBKEY_FILE string default "3rdparty/amd_blobs/picasso/PSP/AmdPubKeyRV.bin" -config PSP_APOB_DESTINATION +config PSP_APOB_DRAM_ADDRESS hex default 0x9f00000 help Location in DRAM where the PSP will copy the AGESA PSP Output Block. -config PSP_APOB_NV_ADDRESS - hex "Base address of APOB NV" - help - Location in flash where the PSP can find the S3 restore information. - Place this on a boundary that the flash device can erase. - -config PSP_APOB_NV_SIZE - hex "Size of APOB NV to be reserved" +# This value is currently the same as the default defined in +# drivers/mrc_cache/Kconfig. We do this in in case the default +# changes. The PSP requires this value to be 64KiB. +config MRC_SETTINGS_CACHE_SIZE + hex + default 0x10000 help - Size of the S3 restore information. Make this a multiple of the - size the flash device can erase. + Size of flash area used to save APOB NV data which occupies the + RW_MRC_CACHE region. Make this granularity the flash device can + erase. config USE_PSPSCUREOS bool diff --git a/src/soc/amd/picasso/Makefile.inc b/src/soc/amd/picasso/Makefile.inc index ed94cfb63a..e1416bcddd 100644 --- a/src/soc/amd/picasso/Makefile.inc +++ b/src/soc/amd/picasso/Makefile.inc @@ -181,7 +181,7 @@ endif PSP_APCB_FILES=$(foreach f, $(APCB_SOURCES), $(obj)/APCB_$(f).bin) # type = 0x61 -PSP_APOB_BASE=$(CONFIG_PSP_APOB_DESTINATION) +PSP_APOB_BASE=$(CONFIG_PSP_APOB_DRAM_ADDRESS) # type = 0x62 PSP_BIOSBIN_FILE=$(obj)/amd_biospsp.img @@ -192,11 +192,18 @@ PSP_BIOSBIN_SIZE=$(CONFIG_C_ENV_BOOTBLOCK_SIZE) # This address must match the BOOTBLOCK logic in arch/x86/memlayout.ld. PSP_BIOSBIN_DEST=$(shell printf "%x" $(call int-subtract, $(call int-add, $(CONFIG_X86_RESET_VECTOR) 0x10) $(PSP_BIOSBIN_SIZE))) -# type = 0x63 -ifeq ($(CONFIG_HAVE_ACPI_RESUME),y) -PSP_APOBNV_BASE=$(CONFIG_PSP_APOB_NV_ADDRESS) -PSP_APOBNV_SIZE=$(CONFIG_PSP_APOB_NV_SIZE) -endif +# type = 0x63 - construct APOB NV base/size from flash map +# TODO(b/157068645): Add ability to fmaptool to extract offsets and sizes +# This code currently assumes the following FMAP structure. If +# the UNIFIED_MRC_CACHE region is present, it must have a 0 offset. +# FLASH@* { +# BIOS@* { +# RW_MRC_CACHE@* { +_FLASH_BASE=$(call int-subtract, 0x100000000 $(CONFIG_ROM_SIZE)) +_GET_FLASH_BASE=grep "FLASH" | sed 's/.*FLASH@//' | sed 's/ .*//' +_GET_BIOS_REG_BASE=grep "BIOS" | sed 's/.*BIOS@//' | sed 's/ .*//' +_GET_APOBNV_BASE=grep "RW_MRC_CACHE" | sed 's/.*@//' | sed 's/ .*//' +_GET_APOBNV_SIZE=grep "RW_MRC_CACHE" | sed 's/.*@//' | sed 's/.* //' # type2 = 0x64, 0x65 PSP_PMUI_FILE1=$(top)/$(FIRMWARE_LOCATE)/Appb_Rv_1D_Ddr4_Udimm_Imem.csbin @@ -264,8 +271,6 @@ OPT_APOB_ADDR=$(call add_opt_prefix, $(PSP_APOB_BASE), --apob-base) OPT_PSP_BIOSBIN_FILE=$(call add_opt_prefix, $(PSP_BIOSBIN_FILE), --bios-bin) OPT_PSP_BIOSBIN_DEST=$(call add_opt_prefix, $(PSP_BIOSBIN_DEST), --bios-bin-dest) OPT_PSP_BIOSBIN_SIZE=$(call add_opt_prefix, $(PSP_BIOSBIN_SIZE), --bios-uncomp-size) -OPT_APOBNV_ADDR=$(call add_opt_prefix, $(PSP_APOBNV_BASE), --apob-nv-base) -OPT_APOBNV_SIZE=$(call add_opt_prefix, $(PSP_APOBNV_SIZE), --apob-nv-size) OPT_PSP_PMUI_FILE1=$(call add_opt_prefix, $(PSP_PMUI_FILE1), --subprogram 0 --instance 1 --pmu-inst) OPT_PSP_PMUI_FILE2=$(call add_opt_prefix, $(PSP_PMUI_FILE2), --subprogram 0 --instance 4 --pmu-inst) OPT_PSP_PMUI_FILE3=$(call add_opt_prefix, $(PSP_PMUI_FILE3), --subprogram 1 --instance 1 --pmu-inst) @@ -359,7 +364,8 @@ $(obj)/amdfw.rom: $(call strip_quotes, $(CONFIG_AMD_PUBKEY_FILE)) \ $(call_strip_quotes, $(PSP_IKEK_FILE)) \ $(call_strip_quotes, $(PSP_SEC_DEBUG_FILE)) \ $$(PSP_APCB_FILES) \ - $(AMDFWTOOL) + $(AMDFWTOOL) \ + $(obj)/fmap.fmd rm -f $@ @printf " AMDFWTOOL $(subst $(obj)/,,$(@))\n" $(AMDFWTOOL) \ @@ -373,8 +379,12 @@ $(obj)/amdfw.rom: $(call strip_quotes, $(CONFIG_AMD_PUBKEY_FILE)) \ $(OPT_SMUFW2_SUB1_FILE) \ $(OPT_PSP_APCB_FILES) \ $(OPT_APOB_ADDR) \ - $(OPT_APOBNV_ADDR) \ - $(OPT_APOBNV_SIZE) \ + --apob-nv-size $(shell printf "0x%x" \ + $(shell cat $(obj)/fmap.fmd | $(_GET_APOBNV_SIZE))) \ + --apob-nv-base $(shell printf "0x%x" $(call int-add, \ + $(shell cat $(obj)/fmap.fmd | $(_GET_FLASH_BASE)) \ + $(shell cat $(obj)/fmap.fmd | $(_GET_BIOS_REG_BASE)) \ + $(shell cat $(obj)/fmap.fmd | $(_GET_APOBNV_BASE)))) \ $(OPT_PSP_BIOSBIN_FILE) \ $(OPT_PSP_BIOSBIN_DEST) \ $(OPT_PSP_BIOSBIN_SIZE) \ |