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-rw-r--r--src/soc/amd/common/block/spi/fch_spi.c16
-rw-r--r--src/soc/amd/stoneyridge/southbridge.c17
2 files changed, 12 insertions, 21 deletions
diff --git a/src/soc/amd/common/block/spi/fch_spi.c b/src/soc/amd/common/block/spi/fch_spi.c
index 175be794ad..c39147a8b3 100644
--- a/src/soc/amd/common/block/spi/fch_spi.c
+++ b/src/soc/amd/common/block/spi/fch_spi.c
@@ -10,26 +10,22 @@
static void fch_spi_set_spi100(int norm, int fast, int alt, int tpm)
{
- uintptr_t base = spi_get_bar();
-
- write16((void *)(base + SPI100_SPEED_CONFIG), SPI_SPEED_CFG(norm, fast, alt, tpm));
- write16((void *)(base + SPI100_ENABLE), SPI_USE_SPI100);
+ spi_write16(SPI100_SPEED_CONFIG, SPI_SPEED_CFG(norm, fast, alt, tpm));
+ spi_write16(SPI100_ENABLE, SPI_USE_SPI100);
}
static void fch_spi_disable_4dw_burst(void)
{
- uintptr_t base = spi_get_bar();
- uint16_t val = read16((void *)(base + SPI100_HOST_PREF_CONFIG));
+ uint16_t val = spi_read16(SPI100_HOST_PREF_CONFIG);
- write16((void *)(base + SPI100_HOST_PREF_CONFIG), val & ~SPI_RD4DW_EN_HOST);
+ spi_write16(SPI100_HOST_PREF_CONFIG, val & ~SPI_RD4DW_EN_HOST);
}
static void fch_spi_set_read_mode(u32 mode)
{
- uintptr_t base = spi_get_bar();
- uint32_t val = read32((void *)(base + SPI_CNTRL0)) & ~SPI_READ_MODE_MASK;
+ uint32_t val = spi_read32(SPI_CNTRL0) & ~SPI_READ_MODE_MASK;
- write32((void *)(base + SPI_CNTRL0), val | SPI_READ_MODE(mode));
+ spi_write32(SPI_CNTRL0, val | SPI_READ_MODE(mode));
}
static void fch_spi_config_mb_modes(void)
diff --git a/src/soc/amd/stoneyridge/southbridge.c b/src/soc/amd/stoneyridge/southbridge.c
index 534f33d46c..628aea993b 100644
--- a/src/soc/amd/stoneyridge/southbridge.c
+++ b/src/soc/amd/stoneyridge/southbridge.c
@@ -267,29 +267,24 @@ static void sb_init_spi_base(void)
void sb_set_spi100(u16 norm, u16 fast, u16 alt, u16 tpm)
{
- uintptr_t base = spi_get_bar();
- write16((void *)(base + SPI100_SPEED_CONFIG),
+ spi_write16(SPI100_SPEED_CONFIG,
(norm << SPI_NORM_SPEED_NEW_SH) |
(fast << SPI_FAST_SPEED_NEW_SH) |
(alt << SPI_ALT_SPEED_NEW_SH) |
(tpm << SPI_TPM_SPEED_NEW_SH));
- write16((void *)(base + SPI100_ENABLE), SPI_USE_SPI100);
+ spi_write16(SPI100_ENABLE, SPI_USE_SPI100);
}
void sb_disable_4dw_burst(void)
{
- uintptr_t base = spi_get_bar();
- write16((void *)(base + SPI100_HOST_PREF_CONFIG),
- read16((void *)(base + SPI100_HOST_PREF_CONFIG))
- & ~SPI_RD4DW_EN_HOST);
+ spi_write16(SPI100_HOST_PREF_CONFIG,
+ spi_read16(SPI100_HOST_PREF_CONFIG) & ~SPI_RD4DW_EN_HOST);
}
void sb_read_mode(u32 mode)
{
- uintptr_t base = spi_get_bar();
- write32((void *)(base + SPI_CNTRL0),
- (read32((void *)(base + SPI_CNTRL0))
- & ~SPI_READ_MODE_MASK) | mode);
+ spi_write32(SPI_CNTRL0,
+ (spi_read32(SPI_CNTRL0) & ~SPI_READ_MODE_MASK) | mode);
}
static void setup_spread_spectrum(int *reboot)