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-rw-r--r--src/mainboard/intel/minnowmax/devicetree.cb50
1 files changed, 25 insertions, 25 deletions
diff --git a/src/mainboard/intel/minnowmax/devicetree.cb b/src/mainboard/intel/minnowmax/devicetree.cb
index 72849d6dfd..6e456cb1e6 100644
--- a/src/mainboard/intel/minnowmax/devicetree.cb
+++ b/src/mainboard/intel/minnowmax/devicetree.cb
@@ -21,8 +21,8 @@
chip soc/intel/fsp_baytrail
#### ACPI Register Settings ####
- register "fadt_pm_profile" = "PM_UNSPECIFIED"
- register "fadt_boot_arch" = "ACPI_FADT_LEGACY_FREE"
+ register "fadt_pm_profile" = "PM_UNSPECIFIED"
+ register "fadt_boot_arch" = "ACPI_FADT_LEGACY_FREE"
#### FSP register settings ####
register "PcdSataMode" = "SATA_MODE_AHCI"
@@ -34,25 +34,25 @@ chip soc/intel/fsp_baytrail
register "PcdApertureSize" = "APERTURE_SIZE_DEFAULT"
register "PcdGttSize" = "GTT_SIZE_DEFAULT"
register "PcdLpssSioEnablePciMode" = "LPSS_PCI_MODE_DEFAULT"
- register "AzaliaAutoEnable" = "AZALIA_FOLLOWS_DEVICETREE"
- register "LpeAcpiModeEnable" = "LPE_ACPI_MODE_DISABLED"
- register "IgdRenderStandby" = "IGD_RENDER_STANDBY_ENABLE"
- register "EnableMemoryDown" = "MEMORY_DOWN_ENABLE"
- register "DRAMSpeed" = "DRAM_SPEED_1066MHZ"
- register "DRAMType" = "DRAM_TYPE_DDR3L"
- register "DIMM0Enable" = "DIMM0_ENABLE"
- register "DIMM1Enable" = "DIMM1_DISABLE"
- register "DIMMDWidth" = "DIMM_DWIDTH_X16"
- register "DIMMDensity" = "DIMM_DENSITY_2G_BIT"
- register "DIMMBusWidth" = "DIMM_BUS_WIDTH_64BIT"
- register "DIMMSides" = "DIMM_SIDES_1RANK"
- register "DIMMtCL" = "11"
- register "DIMMtRPtRCD" = "11"
- register "DIMMtWR" = "12"
- register "DIMMtWTR" = "6"
- register "DIMMtRRD" = "6"
- register "DIMMtRTP" = "6"
- register "DIMMtFAW" = "20"
+ register "AzaliaAutoEnable" = "AZALIA_FOLLOWS_DEVICETREE"
+ register "LpeAcpiModeEnable" = "LPE_ACPI_MODE_DISABLED"
+ register "IgdRenderStandby" = "IGD_RENDER_STANDBY_ENABLE"
+ register "EnableMemoryDown" = "MEMORY_DOWN_ENABLE"
+ register "DRAMSpeed" = "DRAM_SPEED_1066MHZ"
+ register "DRAMType" = "DRAM_TYPE_DDR3L"
+ register "DIMM0Enable" = "DIMM0_ENABLE"
+ register "DIMM1Enable" = "DIMM1_DISABLE"
+ register "DIMMDWidth" = "DIMM_DWIDTH_X16"
+ register "DIMMDensity" = "DIMM_DENSITY_2G_BIT" # Setting for 1GB board - modified runtime for 2GB board in romstage.c to DIMM_DENSITY_4G_BIT
+ register "DIMMBusWidth" = "DIMM_BUS_WIDTH_64BIT"
+ register "DIMMSides" = "DIMM_SIDES_1RANK"
+ register "DIMMtCL" = "11"
+ register "DIMMtRPtRCD" = "11"
+ register "DIMMtWR" = "12"
+ register "DIMMtWTR" = "6"
+ register "DIMMtRRD" = "6"
+ register "DIMMtRTP" = "6"
+ register "DIMMtFAW" = "20"
device cpu_cluster 0 on
device lapic 0 on end
@@ -67,12 +67,12 @@ chip soc/intel/fsp_baytrail
device pci 11.0 off end # 8086 0F15 - SDIO Port -
device pci 12.0 on end # 8086 0F16 - SD Port MicroSD on SD3
device pci 13.0 on end # 8086 0F23 - SATA AHCI Onboard & HSEC
- device pci 14.0 on end # 8086 0F35 - USB XHCI Onboard & HSEC
+ device pci 14.0 on end # 8086 0F35 - USB XHCI - Onboard & HSEC - Enabling both EHCI and XHCI will default to EHCI if not changed at runtime
device pci 15.0 on end # 8086 0F28 - LP Engine Audio LSEC
device pci 17.0 off end # 8086 0F50 - MMC Port -
device pci 18.0 on end # 8086 0F40 - SIO - DMA -
device pci 18.1 off end # 8086 0F41 - I2C Port 1 (0) -
- device pci 18.2 off end # 8086 0F42 - I2C Port 2 (1) - (testpoints)
+ device pci 18.2 on end # 8086 0F42 - I2C Port 2 (1) - (testpoints)
device pci 18.3 off end # 8086 0F43 - I2C Port 3 (2) -
device pci 18.4 off end # 8086 0F44 - I2C Port 4 (3) -
device pci 18.5 off end # 8086 0F45 - I2C Port 5 (4) -
@@ -80,11 +80,11 @@ chip soc/intel/fsp_baytrail
device pci 18.7 on end # 8086 0F47 - I2C Port 7 (6) HSEC
device pci 1a.0 on end # 8086 0F18 - TXE -
device pci 1b.0 off end # 8086 0F04 - HD Audio -
- device pci 1c.0 off end # 8086 0F48 - PCIe Port 1 (0) -
+ device pci 1c.0 on end # 8086 0F48 - PCIe Port 1 (0) -
device pci 1c.1 off end # 8086 0F4A - PCIe Port 2 (1) -
device pci 1c.2 on end # 8086 0F4C - PCIe Port 3 (2) Onboard GBE
device pci 1c.3 on end # 8086 0F4E - PCIe Port 4 (3) HSEC
- device pci 1d.0 off end # 8086 0F34 - USB EHCI -
+ device pci 1d.0 on end # 8086 0F34 - USB EHCI - Enabling both EHCI and XHCI will default to EHCI if not changed at runtime
device pci 1e.0 on end # 8086 0F06 - SIO - DMA -
device pci 1e.1 on end # 8086 0F08 - PWM 1 LSEC
device pci 1e.2 on end # 8086 0F09 - PWM 2 LSEC