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-rw-r--r--src/northbridge/intel/i945/memmap.c9
1 files changed, 3 insertions, 6 deletions
diff --git a/src/northbridge/intel/i945/memmap.c b/src/northbridge/intel/i945/memmap.c
index ee9f100fee..0183ea2b3f 100644
--- a/src/northbridge/intel/i945/memmap.c
+++ b/src/northbridge/intel/i945/memmap.c
@@ -65,11 +65,10 @@ void *cbmem_top_chipset(void)
return (void *) top_of_ram;
}
-/** Decodes used Graphics Mode Select (GMS) to kilobytes. */
+/* Decodes used Graphics Mode Select (GMS) to kilobytes. */
u32 decode_igd_memory_size(const u32 gms)
{
- static const u16 ggc2uma[] = { 0, 1, 4, 8, 16, 32,
- 48, 64 };
+ static const u16 ggc2uma[] = { 0, 1, 4, 8, 16, 32, 48, 64 };
if (gms >= ARRAY_SIZE(ggc2uma))
die("Bad Graphics Mode Select (GMS) setting.\n");
@@ -91,9 +90,7 @@ void fill_postcar_frame(struct postcar_frame *pcf)
* RAM to cover both cbmem as the TSEG region.
*/
top_of_ram = (uintptr_t)cbmem_top();
- postcar_frame_add_mtrr(pcf, top_of_ram - 8*MiB, 8*MiB,
- MTRR_TYPE_WRBACK);
+ postcar_frame_add_mtrr(pcf, top_of_ram - 8*MiB, 8*MiB, MTRR_TYPE_WRBACK);
postcar_frame_add_mtrr(pcf, northbridge_get_tseg_base(),
northbridge_get_tseg_size(), MTRR_TYPE_WRBACK);
-
}