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-rw-r--r--src/soc/intel/baytrail/acpi/lpc.asl2
-rw-r--r--src/soc/intel/braswell/acpi/lpc.asl2
-rw-r--r--src/soc/intel/broadwell/acpi/lpc.asl8
-rw-r--r--src/soc/intel/fsp_baytrail/acpi/lpc.asl2
-rw-r--r--src/soc/intel/fsp_broadwell_de/acpi/lpc.asl2
-rw-r--r--src/southbridge/intel/bd82x6x/acpi/lpc.asl8
-rw-r--r--src/southbridge/intel/fsp_rangeley/acpi/lpc.asl8
-rw-r--r--src/southbridge/intel/i82801gx/acpi/lpc.asl8
-rw-r--r--src/southbridge/intel/i82801ix/acpi/lpc.asl8
-rw-r--r--src/southbridge/intel/i82801jx/acpi/lpc.asl8
-rw-r--r--src/southbridge/intel/lynxpoint/acpi/lpc.asl8
11 files changed, 32 insertions, 32 deletions
diff --git a/src/soc/intel/baytrail/acpi/lpc.asl b/src/soc/intel/baytrail/acpi/lpc.asl
index 00aac51e23..7cdf1aa5d0 100644
--- a/src/soc/intel/baytrail/acpi/lpc.asl
+++ b/src/soc/intel/baytrail/acpi/lpc.asl
@@ -59,7 +59,7 @@ Device (LPCB)
Name(_CRS, ResourceTemplate()
{
- Memory32Fixed(ReadOnly, 0xfed00000, 0x400)
+ Memory32Fixed(ReadOnly, CONFIG_HPET_ADDRESS, 0x400)
})
}
diff --git a/src/soc/intel/braswell/acpi/lpc.asl b/src/soc/intel/braswell/acpi/lpc.asl
index 9caa8f17eb..a8604d6c68 100644
--- a/src/soc/intel/braswell/acpi/lpc.asl
+++ b/src/soc/intel/braswell/acpi/lpc.asl
@@ -71,7 +71,7 @@ Device (LPCB)
Name(_CRS, ResourceTemplate()
{
- Memory32Fixed(ReadOnly, 0xfed00000, 0x400)
+ Memory32Fixed(ReadOnly, CONFIG_HPET_ADDRESS, 0x400)
})
}
#endif
diff --git a/src/soc/intel/broadwell/acpi/lpc.asl b/src/soc/intel/broadwell/acpi/lpc.asl
index 70dd6e5a26..ca44c5c90c 100644
--- a/src/soc/intel/broadwell/acpi/lpc.asl
+++ b/src/soc/intel/broadwell/acpi/lpc.asl
@@ -74,7 +74,7 @@ Device (LPCB)
Name (BUF0, ResourceTemplate()
{
- Memory32Fixed(ReadOnly, 0xfed00000, 0x400, FED0)
+ Memory32Fixed(ReadOnly, CONFIG_HPET_ADDRESS, 0x400, FED0)
})
Method (_STA, 0) // Device Status
@@ -99,15 +99,15 @@ Device (LPCB)
\_SB.PCI0.LPCB.HPET.FED0._BAS, HPT0)
If (Lequal(HPAS, 1)) {
- Store(0xfed01000, HPT0)
+ Add(CONFIG_HPET_ADDRESS, 0x1000, HPT0)
}
If (Lequal(HPAS, 2)) {
- Store(0xfed02000, HPT0)
+ Add(CONFIG_HPET_ADDRESS, 0x2000, HPT0)
}
If (Lequal(HPAS, 3)) {
- Store(0xfed03000, HPT0)
+ Add(CONFIG_HPET_ADDRESS, 0x3000, HPT0)
}
}
diff --git a/src/soc/intel/fsp_baytrail/acpi/lpc.asl b/src/soc/intel/fsp_baytrail/acpi/lpc.asl
index 00aac51e23..7cdf1aa5d0 100644
--- a/src/soc/intel/fsp_baytrail/acpi/lpc.asl
+++ b/src/soc/intel/fsp_baytrail/acpi/lpc.asl
@@ -59,7 +59,7 @@ Device (LPCB)
Name(_CRS, ResourceTemplate()
{
- Memory32Fixed(ReadOnly, 0xfed00000, 0x400)
+ Memory32Fixed(ReadOnly, CONFIG_HPET_ADDRESS, 0x400)
})
}
diff --git a/src/soc/intel/fsp_broadwell_de/acpi/lpc.asl b/src/soc/intel/fsp_broadwell_de/acpi/lpc.asl
index 6a7a2f132f..ef1e655100 100644
--- a/src/soc/intel/fsp_broadwell_de/acpi/lpc.asl
+++ b/src/soc/intel/fsp_broadwell_de/acpi/lpc.asl
@@ -44,7 +44,7 @@ Device (LPC0)
Name(_CRS, ResourceTemplate()
{
- Memory32Fixed(ReadOnly, 0xfed00000, 0x400)
+ Memory32Fixed(ReadOnly, CONFIG_HPET_ADDRESS, 0x400)
})
}
diff --git a/src/southbridge/intel/bd82x6x/acpi/lpc.asl b/src/southbridge/intel/bd82x6x/acpi/lpc.asl
index 5204b29d48..06c9ada15b 100644
--- a/src/southbridge/intel/bd82x6x/acpi/lpc.asl
+++ b/src/southbridge/intel/bd82x6x/acpi/lpc.asl
@@ -97,7 +97,7 @@ Device (LPCB)
Name(BUF0, ResourceTemplate()
{
- Memory32Fixed(ReadOnly, 0xfed00000, 0x400, FED0)
+ Memory32Fixed(ReadOnly, CONFIG_HPET_ADDRESS, 0x400, FED0)
})
Method (_STA, 0) // Device Status
@@ -120,15 +120,15 @@ Device (LPCB)
If (HPTE) {
CreateDWordField(BUF0, \_SB.PCI0.LPCB.HPET.FED0._BAS, HPT0)
If (Lequal(HPAS, 1)) {
- Store(0xfed01000, HPT0)
+ Add(CONFIG_HPET_ADDRESS, 0x1000, HPT0)
}
If (Lequal(HPAS, 2)) {
- Store(0xfed02000, HPT0)
+ Add(CONFIG_HPET_ADDRESS, 0x2000, HPT0)
}
If (Lequal(HPAS, 3)) {
- Store(0xfed03000, HPT0)
+ Add(CONFIG_HPET_ADDRESS, 0x3000, HPT0)
}
}
diff --git a/src/southbridge/intel/fsp_rangeley/acpi/lpc.asl b/src/southbridge/intel/fsp_rangeley/acpi/lpc.asl
index b53e98f6ce..a896dadc98 100644
--- a/src/southbridge/intel/fsp_rangeley/acpi/lpc.asl
+++ b/src/southbridge/intel/fsp_rangeley/acpi/lpc.asl
@@ -97,7 +97,7 @@ Device (LPCB)
Name(BUF0, ResourceTemplate()
{
- Memory32Fixed(ReadOnly, 0xfed00000, 0x400, FED0)
+ Memory32Fixed(ReadOnly, CONFIG_HPET_ADDRESS, 0x400, FED0)
})
Method (_STA, 0) // Device Status
@@ -120,15 +120,15 @@ Device (LPCB)
If (HPTE) {
CreateDWordField(BUF0, \_SB.PCI0.LPCB.HPET.FED0._BAS, HPT0)
If (Lequal(HPAS, 1)) {
- Store(0xfed01000, HPT0)
+ Add(CONFIG_HPET_ADDRESS, 0x1000, HPT0)
}
If (Lequal(HPAS, 2)) {
- Store(0xfed02000, HPT0)
+ Add(CONFIG_HPET_ADDRESS, 0x2000, HPT0)
}
If (Lequal(HPAS, 3)) {
- Store(0xfed03000, HPT0)
+ Add(CONFIG_HPET_ADDRESS, 0x3000, HPT0)
}
}
diff --git a/src/southbridge/intel/i82801gx/acpi/lpc.asl b/src/southbridge/intel/i82801gx/acpi/lpc.asl
index 87eab07288..d5201b2fff 100644
--- a/src/southbridge/intel/i82801gx/acpi/lpc.asl
+++ b/src/southbridge/intel/i82801gx/acpi/lpc.asl
@@ -79,7 +79,7 @@ Device (LPCB)
Name(BUF0, ResourceTemplate()
{
- Memory32Fixed(ReadOnly, 0xfed00000, 0x400, FED0)
+ Memory32Fixed(ReadOnly, CONFIG_HPET_ADDRESS, 0x400, FED0)
})
Method (_STA, 0) // Device Status
@@ -102,15 +102,15 @@ Device (LPCB)
If (HPTE) {
CreateDWordField(BUF0, \_SB.PCI0.LPCB.HPET.FED0._BAS, HPT0)
If (Lequal(HPAS, 1)) {
- Store(0xfed01000, HPT0)
+ Add(CONFIG_HPET_ADDRESS, 0x1000, HPT0)
}
If (Lequal(HPAS, 2)) {
- Store(0xfed02000, HPT0)
+ Add(CONFIG_HPET_ADDRESS, 0x2000, HPT0)
}
If (Lequal(HPAS, 3)) {
- Store(0xfed03000, HPT0)
+ Add(CONFIG_HPET_ADDRESS, 0x3000, HPT0)
}
}
diff --git a/src/southbridge/intel/i82801ix/acpi/lpc.asl b/src/southbridge/intel/i82801ix/acpi/lpc.asl
index 9d27b0b482..07ce43aa89 100644
--- a/src/southbridge/intel/i82801ix/acpi/lpc.asl
+++ b/src/southbridge/intel/i82801ix/acpi/lpc.asl
@@ -79,7 +79,7 @@ Device (LPCB)
Name(BUF0, ResourceTemplate()
{
- Memory32Fixed(ReadOnly, 0xfed00000, 0x400, FED0)
+ Memory32Fixed(ReadOnly, CONFIG_HPET_ADDRESS, 0x400, FED0)
})
Method (_STA, 0) // Device Status
@@ -102,15 +102,15 @@ Device (LPCB)
If (HPTE) {
CreateDWordField(BUF0, \_SB.PCI0.LPCB.HPET.FED0._BAS, HPT0)
If (Lequal(HPAS, 1)) {
- Store(0xfed01000, HPT0)
+ Add(CONFIG_HPET_ADDRESS, 0x1000, HPT0)
}
If (Lequal(HPAS, 2)) {
- Store(0xfed02000, HPT0)
+ Add(CONFIG_HPET_ADDRESS, 0x2000, HPT0)
}
If (Lequal(HPAS, 3)) {
- Store(0xfed03000, HPT0)
+ Add(CONFIG_HPET_ADDRESS, 0x3000, HPT0)
}
}
diff --git a/src/southbridge/intel/i82801jx/acpi/lpc.asl b/src/southbridge/intel/i82801jx/acpi/lpc.asl
index 1d9e54e237..7f16e08fae 100644
--- a/src/southbridge/intel/i82801jx/acpi/lpc.asl
+++ b/src/southbridge/intel/i82801jx/acpi/lpc.asl
@@ -79,7 +79,7 @@ Device (LPCB)
Name(BUF0, ResourceTemplate()
{
- Memory32Fixed(ReadOnly, 0xfed00000, 0x400, FED0)
+ Memory32Fixed(ReadOnly, CONFIG_HPET_ADDRESS, 0x400, FED0)
})
Method (_STA, 0) // Device Status
@@ -102,15 +102,15 @@ Device (LPCB)
If (HPTE) {
CreateDWordField(BUF0, \_SB.PCI0.LPCB.HPET.FED0._BAS, HPT0)
If (Lequal(HPAS, 1)) {
- Store(0xfed01000, HPT0)
+ Add(CONFIG_HPET_ADDRESS, 0x1000, HPT0)
}
If (Lequal(HPAS, 2)) {
- Store(0xfed02000, HPT0)
+ Add(CONFIG_HPET_ADDRESS, 0x2000, HPT0)
}
If (Lequal(HPAS, 3)) {
- Store(0xfed03000, HPT0)
+ Add(CONFIG_HPET_ADDRESS, 0x3000, HPT0)
}
}
diff --git a/src/southbridge/intel/lynxpoint/acpi/lpc.asl b/src/southbridge/intel/lynxpoint/acpi/lpc.asl
index b677e6a543..ddd5a2f53d 100644
--- a/src/southbridge/intel/lynxpoint/acpi/lpc.asl
+++ b/src/southbridge/intel/lynxpoint/acpi/lpc.asl
@@ -83,7 +83,7 @@ Device (LPCB)
Name(BUF0, ResourceTemplate()
{
- Memory32Fixed(ReadOnly, 0xfed00000, 0x400, FED0)
+ Memory32Fixed(ReadOnly, CONFIG_HPET_ADDRESS, 0x400, FED0)
})
Method (_STA, 0) // Device Status
@@ -106,15 +106,15 @@ Device (LPCB)
If (HPTE) {
CreateDWordField(BUF0, \_SB.PCI0.LPCB.HPET.FED0._BAS, HPT0)
If (Lequal(HPAS, 1)) {
- Store(0xfed01000, HPT0)
+ Add(CONFIG_HPET_ADDRESS, 0x1000, HPT0)
}
If (Lequal(HPAS, 2)) {
- Store(0xfed02000, HPT0)
+ Add(CONFIG_HPET_ADDRESS, 0x2000, HPT0)
}
If (Lequal(HPAS, 3)) {
- Store(0xfed03000, HPT0)
+ Add(CONFIG_HPET_ADDRESS, 0x3000, HPT0)
}
}
generated by cgit v1.2.3 (git 2.25.1) at 2024-10-31 04:03:07 +0000