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-rw-r--r--src/mainboard/siemens/mc_apl1/variants/mc_apl3/mainboard.c7
1 files changed, 3 insertions, 4 deletions
diff --git a/src/mainboard/siemens/mc_apl1/variants/mc_apl3/mainboard.c b/src/mainboard/siemens/mc_apl1/variants/mc_apl3/mainboard.c
index ccf3ab8ec1..ade923a65e 100644
--- a/src/mainboard/siemens/mc_apl1/variants/mc_apl3/mainboard.c
+++ b/src/mainboard/siemens/mc_apl1/variants/mc_apl3/mainboard.c
@@ -32,11 +32,10 @@ void variant_mainboard_final(void)
{
struct device *dev = NULL;
- /*
- * PIR6 register mapping for PCIe root ports
- * INTA#->PIRQB#, INTB#->PIRQC#, INTC#->PIRQD#, INTD#-> PIRQA#
+ /* PIR6 register mapping for PCIe root ports
+ * INTA#->PIRQD#, INTB#->PIRQA#, INTC#->PIRQB#, INTD#-> PIRQC#
*/
- pcr_write16(PID_ITSS, 0x314c, 0x0321);
+ pcr_write16(PID_ITSS, 0x314c, 0x2103);
/* Disable clock outputs 1-5 (CLKOUT) for XIO2001 PCIe to PCI Bridge. */
dev = dev_find_device(PCI_VENDOR_ID_TI, PCI_DEVICE_ID_TI_XIO2001, 0);