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-rw-r--r--src/Kconfig11
-rw-r--r--src/device/Kconfig11
-rw-r--r--src/northbridge/amd/amdfam10/Kconfig2
-rw-r--r--src/northbridge/amd/amdht/h3finit.c4
4 files changed, 6 insertions, 22 deletions
diff --git a/src/Kconfig b/src/Kconfig
index 9c01687249..2c75750ecc 100644
--- a/src/Kconfig
+++ b/src/Kconfig
@@ -22,14 +22,6 @@ mainmenu "coreboot configuration"
menu "General setup"
-config EXPERT
- bool "Expert mode"
- help
- This allows you to select certain advanced configuration options.
-
- Warning: Only enable this option if you really know what you are
- doing! You have been warned!
-
config LOCALVERSION
string "Local version string"
help
@@ -111,7 +103,6 @@ config CCACHE
config FMD_GENPARSER
bool "Generate flashmap descriptor parser using flex and bison"
default n
- depends on EXPERT
help
Enable this option if you are working on the flashmap descriptor
parser and made changes to fmd_scanner.l or fmd_parser.y.
@@ -121,7 +112,6 @@ config FMD_GENPARSER
config SCONFIG_GENPARSER
bool "Generate SCONFIG parser using flex and bison"
default n
- depends on EXPERT
help
Enable this option if you are working on the sconfig device tree
parser and made changes to sconfig.l or sconfig.y.
@@ -283,7 +273,6 @@ config BOOTBLOCK_SOURCE
config SKIP_MAX_REBOOT_CNT_CLEAR
bool "Do not clear reboot count after successful boot"
default n
- depends on EXPERT
help
Do not clear the reboot count immediately after successful boot.
Set to allow the payload to control normal/fallback image recovery.
diff --git a/src/device/Kconfig b/src/device/Kconfig
index 39e612d047..613461b346 100644
--- a/src/device/Kconfig
+++ b/src/device/Kconfig
@@ -51,7 +51,7 @@ config VGA_ROM_RUN
bool "Run VGA Option ROMs"
default n if PAYLOAD_SEABIOS
default y if !PAYLOAD_SEABIOS
- depends on PCI && !MAINBOARD_DO_NATIVE_VGA_INIT && EXPERT
+ depends on PCI && !MAINBOARD_DO_NATIVE_VGA_INIT
help
Execute VGA Option ROMs in coreboot if found. This is required
to enable PCI/AGP/PCI-E video cards when not using a SeaBIOS
@@ -92,7 +92,7 @@ config ON_DEVICE_ROM_RUN
bool "Run Option ROMs on PCI devices"
default n if PAYLOAD_SEABIOS
default y if !PAYLOAD_SEABIOS
- depends on PCI && EXPERT
+ depends on PCI
help
Execute Option ROMs stored on PCI/PCIe/AGP devices in coreboot.
@@ -165,17 +165,12 @@ config YABEL_PCI_FAKE_WRITING_OTHER_DEVICES_CONFIG
config YABEL_VIRTMEM_LOCATION
prompt "Location of YABEL's virtual memory"
hex
- depends on PCI_OPTION_ROM_RUN_YABEL && EXPERT
+ depends on PCI_OPTION_ROM_RUN_YABEL
default 0x1000000
help
YABEL requires 1MB memory for its CPU emulation. This memory is
normally located at 16MB.
-config YABEL_VIRTMEM_LOCATION
- hex
- depends on PCI_OPTION_ROM_RUN_YABEL && !EXPERT
- default 0x1000000
-
config YABEL_DIRECTHW
prompt "Direct hardware access"
bool
diff --git a/src/northbridge/amd/amdfam10/Kconfig b/src/northbridge/amd/amdfam10/Kconfig
index 13954d497c..4d7147d72f 100644
--- a/src/northbridge/amd/amdfam10/Kconfig
+++ b/src/northbridge/amd/amdfam10/Kconfig
@@ -120,7 +120,7 @@ config SVI_HIGH_FREQ
menu "HyperTransport setup"
#could be implemented for K8 (NORTHBRIDGE_AMD_AMDK8)
- depends on (NORTHBRIDGE_AMD_AMDFAM10) && EXPERT
+ depends on (NORTHBRIDGE_AMD_AMDFAM10)
choice
prompt "HyperTransport downlink width"
diff --git a/src/northbridge/amd/amdht/h3finit.c b/src/northbridge/amd/amdht/h3finit.c
index 0138cd9462..849f4a8dd1 100644
--- a/src/northbridge/amd/amdht/h3finit.c
+++ b/src/northbridge/amd/amdht/h3finit.c
@@ -1399,13 +1399,13 @@ static void selectOptimalWidthAndFrequency(sMainData *pDat)
cbPCBFreqLimit = ht_speed_mhz_to_hw(pDat->HtBlock->ht_link_configuration->ht_speed_limit);
cbPCBFreqLimit = min(cbPCBFreqLimit, cbPCBFreqLimit_NVRAM);
-#if CONFIG_EXPERT && CONFIG_LIMIT_HT_DOWN_WIDTH_8
+#if CONFIG_LIMIT_HT_DOWN_WIDTH_8
cbPCBABDownstreamWidth = 8;
#else
cbPCBABDownstreamWidth = 16;
#endif
-#if CONFIG_EXPERT && CONFIG_LIMIT_HT_UP_WIDTH_8
+#if CONFIG_LIMIT_HT_UP_WIDTH_8
cbPCBBAUpstreamWidth = 8;
#else
cbPCBBAUpstreamWidth = 16;