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-rw-r--r--src/mainboard/intel/apollolake_rvp/Makefile.inc3
-rw-r--r--src/mainboard/intel/apollolake_rvp/bootblock.c28
2 files changed, 31 insertions, 0 deletions
diff --git a/src/mainboard/intel/apollolake_rvp/Makefile.inc b/src/mainboard/intel/apollolake_rvp/Makefile.inc
index e69de29bb2..b2350b9490 100644
--- a/src/mainboard/intel/apollolake_rvp/Makefile.inc
+++ b/src/mainboard/intel/apollolake_rvp/Makefile.inc
@@ -0,0 +1,3 @@
+bootblock-$(CONFIG_LPC_TPM) += bootblock.c
+
+
diff --git a/src/mainboard/intel/apollolake_rvp/bootblock.c b/src/mainboard/intel/apollolake_rvp/bootblock.c
new file mode 100644
index 0000000000..9bfa279a9e
--- /dev/null
+++ b/src/mainboard/intel/apollolake_rvp/bootblock.c
@@ -0,0 +1,28 @@
+/*
+ * This file is part of the coreboot project.
+ *
+ * Copyright (C) 2016 Intel Corp.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ */
+
+#include <bootblock_common.h>
+#include <soc/gpio.h>
+
+static const struct pad_config tpm_spi_configs[] = {
+ PAD_CFG_NF(GPIO_106, NATIVE, DEEP, NF3), /* FST_SPI_CS2_N */
+};
+
+static void tpm_enable(void)
+{
+ /* Configure gpios */
+ gpio_configure_pads(tpm_spi_configs, ARRAY_SIZE(tpm_spi_configs));
+}
+
+void bootblock_mainboard_init(void) {
+ if (IS_ENABLED(CONFIG_LPC_TPM))
+ tpm_enable();
+}