7 files changed, 22 insertions, 1 deletions
diff --git a/src/southbridge/amd/agesa/hudson/ramtop.c b/src/southbridge/amd/agesa/hudson/ramtop.c
index 182150f02e..79d033f24b 100644
--- a/src/southbridge/amd/agesa/hudson/ramtop.c
+++ b/src/southbridge/amd/agesa/hudson/ramtop.c
@@ -30,6 +30,8 @@ int acpi_get_sleep_type(void)
 	return (int)tmp;
 }
 
+#if IS_ENABLED(CONFIG_LATE_CBMEM_INIT)
+
 #ifndef __PRE_RAM__
 void backup_top_of_ram(uint64_t ramtop)
 {
@@ -57,3 +59,5 @@ unsigned long get_top_of_ram(void)
 	}
 	return (unsigned long) xdata;
 }
+
+#endif
diff --git a/src/southbridge/amd/cimx/sb700/lpc.c b/src/southbridge/amd/cimx/sb700/lpc.c
index 75a3fb97da..f730e286cc 100644
--- a/src/southbridge/amd/cimx/sb700/lpc.c
+++ b/src/southbridge/amd/cimx/sb700/lpc.c
@@ -24,6 +24,8 @@
 #include <console/console.h>	/* printk */
 #include <cbmem.h>
 
+#if IS_ENABLED(CONFIG_LATE_CBMEM_INIT)
+
 #define BIOSRAM_INDEX   0xcd4
 #define BIOSRAM_DATA    0xcd5
 
@@ -37,6 +39,7 @@ void backup_top_of_ram(uint64_t ramtop)
 		nvram_pos++;
 	}
 }
+#endif
 
 void lpc_read_resources(device_t dev)
 {
diff --git a/src/southbridge/amd/cimx/sb800/ramtop.c b/src/southbridge/amd/cimx/sb800/ramtop.c
index 7e9abaeced..0d811ab72c 100644
--- a/src/southbridge/amd/cimx/sb800/ramtop.c
+++ b/src/southbridge/amd/cimx/sb800/ramtop.c
@@ -30,6 +30,8 @@ int acpi_get_sleep_type(void)
 	return (int)tmp;
 }
 
+#if IS_ENABLED(CONFIG_LATE_CBMEM_INIT)
+
 #ifndef __PRE_RAM__
 void backup_top_of_ram(uint64_t ramtop)
 {
@@ -57,3 +59,5 @@ unsigned long get_top_of_ram(void)
 	}
 	return (unsigned long) xdata;
 }
+
+#endif
diff --git a/src/southbridge/amd/sb700/early_setup.c b/src/southbridge/amd/sb700/early_setup.c
index 94f33b75de..50909f8b60 100644
--- a/src/southbridge/amd/sb700/early_setup.c
+++ b/src/southbridge/amd/sb700/early_setup.c
@@ -728,6 +728,7 @@ int acpi_get_sleep_type(void)
 	return ((tmp & (7 << 10)) >> 10);
 }
 
+#if IS_ENABLED(CONFIG_LATE_CBMEM_INIT)
 unsigned long get_top_of_ram(void)
 {
 	uint32_t xdata = 0;
@@ -742,5 +743,6 @@ unsigned long get_top_of_ram(void)
 	}
 	return (unsigned long) xdata;
 }
+#endif
 
 #endif
diff --git a/src/southbridge/amd/sb700/lpc.c b/src/southbridge/amd/sb700/lpc.c
index 658e95498e..7bb21d2945 100644
--- a/src/southbridge/amd/sb700/lpc.c
+++ b/src/southbridge/amd/sb700/lpc.c
@@ -88,6 +88,7 @@ int acpi_get_sleep_type(void)
 	return ((tmp & (7 << 10)) >> 10);
 }
 
+#if IS_ENABLED(CONFIG_LATE_CBMEM_INIT)
 void backup_top_of_ram(uint64_t ramtop)
 {
 	u32 dword = (u32) ramtop;
@@ -98,6 +99,7 @@ void backup_top_of_ram(uint64_t ramtop)
 		nvram_pos++;
 	}
 }
+#endif
 
 static void sb700_lpc_read_resources(device_t dev)
 {
diff --git a/src/southbridge/amd/sb800/early_setup.c b/src/southbridge/amd/sb800/early_setup.c
index 69bc3bdbed..f9eed11618 100644
--- a/src/southbridge/amd/sb800/early_setup.c
+++ b/src/southbridge/amd/sb800/early_setup.c
@@ -673,6 +673,7 @@ int acpi_get_sleep_type(void)
 	return ((tmp & (7 << 10)) >> 10);
 }
 
+#if IS_ENABLED(CONFIG_LATE_CBMEM_INIT)
 unsigned long get_top_of_ram(void)
 {
 	uint32_t xdata = 0;
@@ -687,5 +688,6 @@ unsigned long get_top_of_ram(void)
 	}
 	return (unsigned long) xdata;
 }
+#endif
 
 #endif
diff --git a/src/southbridge/via/k8t890/host_ctrl.c b/src/southbridge/via/k8t890/host_ctrl.c
index 2f4bca7cf1..27ae0ab7dc 100644
--- a/src/southbridge/via/k8t890/host_ctrl.c
+++ b/src/southbridge/via/k8t890/host_ctrl.c
@@ -113,9 +113,13 @@ static void host_ctrl_enable_k8m8xx(struct device *dev) {
 	pci_write_config8(dev, 0xa6, 0x83);
 
 }
-void backup_top_of_ram(uint64_t ramtop) {
+
+#if IS_ENABLED(CONFIG_LATE_CBMEM_INIT)
+void backup_top_of_ram(uint64_t ramtop)
+{
 		outl((u32) ramtop, K8T890_NVRAM_IO_BASE+K8T890_NVRAM_TOP_OF_RAM);
 }
+#endif
 
 static struct pci_operations lops_pci = {
 	.set_subsystem = pci_dev_set_subsystem,