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-rw-r--r--targets/intel/d945gclf/Config-abuild.lb29
1 files changed, 29 insertions, 0 deletions
diff --git a/targets/intel/d945gclf/Config-abuild.lb b/targets/intel/d945gclf/Config-abuild.lb
new file mode 100644
index 0000000000..743ee713ea
--- /dev/null
+++ b/targets/intel/d945gclf/Config-abuild.lb
@@ -0,0 +1,29 @@
+# This will make a target directory of ./VENDOR_MAINBOARD
+
+target VENDOR_MAINBOARD
+mainboard VENDOR/MAINBOARD
+
+option CC="CROSSCC"
+option CONFIG_CROSS_COMPILE="CROSS_PREFIX"
+option HOSTCC="CROSS_HOSTCC"
+
+__COMPRESSION__
+__LOGLEVEL__
+
+option CONFIG_ROM_SIZE=512*1024
+
+romimage "normal"
+ option CONFIG_USE_FALLBACK_IMAGE=0
+ option COREBOOT_EXTRA_VERSION=".0-normal"
+ payload __PAYLOAD__
+end
+
+romimage "fallback"
+ option CONFIG_USE_FALLBACK_IMAGE=1
+ option COREBOOT_EXTRA_VERSION=".0-fallback"
+ payload __PAYLOAD__
+end
+
+buildrom ./coreboot.rom CONFIG_ROM_SIZE "normal" "fallback"
+pci_rom ../../../misc/d945gclf-pci8086,2772.rom vendor_id=0x8086 device_id=0x2772
+