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-rw-r--r--util/blobtool/ifd-x200.set167
1 files changed, 167 insertions, 0 deletions
diff --git a/util/blobtool/ifd-x200.set b/util/blobtool/ifd-x200.set
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+++ b/util/blobtool/ifd-x200.set
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+#
+# Copyright (C) 2017 Damien Zammit <damien@zamaudio.com>
+#
+# This program is free software: you can redistribute it and/or modify
+# it under the terms of the GNU General Public License as published by
+# the Free Software Foundation, either version 3 of the License, or
+# (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+# GNU General Public License for more details.
+#
+#
+# X200 Liberated Flash Descriptor
+# Layout:
+# 0x0000 - 0x1000 : IFD
+# 0x1000 - 0x3000 : GbE x2
+# 0x3000 - ROMSIZE : BIOS
+{
+ "fd_signature" = 0xff0a55a,
+
+ "flmap0_fcba" = 0x1,
+ "flmap0_nc" = 0x0,
+ "flmap0_reserved0" = 0x0,
+ "flmap0_frba" = 0x4,
+ "flmap0_nr" = 0x2,
+ "flmap0_reserved1" = 0x0,
+ "flmap1_fmba" = 0x6,
+ "flmap1_nm" = 0x2,
+ "flmap1_reserved" = 0x0,
+ "flmap1_fisba" = 0x10,
+ "flmap1_isl" = 0x2,
+ "flmap2_fmsba" = 0x20,
+ "flmap2_msl" = 0x1,
+ "flmap2_reserved" = 0x0,
+
+ "flcomp_density1" = 0x4,
+ "flcomp_density2" = 0x2,
+ "flcomp_reserved0" = 0x0,
+ "flcomp_reserved1" = 0x0,
+ "flcomp_reserved2" = 0x0,
+ "flcomp_readclockfreq" = 0x0,
+ "flcomp_fastreadsupp" = 0x1,
+ "flcomp_fastreadfreq" = 0x1,
+ "flcomp_w_eraseclkfreq" = 0x0,
+ "flcomp_r_statclkfreq" = 0x0,
+ "flcomp_reserved3" = 0x0,
+ "flill" = 0x0,
+ "flbp" = 0x0,
+ "comp_padding"[0x24] = 0xff,
+
+ "flreg0_base" = 0x0,
+ "flreg0_reserved0" = 0x0,
+ "flreg0_limit" = 0x0,
+ "flreg0_reserved1" = 0x0,
+ "flreg1_base" = 0x3,
+ "flreg1_reserved0" = 0x0,
+ "flreg1_limit" = 0x7ff,
+ "flreg1_reserved1" = 0x0,
+ "flreg2_base" = 0x1fff,
+ "flreg2_reserved0" = 0x0,
+ "flreg2_limit" = 0x0,
+ "flreg2_reserved1" = 0x0,
+ "flreg3_base" = 0x1,
+ "flreg3_reserved0" = 0x0,
+ "flreg3_limit" = 0x2,
+ "flreg3_reserved1" = 0x0,
+ "flreg4_base" = 0x1fff,
+ "flreg4_reserved0" = 0x0,
+ "flreg4_limit" = 0x0,
+ "flreg4_reserved1" = 0x0,
+ "flreg_padding"[12] = 0xff,
+
+ "flmstr1_requesterid" = 0x0,
+ "flmstr1_r_fd" = 0x1,
+ "flmstr1_r_bios" = 0x1,
+ "flmstr1_r_me" = 0x1,
+ "flmstr1_r_gbe" = 0x1,
+ "flmstr1_r_pd" = 0x1,
+ "flmstr1_r_reserved" = 0x0,
+ "flmstr1_w_fd" = 0x1,
+ "flmstr1_w_bios" = 0x1,
+ "flmstr1_w_me" = 0x1,
+ "flmstr1_w_gbe" = 0x1,
+ "flmstr1_w_pd" = 0x1,
+ "flmstr1_w_reserved" = 0x0,
+ "flmstr2_requesterid" = 0x0,
+ "flmstr2_r_fd" = 0x0,
+ "flmstr2_r_bios" = 0x0,
+ "flmstr2_r_me" = 0x0,
+ "flmstr2_r_gbe" = 0x0,
+ "flmstr2_r_pd" = 0x0,
+ "flmstr2_r_reserved" = 0x0,
+ "flmstr2_w_fd" = 0x0,
+ "flmstr2_w_bios" = 0x0,
+ "flmstr2_w_me" = 0x0,
+ "flmstr2_w_gbe" = 0x0,
+ "flmstr2_w_pd" = 0x0,
+ "flmstr2_w_reserved" = 0x0,
+ "flmstr3_requesterid" = 0x218,
+ "flmstr3_r_fd" = 0x0,
+ "flmstr3_r_bios" = 0x0,
+ "flmstr3_r_me" = 0x0,
+ "flmstr3_r_gbe" = 0x1,
+ "flmstr3_r_pd" = 0x0,
+ "flmstr3_r_reserved" = 0x0,
+ "flmstr3_w_fd" = 0x0,
+ "flmstr3_w_bios" = 0x0,
+ "flmstr3_w_me" = 0x0,
+ "flmstr3_w_gbe" = 0x1,
+ "flmstr3_w_pd" = 0x0,
+ "flmstr3_w_reserved" = 0x0,
+ "flmstr_padding"[0x94] = 0xff,
+
+ "ich0_medisable" = 0x1,
+ "ich0_reserved0" = 0x4,
+ "ich0_tcomode" = 0x1,
+ "ich0_mesmbusaddr" = 0x64,
+ "ich0_bmcmode" = 0x0,
+ "ich0_trippointsel" = 0x0,
+ "ich0_reserved1" = 0x0,
+ "ich0_integratedgbe" = 0x1,
+ "ich0_lanphy" = 0x1,
+ "ich0_reserved2" = 0x0,
+ "ich0_dmireqiddisable" = 0x0,
+ "ich0_me2smbusaddr" = 0x0,
+ "ich1_dynclk_nmlink" = 0x1,
+ "ich1_dynclk_smlink" = 0x1,
+ "ich1_dynclk_mesmbus" = 0x1,
+ "ich1_dynclk_sst" = 0x1,
+ "ich1_reserved0" = 0x0,
+ "ich1_nmlink_npostreqs" = 0x1,
+ "ich1_reserved1" = 0x0,
+ "ich1_reserved2" = 0x0,
+ "ichstrap_padding"[0xf8] = 0xff,
+ "mch0_medisable" = 0x1,
+ "mch0_mebootfromflash" = 0x0,
+ "mch0_tpmdisable" = 0x1,
+ "mch0_reserved0" = 0x7,
+ "mch0_spifingerprinton" = 0x1,
+ "mch0_mealtdisable" = 0x0,
+ "mch0_reserved1" = 0xff,
+ "mch0_reserved2" = 0xffff,
+ "mchstrap_padding"[0xcdc] = 0xff,
+
+ "mevscc_jid0" = 0x1720c2,
+ "mevscc_vscc0" = 0x20052005,
+ "mevscc_jid1" = 0x1730ef,
+ "mevscc_vscc1" = 0x20052005,
+ "mevscc_jid2" = 0x481f,
+ "mevscc_vscc2" = 0x20152015,
+ "mevscc_padding"[4] = 0xff,
+ "mevscc_tablebase" = 0xee,
+ "mevscc_tablelength" = 0x6,
+ "mevscc_reserved" = 0x0,
+
+ "oem_magic0" = 0x4c,
+ "oem_magic1" = 0x49,
+ "oem_magic2" = 0x42,
+ "oem_magic3" = 0x45,
+ "oem_magic4" = 0x52,
+ "oem_magic5" = 0x41,
+ "oem_magic6" = 0x54,
+ "oem_magic7" = 0x45,
+ "oem_padding"[0xf8] = 0xff
+}