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-rw-r--r--util/inteltool/Makefile8
-rw-r--r--util/inteltool/cpu.c20
-rw-r--r--util/inteltool/gpio.c4
-rw-r--r--util/inteltool/inteltool.c18
-rw-r--r--util/inteltool/inteltool.h4
-rw-r--r--util/inteltool/memory.c6
-rw-r--r--util/inteltool/pcie.c16
-rw-r--r--util/inteltool/powermgt.c8
-rw-r--r--util/inteltool/rootcmplx.c8
9 files changed, 46 insertions, 46 deletions
diff --git a/util/inteltool/Makefile b/util/inteltool/Makefile
index 248e51f726..3850682e5f 100644
--- a/util/inteltool/Makefile
+++ b/util/inteltool/Makefile
@@ -1,9 +1,9 @@
#
# Makefile for inteltool utility
#
-# Copyright (C) 2008 by coresystems GmbH
-# written by Stefan Reinauer <stepan@coresystems.de>
-#
+# Copyright (C) 2008 by coresystems GmbH
+# written by Stefan Reinauer <stepan@coresystems.de>
+#
# This program is free software; you can redistribute it and/or modify
# it under the terms of the GNU General Public License as published by
# the Free Software Foundation; either version 2 of the License, or
@@ -25,7 +25,7 @@ CC = gcc
INSTALL = /usr/bin/install
PREFIX = /usr/local
CFLAGS = -O2 -g -Wall -W
-LDFLAGS = -lpci -lz
+LDFLAGS = -lpci -lz
OBJS = inteltool.o cpu.o gpio.o rootcmplx.o powermgt.o memory.o pcie.o
diff --git a/util/inteltool/cpu.c b/util/inteltool/cpu.c
index dd23d8196f..828f99f84f 100644
--- a/util/inteltool/cpu.c
+++ b/util/inteltool/cpu.c
@@ -1,8 +1,8 @@
/*
* inteltool - dump all registers on an Intel CPU + chipset based system.
*
- * Copyright (C) 2008-2010 by coresystems GmbH
- *
+ * Copyright (C) 2008-2010 by coresystems GmbH
+ *
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; version 2 of the License.
@@ -104,7 +104,7 @@ int print_intel_core_msrs(void)
{ 0x002a, "EBL_CR_POWERON" },
{ 0x0033, "TEST_CTL" },
{ 0x003f, "THERM_DIODE_OFFSET" },
- //{ 0x0079, "IA32_BIOS_UPDT_TRIG" }, // Seems to be RO
+ //{ 0x0079, "IA32_BIOS_UPDT_TRIG" }, // Seems to be RO
{ 0x008b, "IA32_BIOS_SIGN_ID" },
{ 0x00c1, "PERFCTR0" },
{ 0x00c2, "PERFCTR1" },
@@ -308,8 +308,8 @@ int print_intel_core_msrs(void)
};
/* Pentium 4 and XEON */
- /*
- * All MSRs per
+ /*
+ * All MSRs per
*
* Intel® 64 and IA-32 Architectures
* Software Developer.s Manual
@@ -326,7 +326,7 @@ int print_intel_core_msrs(void)
{ 0x002a, "MSR_EBC_HARD_POWERON" },
{ 0x002b, "MSR_EBC_SOFT_POWRON" },
{ 0x002c, "MSR_EBC_FREQUENCY_ID" },
-// WRITE ONLY { 0x0079, "IA32_BIOS_UPDT_TRIG" },
+// WRITE ONLY { 0x0079, "IA32_BIOS_UPDT_TRIG" },
{ 0x019c, "IA32_THERM_STATUS" },
{ 0x019d, "MSR_THERM2_CTL" },
{ 0x01a0, "IA32_MISC_ENABLE" },
@@ -365,7 +365,7 @@ int print_intel_core_msrs(void)
{ 0x0303, "MSR_BPU_COUNTER3" },
/* Skipped through 0x3ff for now*/
- /* All MCX_ADDR AND MCX_MISC MSRs depend on a bit being
+ /* All MCX_ADDR AND MCX_MISC MSRs depend on a bit being
* set in MCX_STATUS */
{ 0x400, "IA32_MC0_CTL" },
{ 0x401, "IA32_MC0_STATUS" },
@@ -374,7 +374,7 @@ int print_intel_core_msrs(void)
{ 0x404, "IA32_MC1_CTL" },
{ 0x405, "IA32_MC1_STATUS" },
{ 0x406, "IA32_MC1_ADDR" },
- { 0x407, "IA32_MC1_MISC" },
+ { 0x407, "IA32_MC1_MISC" },
{ 0x408, "IA32_MC2_CTL" },
{ 0x409, "IA32_MC2_STATUS" },
{ 0x40a, "IA32_MC2_ADDR" },
@@ -439,7 +439,7 @@ int print_intel_core_msrs(void)
*/
{ 0x0600, "IA32_DS_AREA" },
/* 0x0680 - 0x06cf Branch Records Skipped */
-
+
};
@@ -461,7 +461,7 @@ int print_intel_core_msrs(void)
cpu_t *cpu = NULL;
- /* Get CPU family and model, not the stepping
+ /* Get CPU family and model, not the stepping
* (TODO: extended family/model)
*/
id = cpuid(1) & 0xff0;
diff --git a/util/inteltool/gpio.c b/util/inteltool/gpio.c
index a02817d586..665f4696ea 100644
--- a/util/inteltool/gpio.c
+++ b/util/inteltool/gpio.c
@@ -1,8 +1,8 @@
/*
* inteltool - dump all registers on an Intel CPU + chipset based system.
*
- * Copyright (C) 2008 by coresystems GmbH
- *
+ * Copyright (C) 2008 by coresystems GmbH
+ *
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; version 2 of the License.
diff --git a/util/inteltool/inteltool.c b/util/inteltool/inteltool.c
index 2c8ab747dc..9c23d49f65 100644
--- a/util/inteltool/inteltool.c
+++ b/util/inteltool/inteltool.c
@@ -1,9 +1,9 @@
/*
* inteltool - dump all registers on an Intel CPU + chipset based system.
*
- * Copyright (C) 2008-2010 by coresystems GmbH
- * written by Stefan Reinauer <stepan@coresystems.de>
- *
+ * Copyright (C) 2008-2010 by coresystems GmbH
+ * written by Stefan Reinauer <stepan@coresystems.de>
+ *
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; version 2 of the License.
@@ -69,7 +69,7 @@ void *map_physical(unsigned long phys_addr, size_t len)
virt_addr = mmap(0, len, PROT_WRITE | PROT_READ, MAP_SHARED,
fd_mem, (off_t) phys_addr);
-
+
if (virt_addr == MAP_FAILED) {
printf("Error mapping physical memory 0x%08lx[0x%x]\n", phys_addr, len);
return NULL;
@@ -214,11 +214,11 @@ int main(int argc, char *argv[])
pci_scan_bus(pacc);
/* Find the required devices */
- for (dev = pacc->devices; dev; dev = dev->next) {
+ for (dev = pacc->devices; dev; dev = dev->next) {
pci_fill_info(dev, PCI_FILL_CLASS);
/* The ISA/LPC bridge can be 0x1f, 0x07, or 0x04 so we probe. */
if (dev->device_class == 0x0601) { /* ISA/LPC bridge */
- if (sb == NULL)
+ if (sb == NULL)
sb = dev;
else
fprintf(stderr, "Multiple devices with class ID"
@@ -254,7 +254,7 @@ int main(int argc, char *argv[])
}
id = cpuid(1);
- printf("Intel CPU: Family %x, Model %x\n",
+ printf("Intel CPU: Family %x, Model %x\n",
(id >> 8) & 0xf, (id >> 4) & 0xf);
/* Determine names */
@@ -265,10 +265,10 @@ int main(int argc, char *argv[])
if (sb->device_id == supported_chips_list[i].device_id)
sbname = supported_chips_list[i].name;
- printf("Intel Northbridge: %04x:%04x (%s)\n",
+ printf("Intel Northbridge: %04x:%04x (%s)\n",
nb->vendor_id, nb->device_id, nbname);
- printf("Intel Southbridge: %04x:%04x (%s)\n",
+ printf("Intel Southbridge: %04x:%04x (%s)\n",
sb->vendor_id, sb->device_id, sbname);
/* Now do the deed */
diff --git a/util/inteltool/inteltool.h b/util/inteltool/inteltool.h
index 74bfdca802..45b210dfca 100644
--- a/util/inteltool/inteltool.h
+++ b/util/inteltool/inteltool.h
@@ -1,8 +1,8 @@
/*
* inteltool - dump all registers on an Intel CPU + chipset based system.
*
- * Copyright (C) 2008-2010 by coresystems GmbH
- *
+ * Copyright (C) 2008-2010 by coresystems GmbH
+ *
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; version 2 of the License.
diff --git a/util/inteltool/memory.c b/util/inteltool/memory.c
index 5c5a07e03a..393725b0ff 100644
--- a/util/inteltool/memory.c
+++ b/util/inteltool/memory.c
@@ -1,8 +1,8 @@
/*
* inteltool - dump all registers on an Intel CPU + chipset based system.
*
- * Copyright (C) 2008-2010 by coresystems GmbH
- *
+ * Copyright (C) 2008-2010 by coresystems GmbH
+ *
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; version 2 of the License.
@@ -60,7 +60,7 @@ int print_mchbar(struct pci_dev *nb)
}
mchbar = map_physical(mchbar_phys, size);
-
+
if (mchbar == NULL) {
perror("Error mapping MCHBAR");
exit(1);
diff --git a/util/inteltool/pcie.c b/util/inteltool/pcie.c
index 5acb0b6ba2..5b58f0ccdb 100644
--- a/util/inteltool/pcie.c
+++ b/util/inteltool/pcie.c
@@ -1,8 +1,8 @@
/*
* inteltool - dump all registers on an Intel CPU + chipset based system.
*
- * Copyright (C) 2008-2010 by coresystems GmbH
- *
+ * Copyright (C) 2008-2010 by coresystems GmbH
+ *
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; version 2 of the License.
@@ -57,7 +57,7 @@ int print_epbar(struct pci_dev *nb)
}
epbar = map_physical(epbar_phys, size);
-
+
if (epbar == NULL) {
perror("Error mapping EPBAR");
exit(1);
@@ -109,7 +109,7 @@ int print_dmibar(struct pci_dev *nb)
}
dmibar = map_physical(dmibar_phys, size);
-
+
if (dmibar == NULL) {
perror("Error mapping DMIBAR");
exit(1);
@@ -182,17 +182,17 @@ int print_pciexbar(struct pci_dev *nb)
default: // RSVD
printf("Undefined address base. Bailing out.\n");
return 1;
- }
+ }
printf("PCIEXBAR: 0x%08llx\n", pciexbar_phys);
pciexbar = map_physical(pciexbar_phys, (max_busses * 1024 * 1024));
-
+
if (pciexbar == NULL) {
perror("Error mapping PCIEXBAR");
exit(1);
}
-
+
for (bus = 0; bus < max_busses; bus++) {
for (dev = 0; dev < 32; dev++) {
for (fn = 0; fn < 8; fn++) {
@@ -200,7 +200,7 @@ int print_pciexbar(struct pci_dev *nb)
if (*(uint16_t *)(pciexbar + devbase) == 0xffff)
continue;
-
+
/* This is a heuristics. Anyone got a better check? */
if( (*(uint32_t *)(pciexbar + devbase + 256) == 0xffffffff) &&
(*(uint32_t *)(pciexbar + devbase + 512) == 0xffffffff) ) {
diff --git a/util/inteltool/powermgt.c b/util/inteltool/powermgt.c
index 47db163eed..ee0f485958 100644
--- a/util/inteltool/powermgt.c
+++ b/util/inteltool/powermgt.c
@@ -1,9 +1,9 @@
/*
* inteltool - dump all registers on an Intel CPU + chipset based system.
*
- * Copyright (C) 2008-2010 by coresystems GmbH
- * written by Stefan Reinauer <stepan@coresystems.de>
- *
+ * Copyright (C) 2008-2010 by coresystems GmbH
+ * written by Stefan Reinauer <stepan@coresystems.de>
+ *
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; version 2 of the License.
@@ -145,7 +145,7 @@ static const io_register_t ich8_pm_registers[] = {
{ 0x7c, 4, "RESERVED" },
};
-/*
+/*
* INTEL I/O Controller Hub 6 Family
* http://www.intel.com/assets/pdf/datasheet/301473.pdf
*/
diff --git a/util/inteltool/rootcmplx.c b/util/inteltool/rootcmplx.c
index 9c3f70f4ef..b67e230b9a 100644
--- a/util/inteltool/rootcmplx.c
+++ b/util/inteltool/rootcmplx.c
@@ -1,9 +1,9 @@
/*
* inteltool - dump all registers on an Intel CPU + chipset based system.
*
- * Copyright (C) 2008 by coresystems GmbH
- * written by Stefan Reinauer <stepan@coresystems.de>
- *
+ * Copyright (C) 2008 by coresystems GmbH
+ * written by Stefan Reinauer <stepan@coresystems.de>
+ *
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; version 2 of the License.
@@ -51,7 +51,7 @@ int print_rcba(struct pci_dev *sb)
}
rcba = map_physical(rcba_phys, size);
-
+
if (rcba == NULL) {
perror("Error mapping RCBA");
exit(1);
generated by cgit v1.2.3 (git 2.25.1) at 2024-11-13 16:20:01 +0000