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AgeCommit message (Expand)Author
2021-02-01device/oprom/include/x86emu/fpu_regs.h: Fix lint errorFrans Hendriks
2021-02-01drivers/intel/fsp2_0: Use CBFS_MCACHE when coreboot tears down CARArthur Heymans
2021-02-01soc/intel/xeon_sp: Use native CAR teardownArthur Heymans
2021-02-01drivers/intel/fsp2_0: Use coreboot postcar with FSP-TArthur Heymans
2021-01-31soc/intel/*: drop incomplete and unneeded check for DMI SRLOCKMichael Niewöhner
2021-01-31soc/amd/common/block/aoac: expand acronym in Kconfig help textFelix Held
2021-01-31util/vboot_lib: Add description.mdKyösti Mälkki
2021-01-31mb/emulation/qemu-q35: Use common MADTAngel Pons
2021-01-31mb/emulation/qemu-q35: Define and use MMCONF_BUS_NUMBERAngel Pons
2021-01-31soc/amd/cezanne/Kconfig: select common PSP gen2 supportFelix Held
2021-01-31soc/amd/picasso/psp: move soc_get_mbox_address to common PSP gen2 codeFelix Held
2021-01-31soc/amd/stoneyridge/psp: fix check of MSR_PSP_ADDR contentsFelix Held
2021-01-31soc/amd/picasso/psp: fix check of MSR_PSP_ADDR contentsFelix Held
2021-01-31soc/amd/*/psp: move MSR_CU_CBBCFG to common and rename to MSR_PSP_ADDRFelix Held
2021-01-31soc/amd/stoneyridge/southbridge: move PSP BAR hide bit to its registerFelix Held
2021-01-31soc/amd/cezanne: add soc/cpu.h with CPUID define for Cezanne A0 steppingFelix Held
2021-01-30sb/intel/ibexpeak: Drop invalid ME finalisation functionAngel Pons
2021-01-30soc/intel/broadwell/pch: Drop some `config_of` usesAngel Pons
2021-01-30soc/intel/broadwell: Move `ramstage.c` to PCH scopeAngel Pons
2021-01-30soc/intel/broadwell: Make `broadwell_init_pre_device` staticAngel Pons
2021-01-30soc/intel: Replace `SA_PCIEX_LENGTH` Kconfig optionsAngel Pons
2021-01-30device: Drop `mmconf_resource_init` functionAngel Pons
2021-01-30nb/intel/i945: Define and use MMCONF_BUS_NUMBERAngel Pons
2021-01-30nb/intel/gm45: Define and use MMCONF_BUS_NUMBERAngel Pons
2021-01-30nb/intel/x4x: Define and use MMCONF_BUS_NUMBERAngel Pons
2021-01-30nb/intel/pineview: Define and use MMCONF_BUS_NUMBERAngel Pons
2021-01-30nb/intel/ironlake: Use MMCONF_BUS_NUMBER everywhereAngel Pons
2021-01-30nb/intel/sandybridge: Define and use MMCONF_BUS_NUMBERAngel Pons
2021-01-30nb/intel/haswell: Define and use MMCONF_BUS_NUMBERAngel Pons
2021-01-30soc/intel/broadwell: Define and use MMCONF_BUS_NUMBERAngel Pons
2021-01-30soc/intel/broadwell: Use common SMBus codeAngel Pons
2021-01-30device/Kconfig: Introduce MMCONF_LENGTHAngel Pons
2021-01-30soc/intel/{baytrail,broadwell} Fix building with refcode blobsAngel Pons
2021-01-30sb/intel/bd82x6x: Clean up early_thermal.cAngel Pons
2021-01-30nb/intel/ironlake: Use RCBA macrosAngel Pons
2021-01-30libpayload/arm*: Add 64bit memory access primitivesPatrick Georgi
2021-01-30mb/amd/majolica: Add an empty bootblock function to handle GPIOZheng Bao
2021-01-30util/testing/Makefile.inc: Fix up license headerAngel Pons
2021-01-30mb/amd/majolica: Add an empty function of mainboard bootblockZheng Bao
2021-01-30drivers/intel/fsp2_0: factor out and improve UPD signature checkFelix Held
2021-01-30soc/amd,intel: Drop leftover GNVS includesKyösti Mälkki
2021-01-30soc/amd/stoneyridge/southbridge: replace southbridge prefix with fchFelix Held
2021-01-30soc/amd/cezanne: add use result of acpi_is_wakeup_s3() in FSP callsFelix Held
2021-01-30soc/amd/picasso/chip: add missing acpi/acpi.h includeFelix Held
2021-01-30soc/intel/common/block: Create PCIE related macrosSubrata Banik
2021-01-30soc/intel/alderlake: Remove pch.h from SoC directorySubrata Banik
2021-01-30mb/intel/adlrvp: Remove unnecessary whitespaceSubrata Banik
2021-01-30soc/amd/piasso/data_fabric: rename data_fabric_read_reg32Felix Held
2021-01-30soc/amd/picasso/data_fabric: factor out indirect address/index writeFelix Held
2021-01-29soc/amd/cezanne: add empty ramstage FCH supportFelix Held