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AgeCommit message (Expand)Author
2020-11-16Makefile.inc: Move adding SeaBIOS cbfs config filesArthur Heymans
2020-11-16src/drivers/intel: Correct Kconfig option in MakefileMartin Roth
2020-11-16drivers/i2c/tpm: Remove ifdef of non-existant Kconfig optionMartin Roth
2020-11-16src: Update some incorrect config options in commentsMartin Roth
2020-11-16soc/intel/denverton_ns: Generate ACPI DMAR TableJulien Viard de Galbert
2020-11-16cpu/x86/smm/smm_module_loaderv2: Properly print stack_endArthur Heymans
2020-11-16cpu/x86/smm/smm_module_loaderv2.c: Use more variablesArthur Heymans
2020-11-16cpu/x86/smm: Check that the stub size is < save state sizeArthur Heymans
2020-11-16nb/intel/sandybridge: Clarify some parts of raminitAngel Pons
2020-11-16nb/intel/sandybridge: Fix typo in commentAngel Pons
2020-11-16nb/intel/sandybridge: Retype constantAngel Pons
2020-11-16nb/intel/sandybridge: Drop write_controller_mr() functionAngel Pons
2020-11-16nb/intel/sandybridge: Reduce the scope of get_CWL()Angel Pons
2020-11-16nb/intel/sandybridge: Clarify IOSAV_DATA_CTL_ch usageAngel Pons
2020-11-16libpayload/i8042: Increase response timeout to 1.5sNico Huber
2020-11-16util/intelp2m: Clean up SCI, SMI macro generation and update commentsBenjamin Doron
2020-11-16mb/google/hatch/dratini: Describe the privacy_gpioRicardo Ribalda
2020-11-16soc/intel/xeon_sp: Synchronize DMAR and MADT IOAPIC id'sArthur Heymans
2020-11-16soc/intel/broadwell/systemagent.c: Rename to `northbridge.c`Angel Pons
2020-11-16arch/x86/car.ld: Do cosmetic fixesFrans Hendriks
2020-11-16mb/supermicro/x11-lga1151-series: Initialize mem_cfg in one lineAngel Pons
2020-11-16dedede: Create lantis variantTony Huang
2020-11-16soc/mediatek/mt8192: Reserve 44K SRAM for MCUPM working bufferYidi Lin
2020-11-16mb/google/zork/: Enable REGULATORY_DOMAIN on VilbozEric Lai
2020-11-16volteer/variants/eldrid: Goodix touch panel power-on sequence tuningNick Chen
2020-11-16arch/x86/smbios: Update memory_array_handle for SMBIOS type 19Tim Chu
2020-11-16mb/google/zork: Init fingerprint GPIOs for boot vs resumeMartin Roth
2020-11-16src: Change bare 'unsigned' to 'unsigned int'Martin Roth
2020-11-16vc/intel/fsp/fsp2_0/cooperlake_sp: Fix WW45 FSP Memory map HOB mismatchJohnny Lin
2020-11-16commonlib: Add timestamp values for forced delaysMartin Roth
2020-11-16mb/google/volteer/var/voema: Add memory parts and generate DRAM IDsDavid Wu
2020-11-16lp4x: Add new memory parts and generate SPDsDavid Wu
2020-11-16drivers/i2c/dw: Check for TX_ABORT in transferKangheui Won
2020-11-16MAINTAINERS: add maintainers of soc/amd/picasssoFelix Held
2020-11-16soc/amd/common/block: drop double underscores from include guardsFelix Held
2020-11-16soc/amd/stoneyridge: unify and align include guards with picassoFelix Held
2020-11-16soc/amd/picasso/include: unify include guardsFelix Held
2020-11-16soc/amd/picasso/include/amd_pci_int_defs: remove duplicate commentFelix Held
2020-11-16mb/google/kukui: Fix LCD sequence T3 fail issueTao Xia
2020-11-15util/cbfstool/amdcompress: fix argument requirementFelix Held
2020-11-15util/cbfstool/amdcompress: fix short option for maxsizeFelix Held
2020-11-15soc/amd/common: factor out SMU code from PicassoFelix Held
2020-11-15vendorcode/intel/fsp: Update Tiger Lake FSP Headers for FSP v3444Srinidhi N Kaushik
2020-11-14soc/intel/cnl: enable ACPI CPPC entries generationMichael Niewöhner
2020-11-14soc/intel/common/block: add code for ACPI CPPC entries generationMichael Niewöhner
2020-11-14soc/intel/xeon_sp: Improve generating PCH IOAPIC MADT entryArthur Heymans
2020-11-13mrc_cache: Move code for triggering memory training into mrc_cacheShelley Chen
2020-11-13mb/google/volteer/variant/lindar: Update devicetree settingsStanley Wu
2020-11-13soc/intel/cnl: replace the remains of HeciEnabled by device state in dtMichael Niewöhner
2020-11-13soc/intel/tigerlake: Add code for early tcssBrandon Breitenstein