| Age | Commit message (Expand) | Author |
|---|
| 2021-02-11 | soc/amd*/smihandler: factor out and rename clear_all_smi_status | Felix Held |
| 2021-02-11 | soc/amd/cezanne: add empty SMM-handler | Felix Held |
| 2021-02-11 | soc/amd/stoneyridge: drop empty sb_enable | Felix Held |
| 2021-02-10 | soc/amd/cezanne/fch: add HAVE_SMI_HANDLER case to fch_init_acpi_ports | Felix Held |
| 2021-02-10 | mb/google: order matters in mem_parts_used.txt | Paul Fagerburg |
| 2021-02-10 | soc/amd/stoneyridge/chip: rewrite enable_dev as switch case statement | Felix Held |
| 2021-02-10 | soc/amd/cezanne: Add verstage support | Raul E Rangel |
| 2021-02-10 | soc/amd/common/psp_gen2: print error for uninitialized MSR_PSP_ADDR | Felix Held |
| 2021-02-10 | soc/amd/common/block/psp: factor out soc_get_psp_base_address | Felix Held |
| 2021-02-10 | src/ec/quanta/ene_kb3940q/acpi/battery.asl: Convert to ASL 2.0 | Elyes HAOUAS |
| 2021-02-10 | src/ec/lenovo/h8/acpi/battery.asl: Convert to ASL 2.0 | Elyes HAOUAS |
| 2021-02-10 | soc/amd/cezanne: Enable SOC_AMD_COMMON_BLOCK_SPI | Raul E Rangel |
| 2021-02-10 | soc/amd/common/blocks/lpc: Remove common SPI registers | Raul E Rangel |
| 2021-02-10 | soc/amd/cezanne: Add SPI registers | Raul E Rangel |
| 2021-02-10 | soc/amd/picasso: Add SPI registers | Raul E Rangel |
| 2021-02-10 | soc/amd/stoneyridge: Add SPI registers | Raul E Rangel |
| 2021-02-10 | sb/intel/bd82x6x/acpi: Convert to ASL 2.0 | Elyes HAOUAS |
| 2021-02-10 | soc/intel/xeon_sp/include/soc/acpi_asl.h: Convert to ASL 2.0 | Elyes HAOUAS |
| 2021-02-10 | mb/google/poppy/var/baseboard: Convert to ASL 2.0 | Elyes HAOUAS |
| 2021-02-10 | soc/intel/skylake: Convert to ASL 2.0 syntax | Elyes HAOUAS |
| 2021-02-10 | mb/intel/wtm2: Convert to ASL 2.0 syntax | Elyes HAOUAS |
| 2021-02-10 | soc/intel/skylake/acpi: Add PEP table | Benjamin Doron |
| 2021-02-10 | soc/amd/common/block: Fix guards for PSP transfer buffer | Raul E Rangel |
| 2021-02-10 | mb/google/zork: modify ELAN TS i2c IRQ to LEVEL active for dirinboz | Kevin Chiu |
| 2021-02-10 | soc/amd/common/block/cpu/noncar: Remove unneeded whitespace before tab | Elyes HAOUAS |
| 2021-02-10 | mb/google/zork/var/shuboz: Adjust touchscreen settings | Kane Chen |
| 2021-02-10 | soc/amd/picasso/smihandler: replace southbridge.c in comment with fch.c | Felix Held |
| 2021-02-10 | soc/amd/cezanne/chip: add empty set_mmio_dev_ops | Felix Held |
| 2021-02-10 | soc/amd/cezanne/chip: add empty cpu_bus_ops | Felix Held |
| 2021-02-10 | mb/google/zork/var/shuboz: Modify touchpad setting for Jelboz | Kane Chen |
| 2021-02-10 | soc/amd/block/psp/psp: raise log level of PSP failure messages | Felix Held |
| 2021-02-10 | sb/amd/cimx/sb800/acpi: Convert to ASL 2.0 syntax | Elyes HAOUAS |
| 2021-02-10 | sb/amd/pi/hudson/acpi/fch.asl: Convert to ASL 2.0 syntax | Elyes HAOUAS |
| 2021-02-10 | soc/intel/broadwell/pch: Simplify PCI RMW operations | Angel Pons |
| 2021-02-10 | nb/intel/i945: Use common {DMI,EP,MCH}BAR accessors | Angel Pons |
| 2021-02-10 | nb/intel/x4x: Use common {DMI,EP,MCH}BAR accessors | Angel Pons |
| 2021-02-10 | nb/intel/pineview: Use common {DMI,EP,MCH}BAR accessors | Angel Pons |
| 2021-02-10 | nb/intel/ironlake: Use common {DMI,EP,MCH}BAR accessors | Angel Pons |
| 2021-02-10 | nb/intel/sandybridge: Use common {DMI,EP,MCH}BAR accessors | Angel Pons |
| 2021-02-10 | soc/intel/broadwell: Use common MADT code | Angel Pons |
| 2021-02-10 | soc/intel/broadwell/pch: Drop `acpi_sci_irq` function | Angel Pons |
| 2021-02-10 | coreboot_table: Use precision when printing lb_gpio name | Julius Werner |
| 2021-02-10 | mb/intel/adlrvp/bootblock.c: Remove unused includes | Elyes HAOUAS |
| 2021-02-10 | mb/emulation/qemu-q35/bootblock.c: Remove unused includes | Elyes HAOUAS |
| 2021-02-10 | mb/gizmosphere/gizmo2/bootblock.c: Remove unused includes | Elyes HAOUAS |
| 2021-02-10 | mb/google/volteer/var/voxel: Add settings for noise mitgation | Sheng-Liang Pan |
| 2021-02-10 | soc/intel/{cnl,skl}: Add alignment check for TSEG base and size | Benjamin Doron |
| 2021-02-10 | mb/google/volteer: Enable external bypass, clkgate & phygate | Shreesh Chhabbi |
| 2021-02-10 | soc/intel/tgl: Update S0ix enable mask based on SoC and mainboard design | Shreesh Chhabbi |
| 2021-02-10 | mb/google/zork: devicetree: Fix typo in *Coprocessor* in comment | Paul Menzel |
