coreboot - Some coreboot project code with my work

Age	Commit message (Expand)	Author
2021-01-24	mainboard/intel/strago/ec.c: Use __func__	Elyes HAOUAS
2021-01-24	mainboard/intel/emeraldlake2/ec.c: Use __func__	Elyes HAOUAS
2021-01-24	ec/acpi/ec.c: Use __func__	Elyes HAOUAS
2021-01-24	drivers/intel/gma/opregion.c: Use __func__	Elyes HAOUAS
2021-01-24	drivers/elog/elog.c: Use __func__	Elyes HAOUAS
2021-01-24	device/pci_rom.c: Use __func__	Elyes HAOUAS
2021-01-24	mb/lenovo/t400: Convert to ASL 2.0 syntax	Elyes HAOUAS
2021-01-24	mb/lenovo/s230u: Convert to ASL 2.0 syntax	Elyes HAOUAS
2021-01-24	ec/purism/librem/acpi/ec.asl: Convert to ASL 2.0 syntax	Elyes HAOUAS
2021-01-24	soc/samsung/exynos5250/dp-reg.c: Use __func__	Elyes HAOUAS
2021-01-24	arch/x86: Use wildcard for mb/smihandler.c	Kyösti Mälkki
2021-01-24	ACPI: Clean up GNVS initialisation	Kyösti Mälkki
2021-01-24	soc/amd/cezanne/Kconfig: select missing SSE2 option	Felix Held
2021-01-24	soc/amd/cezanne/Kconfig: select X86_AMD_FIXED_MTRRS	Felix Held
2021-01-24	soc/amd/cezanne: add basic romstage	Felix Held
2021-01-24	soc,vendorcode/amd/cezanne: add basic FSP integration	Felix Held
2021-01-24	soc/amd/picasso: Remove some empty strings	Zheng Bao
2021-01-24	soc/amd/cezanne: Add PSP integration for cezanne	Zheng Bao
2021-01-24	soc/intel/xeon_sp/cpx: Account for 'rc' heap manager	Arthur Heymans
2021-01-24	arch/x86/car.ld: Account for FSP-T reserved area	Arthur Heymans
2021-01-24	soc/intel/lpc_lib: drop dead code	Michael Niewöhner
2021-01-24	soc/intel/icl: drop wrong, unused code	Michael Niewöhner
2021-01-24	soc/intel/cnl: use Kconfig to determine PCH type	Michael Niewöhner
2021-01-24	soc/intel/broadwell: Align raminit with Haswell	Angel Pons
2021-01-24	soc/intel/broadwell: Drop `struct romstage_params`	Angel Pons
2021-01-24	broadwell: Flatten `mainboard_pre_raminit`	Angel Pons
2021-01-24	broadwell: Clean up `mainboard_post_raminit`	Angel Pons
2021-01-24	soc/intel/broadwell/chip.h: Drop unused fields	Angel Pons
2021-01-24	soc/intel/broadwell: Select CPU_INTEL_HASWELL	Angel Pons
2021-01-24	soc/intel/broadwell: Move romstage.c to Haswell	Angel Pons
2021-01-24	soc/intel/broadwell: Drop now-unused CPU code	Angel Pons
2021-01-24	soc/intel/broadwell: Use Haswell CPU headers	Angel Pons
2021-01-24	mb/google/auron: Use Haswell CPU code	Angel Pons
2021-01-24	mb/google/jecht: Use Haswell CPU code	Angel Pons
2021-01-24	mb/intel/wtm2: Use Haswell CPU code	Angel Pons
2021-01-24	mb/purism/librem_bdw: Use Haswell CPU code	Angel Pons
2021-01-24	soc/intel/broadwell: Allow to use Haswell CPU code instead	Angel Pons
2021-01-24	soc/intel/broadwell: Select INTEL_LYNXPOINT_LP	Angel Pons
2021-01-24	cpu/intel/haswell: Add Broadwell CPUIDs and microcode	Angel Pons
2021-01-24	cpu/intel/haswell: Set C9/C10 vccmin	Angel Pons
2021-01-24	cpu/intel/haswell: Add fast ramp voltage for Broadwell	Angel Pons
2021-01-24	lib/edid_fill_fb: Relax bits_per_pixel constraint	Raul E Rangel
2021-01-23	soc/intel/baytrail,broadwell: Use bootstate for save_wake_source()	Kyösti Mälkki
2021-01-23	ACPI: Add helpers for CBMEM_ID_POWER_STATE	Kyösti Mälkki
2021-01-23	soc/amd: Rename chipset_state to chipset_power_state	Kyösti Mälkki
2021-01-23	ACPI S3: Replace stashed acpi_slp_typ value	Kyösti Mälkki
2021-01-23	intel/baytrail,braswell,broadwell: Add const qualifier for power_state	Kyösti Mälkki
2021-01-23	ELOG: Add const qualifier for chipset_power_state	Kyösti Mälkki
2021-01-23	soc/amd/picasso/pcie_gpp: Remove duplication in pirq_data declaration	Raul E Rangel
2021-01-23	soc/amd/picasso/pci_gpp: Replace the swizzle string with a u8 array	Raul E Rangel