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AgeCommit message (Expand)Author
2015-04-10arm64: Add support for save/restore registers for CPU startup.Furquan Shaikh
2015-04-10arm64: Add macro to invalidate stage 1 TLB entries at current ELFurquan Shaikh
2015-04-10arm64: Add conditional read/write from/to EL3 assembly macros.Furquan Shaikh
2015-04-10arm64: Add function for reading TCR register at current ELFurquan Shaikh
2015-04-10tegra132: Make non-vboot2 memlayout more usefulFurquan Shaikh
2015-04-10tegra132: Change memlayout to have PRERAM and POSTRAM CBFS CacheFurquan Shaikh
2015-04-10tegra132: Bump up ramstage to 256KFurquan Shaikh
2015-04-10google/rush_ryu: Add speaker amp config for AD4567 on P0/P1Tom Warren
2015-04-10tegra132: prepare cpu startup in psciAaron Durbin
2015-04-10arm64: psci: actually inform SoC layer of CPU_ON entryAaron Durbin
2015-04-10google/rush_ryu: Remove long delay when turning on AVDD_DSI_CSIJimmy Zhang
2015-04-10tegra132: Increase size of bootblock due to overflowTom Warren
2015-04-10arm64: ensure secondary CPU's stack tops are not in the cacheAaron Durbin
2015-04-10arm64: add timeout waiting for CPUs to come onlineAaron Durbin
2015-04-10tegra132: always bring up PLLDAaron Durbin
2015-04-10tegra132: rename clock_display() to clock_configure_plld()Aaron Durbin
2015-04-10google/rush_ryu: audio: Setup clocks for AHUB, I2S1, codec, etc.Tom Warren
2015-04-10tegra132: Set dc to resize the difference between framebuffer and panelJimmy Zhang
2015-04-10google/rush_ryu: devicetree: Add framebuffer resolution settingsJimmy Zhang
2015-04-10tegra132: Add framebuffer parametersJimmy Zhang
2015-04-10tegra132: Pass panel spec to lib_sysinfoJimmy Zhang
2015-04-10tegra132: Expand ramstage size to 208k (from 192k)Jimmy Zhang
2015-04-10tegra132: Add dsi driverJimmy Zhang
2015-04-10google/rush_ryu: devicetree: Add dsi panel mode settingsJimmy Zhang
2015-04-10tegra132: Add panel mode specJimmy Zhang
2015-04-10google/rush_ryu: dsi: Enable panel related vdd and clocksJimmy Zhang
2015-04-10google/rush_ryu: Disable EC SW sync for proto boards before proto3Furquan Shaikh
2015-04-10tegra132: Increase space for romstage in memlayoutFurquan Shaikh
2015-04-10urara: support building with CHROMEOS enabledVadim Bendebury
2015-04-10baytrail: correct NC pin to GPO pin according to BYT platform design guideKane Chen
2015-04-10samus: Log EC panics to eventlogShawn Nematbakhsh
2015-04-10cros_ec: Retry failed VBNV transactionsJulius Werner
2015-04-10samus: Enable vr_slow_rampShawn Nematbakhsh
2015-04-10x86: Support reset routines in bootblockLee Leahy
2015-04-10broadwell: Correct XHCI offset for USB 3.0 portsJulius Werner
2015-04-10broadwell: Set PCIe replay timeout to 0xDDuncan Laurie
2015-04-10samus: Use codec internal 1.8V as DACREF sourceBen Zhang
2015-04-10samus: Set MICBIAS1 to 2.970VBen Zhang
2015-04-10baytrail: add code for supporting 2x ddr refresh rateKane Chen
2015-04-10broadwell: Add configuration for tuning VR for C-state operationsDuncan Laurie
2015-04-10samus: Adjust SATA Gen3 TX voltage amplitudeDuncan Laurie
2015-04-10broadwell: Preserve VbNv around cmos_initDuncan Laurie
2015-04-10broadwell: Add function to apply PRR to a range of SPI flashDuncan Laurie
2015-04-10samus: Add clear_recovery_mode_switch functionDuncan Laurie
2015-04-10samus: Set current backlight PWM valueDuncan Laurie
2015-04-10broadwell: Turn off panel backlight in S5 SMI handlerDuncan Laurie
2015-04-10broadwell: Skip steps when disabling PCIe portDuncan Laurie
2015-04-10broadwell: Remove XHCI workarounds on WPTDuncan Laurie
2015-04-10broadwell: Only do pre-graphics delay when running option romDuncan Laurie
2015-04-10PCI - Add interrupt disable bit definitionLee Leahy
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