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2012-01-24pci_ops_mmconf: Indentation fixesVikram Narayanan
Indentation fixes in src/arch/x86/lib/pci_ops_mmconf.c Change-Id: If8337bae06295db16ed1c129ab76dea37eb465ae Signed-off-by: Vikram Narayanan <vikram186@gmail.com> Reviewed-on: http://review.coreboot.org/577 Tested-by: build bot (Jenkins) Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2012-01-23post code: Replaced hard-coded post code with macroVikram Narayanan
Added a macro in the post code list, which replaces hard coded value in cpu/x86/cache/cache.c Change-Id: I27cb27827272584a8a17a41c111e2dc155196a97 Signed-off-by: Vikram Narayanan <vikram186@gmail.com> Reviewed-on: http://review.coreboot.org/572 Tested-by: build bot (Jenkins) Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2012-01-21trivial: spelling fixes in commentsVikram Narayanan
Few spelling fixes in entry16.inc Change-Id: Iad3d18eee3f498171cb766589aaebefdcf0e9767 Signed-off-by: Vikram Narayanan <vikram186@gmail.com> Reviewed-on: http://review.coreboot.org/571 Tested-by: build bot (Jenkins) Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2012-01-21adm1026: removed prototypeVikram Narayanan
Removed the prototype and restructured the code Change-Id: I13a648acf7bae30635e0469e301ce5635d9d7a8c Signed-off-by: Vikram Narayanan <vikram186@gmail.com> Reviewed-on: http://review.coreboot.org/570 Tested-by: build bot (Jenkins) Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2012-01-20Leave SSE and MMX instructions enabled in corebootStefan Reinauer
In order to use SSE+MMX optimized payloads we don't want to disable SSE+MMX instructions in the CPU after romstage. Change-Id: I51aeb01f04492ad7bc8b1fe181a4ae17fe0ca61e Signed-off-by: Stefan Reinauer <reinauer@google.com> Reviewed-on: http://review.coreboot.org/553 Tested-by: build bot (Jenkins) Reviewed-by: Ronald G. Minnich <rminnich@gmail.com> Reviewed-by: Patrick Georgi <patrick@georgi-clan.de>
2012-01-18Clean up AMD romstage.c serial outputMarc Jones
This cleans up the strings in romstage.c, removing the ugly "got past". Also, cleaned up comments and some spacing. Change-Id: I0124df76eb442f8a0009a31a8632e4fd67ed7782 Signed-off-by: Marc Jones <marcj303@gmail.com> Reviewed-on: http://review.coreboot.org/539 Tested-by: build bot (Jenkins) Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2012-01-18Add subsystem callbacks for VT8237x and VT890 family of chipsetsRudolf Marek
Change-Id: Id34615f0c229d276d72cdf984cf82ea8cc1a85bb Signed-off-by: Rudolf Marek <r.marek@assembler.cz> Signed-off-by: Patrick Georgi <patrick@georgi-clan.de> Reviewed-on: http://review.coreboot.org/523 Tested-by: build bot (Jenkins) Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2012-01-18Remove duplicated line of code in AMD wrappers.Marc Jones
This line was unnecessary and was duplicated on several mainboards. Change-Id: I438da05c770ded0bd32256f1c157cabcc383667a Signed-off-by: Marc Jones <marcj303@gmail.com> Reviewed-on: http://review.coreboot.org/541 Tested-by: build bot (Jenkins) Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2012-01-18Remove old AMD #defineMarc Jones
The #define REQUIRED_CALLOUTS is no longer used on these platforms. Change-Id: I536eb94119f1bc8f81e59ebefacdd4e04d0ed3ef Signed-off-by: Marc Jones <marcj303@gmail.com> Reviewed-on: http://review.coreboot.org/540 Tested-by: build bot (Jenkins) Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2012-01-18Clean up AMD romstage.c whitespace indent issuesMarc Jones
Change-Id: I1713f1a3b548cb8e8ea5cf57eef95486ceb05ab9 Signed-off-by: Marc Jones <marcj303@gmail.com> Reviewed-on: http://review.coreboot.org/538 Tested-by: build bot (Jenkins) Reviewed-by: Vikram Narayanan <vikram186@gmail.com> Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2012-01-18libpayload: style: compare null-pointers with NULL, not 0Patrick Georgi
Change-Id: I5efbfb75e2894bc8d8e50c8737cfee9738d15eda Signed-off-by: Patrick Georgi <patrick.georgi@secunet.com> Reviewed-on: http://review.coreboot.org/551 Tested-by: build bot (Jenkins) Reviewed-by: Peter Stuge <peter@stuge.se>
2012-01-18Add coreboot version to id areaPatrick Georgi
There was no good way to extract the build version from an image. This change will be mostly backward compatible: The only assumption that could break is that the board name string ends directly before the 3 dwords that represent .id's "header". Change-Id: I325491a0c42911d9d6ecd59e21ee1b756c987693 Signed-off-by: Patrick Georgi <patrick.georgi@secunet.com> Reviewed-on: http://review.coreboot.org/537 Reviewed-by: Peter Stuge <peter@stuge.se> Tested-by: build bot (Jenkins)
2012-01-18Unify ID_SECTION_OFFSET and mark it deprecatedPatrick Georgi
We used to put the id section at -0x10, with some boards overriding this to avoid collisions with romstraps. Hardcode the location at -0x80, at the possible expense of some space (0x70 bytes). This also makes the section easier to find in a binary image. At some point, CONFIG_ID_SECTION_OFFSET can be removed, so this option is moved to src/Kconfig.deprecated_options. Change-Id: I6ce2d6e94e57717939bda070bfe0c9df80ca2a89 Signed-off-by: Patrick Georgi <patrick.georgi@secunet.com> Reviewed-on: http://review.coreboot.org/549 Tested-by: build bot (Jenkins) Reviewed-by: Peter Stuge <peter@stuge.se>
2012-01-12lib: add ram_check_nodieSven Schnelle
The current implementation calls die() if memory checking fails. This isn't always what we want: one might want to print error registers, or do some other error handling. Introduce ram_check_nodie() for that reason. It returns 0 if ram check succeeded, otherwise 1. Change-Id: Ib9a9279120755cf63b5b3ba5e0646492c3c29ac2 Signed-off-by: Sven Schnelle <svens@stackframe.org> Reviewed-on: http://review.coreboot.org/532 Tested-by: build bot (Jenkins) Reviewed-by: Ronald G. Minnich <rminnich@gmail.com>
2012-01-11W83627HF: remove unused functionSven Schnelle
When CONFIG_EXPERT is set, compilation fails with: src/superio/winbond/w83627hf/superio.c:61:13: error: ‘w83627hf_16_bit_addr_qual’ defined but not used [-Werror=unused-function] cc1: all warnings being treated as errors This function isn't used in the code, so just remove it. Change-Id: I117e221fb3c3a20a7d7e7e2e86d7dbfdffc2cbff Signed-off-by: Sven Schnelle <svens@stackframe.org> Reviewed-on: http://review.coreboot.org/533 Tested-by: build bot (Jenkins)
2012-01-10MTRR: get physical address size from CPUIDSven Schnelle
The current code uses static values for the physical address size supported by a CPU. This isn't always the right value: I.e. on model_6[ef]x Core (2) Duo CPUs physical address size is 36, while Xeons from the same family have 38 bits, which results in invalid MTRR setup. Fix this by getting the right number from CPUID. Change-Id: If019c3d9147c3b86357f0ef0d9fda94d49d811ca Signed-off-by: Sven Schnelle <svens@stackframe.org> Reviewed-on: http://review.coreboot.org/529 Tested-by: build bot (Jenkins) Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2012-01-10Add missing HAVE_HARD_RESETSven Schnelle
Change-Id: I6b612dbd3eb6e8cc45f1c7abca85732fb64de98c Signed-off-by: Sven Schnelle <svens@stackframe.org> Reviewed-on: http://review.coreboot.org/531 Reviewed-by: Patrick Georgi <patrick@georgi-clan.de> Tested-by: build bot (Jenkins)
2012-01-10i945: fix tsc udelay()Sven Schnelle
The comparision is the wrong way round: as long as tsc is below tsc1, the timeout is not reached Change-Id: I75de74ef750b5a45be0156efaf10d7239a0b1136 Signed-off-by: Sven Schnelle <svens@stackframe.org> Reviewed-on: http://review.coreboot.org/530 Tested-by: build bot (Jenkins) Reviewed-by: Patrick Georgi <patrick@georgi-clan.de>
2012-01-10libpayload: Remove bitfield use from EHCI data structuresPatrick Georgi
We agreed that bitfields are a Bad Idea[tm]. Change-Id: If4c4cb748af340e2721b89fea8e035da0632971f Signed-off-by: Patrick Georgi <patrick.georgi@secunet.com> Reviewed-on: http://review.coreboot.org/480 Tested-by: build bot (Jenkins) Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org> Reviewed-by: Peter Stuge <peter@stuge.se>
2012-01-10libpayload: Remove bitfield use from UHCI data structuresPatrick Georgi
We agreed that bitfields are a Bad Idea[tm]. Change-Id: I1b2bcda28c52ad10bbe9429e04d126b555f7828a Signed-off-by: Patrick Georgi <patrick.georgi@secunet.com> Reviewed-on: http://review.coreboot.org/478 Tested-by: build bot (Jenkins) Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org> Reviewed-by: Peter Stuge <peter@stuge.se>
2012-01-10libpayload: Remove bitfield use from OHCI data structuresPatrick Georgi
We agreed that bitfields are a Bad Idea[tm]. Change-Id: Ic04f151091c359912835b8b3db488d2d41bd4bbb Signed-off-by: Patrick Georgi <patrick.georgi@secunet.com> Reviewed-on: http://review.coreboot.org/479 Tested-by: build bot (Jenkins) Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org> Reviewed-by: Peter Stuge <peter@stuge.se>
2012-01-09Un-perl commit-msg hookPatrick Georgi
To simplify installation on mingw a bit (even though git remains a pain), drop the perl dependency the commit-msg hook introduced to the coreboot development environment. It's replaced by awk which we use elsewhere already (and is a more lightweight utility in any case) Change-Id: I67adfe1ec43c898735d4bae4819ceb53e83c303b Signed-off-by: Patrick Georgi <patrick@georgi-clan.de> Reviewed-on: http://review.coreboot.org/78 Tested-by: build bot (Jenkins) Reviewed-by: Peter Stuge <peter@stuge.se>
2012-01-09Fix Geode GX2 + LX caching for tiny bootblock.Nils Jacobs
Change-Id: If681a33deb7df752b37c6a8a20482d3c374af936 Signed-off-by: Nils Jacobs <njacobs8@adsltotaal.nl> Reviewed-on: http://review.coreboot.org/528 Tested-by: build bot (Jenkins) Reviewed-by: Patrick Georgi <patrick@georgi-clan.de> Reviewed-by: Philip Prindeville <philipp@redfish-solutions.com>
2012-01-09ACPI: mark empty get_cst_entries() weakSven Schnelle
This function prevents the linker from choosing the right get_cst_entries(), preventing writing the _CST tables. Change-Id: I4bc0168aee110171faeaa081f217dfd1536bb821 Signed-off-by: Sven Schnelle <svens@stackframe.org> Signed-off-by: Patrick Georgi <patrick@georgi-clan.de> Reviewed-on: http://review.coreboot.org/496 Tested-by: build bot (Jenkins)
2012-01-08rs780: correct comment in switching_gpp_configurations()Jonathan A. Kollasch
Change-Id: I6417a92523eea7307d080669fbc4e16ee28c8a6c Signed-off-by: Jonathan A. Kollasch <jakllsch@kollasch.net> Reviewed-on: http://review.coreboot.org/524 Tested-by: build bot (Jenkins) Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2012-01-08adm1027: add return statementVikram Narayanan
Adds a missing return statment which will stop misleading the users Change-Id: I53741f1136b396e9493ce959b54efc00c9b09764 Signed-off-by: Vikram Narayanan <vikram186@gmail.com> Reviewed-on: http://review.coreboot.org/522 Tested-by: build bot (Jenkins) Reviewed-by: Patrick Georgi <patrick@georgi-clan.de> Reviewed-by: Ronald G. Minnich <rminnich@gmail.com> Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2012-01-08inteltool: Add support for dumping AMB registersSven Schnelle
Change-Id: I98615725afdb315caa67b2226224e3eb2a0e4393 Signed-off-by: Sven Schnelle <svens@stackframe.org> Reviewed-on: http://review.coreboot.org/525 Tested-by: build bot (Jenkins) Reviewed-by: Ronald G. Minnich <rminnich@gmail.com> Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2012-01-07.gitignore ectool, inteltool, msrtool, nvramtool and superiotoolPeter Stuge
Change-Id: I06e69d97ef3646f79104ec316ce932cc53894c92 Signed-off-by: Peter Stuge <peter@stuge.se> Reviewed-on: http://review.coreboot.org/485 Tested-by: build bot (Jenkins) Reviewed-by: Patrick Georgi <patrick@georgi-clan.de>
2012-01-07Eliminate magic numbersPhilip Prindeville
Use sizeof() on vendor and part# rather than explicit memory length. Change-Id: I2b7e0e4a8df6448d027cc61867382f161eb990d3 Signed-off-by: Philip Prindeville <philipp@redfish-solutions.com> Reviewed-on: http://review.coreboot.org/504 Tested-by: build bot (Jenkins) Reviewed-by: Patrick Georgi <patrick@georgi-clan.de>
2012-01-07Cleanup access to vendor/part # infoPhilip Prindeville
Instead of macros to access MAINBOARD record, use convenience functions. Store pointers to MAINBOARD and HEADER for use outside of CB code. Change-Id: I074e3a0df7d25726cbd942538bfdc5a63dd17e12 Signed-off-by: Philip Prindeville <philipp@redfish-solutions.com> Reviewed-on: http://review.coreboot.org/502 Tested-by: build bot (Jenkins) Reviewed-by: Patrick Georgi <patrick@georgi-clan.de>
2012-01-07Update geode GX2 tree to match LX.Nils Jacobs
Change-Id: I5b99c531e44ea09990b9da0b97213fb7945f34ee Signed-off-by: Nils Jacobs <njacobs8@adsltotaal.nl> Reviewed-on: http://review.coreboot.org/512 Tested-by: build bot (Jenkins) Reviewed-by: Patrick Georgi <patrick@georgi-clan.de>
2012-01-05rs780: use bitwise rather than boolean notJonathan A. Kollasch
Change-Id: Ie3872c57990f9784aafda14f8c7fc842b3a65260 Signed-off-by: Jonathan A. Kollasch <jakllsch@kollasch.net> Reviewed-on: http://review.coreboot.org/518 Tested-by: build bot (Jenkins) Reviewed-by: Ronald G. Minnich <rminnich@gmail.com> Reviewed-by: Marc Jones <marcj303@gmail.com>
2012-01-05Indentation: Various indentation fixesVikram Narayanan
Fixed indentation using indent tool in the src/drivers/i2c tree Change-Id: I5b396e5753544aff13ac5d16afc59e193a6b1da1 Signed-off-by: Vikram Narayanan <vikram186@gmail.com> Reviewed-on: http://review.coreboot.org/506 Tested-by: build bot (Jenkins) Reviewed-by: Kerry Sheh <shekairui@gmail.com> Reviewed-by: Marc Jones <marcj303@gmail.com>
2012-01-05Fix Fam14 AGESA ACPI table generationMarc Jones
The AGESA wrapper init late call generates the SSDT and other ACPI tables. The call was failing without heap space allocated causing the ASSERT messages in the output. I think are there may still be other issues in integrating the SSDT table with the DSDT, but now it is there to debug. The changes were made in Persimmon and copied to the other Fam14 mainboards. Change-Id: I2cfd14e07cb46d2f46f5a8cd21c4c9aab44e4ffd Signed-off-by: Marc Jones <marcj303@gmail.com> Reviewed-on: http://review.coreboot.org/517 Tested-by: build bot (Jenkins) Reviewed-by: Kerry Sheh <shekairui@gmail.com> Reviewed-by: Ronald G. Minnich <rminnich@gmail.com>
2012-01-05Clean up AMD Fam14 SSDTMarc Jones
The old SSDT ACPI code would only include the AGESA or the coreboot SSDT. Now include both. AGESA generates the Pstate SSDT and the second coreboot SSDT is for TOM and TOM2. Now, generate the coreboot SSDT instead of patching it. This fixes some ACPI errors in Linux and Windows bluescreens. The Persimmon acpi_tables.c is where the main changes were made and then replicated in the other Fam14 boards. Please test the other mainbords if you have one. Change-Id: I808c863597e024e3e8aeec0821e8618d96cc96a6 Signed-off-by: Marc Jones <marcj303@gmail.com> Reviewed-on: http://review.coreboot.org/516 Tested-by: build bot (Jenkins) Reviewed-by: Kerry Sheh <shekairui@gmail.com> Reviewed-by: Ronald G. Minnich <rminnich@gmail.com>
2012-01-05Fix Fam14 mainboard whitespaceMarc Jones
Fix whitespace and tab issues on fam14 mainbords in preperations for upcoming changes Change-Id: I6d63d428dde0a5d9748027e603b03de25d3be472 Signed-off-by: Marc Jones <marcj303@gmail.com> Reviewed-on: http://review.coreboot.org/515 Tested-by: build bot (Jenkins) Reviewed-by: Kerry Sheh <shekairui@gmail.com> Reviewed-by: Ronald G. Minnich <rminnich@gmail.com>
2012-01-05rs780: power down GPPSB SB lane pads in correct PCIe coreJonathan A. Kollasch
Change-Id: I059d5b155cae051f31cc2495f8a47d53e01af808 Signed-off-by: Jonathan A. Kollasch <jakllsch@kollasch.net> Reviewed-on: http://review.coreboot.org/519 Tested-by: build bot (Jenkins) Reviewed-by: Peter Stuge <peter@stuge.se>
2012-01-03Add missing EOT marker.Jonathan A. Kollasch
Omitted from commit 3d1d6bb4ecb15a12f48f871c623882bee9c0c576 Change-Id: Id3e94d615d50f0673cc5e3fde77ed6748d26ebd3 Signed-off-by: Paul Menzel <paulepanter@users.sourceforge.net> Signed-off-by: Jonathan A. Kollasch <jakllsch@kollasch.net> Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> Reviewed-on: http://review.coreboot.org/514 Reviewed-by: Peter Stuge <peter@stuge.se> Tested-by: build bot (Jenkins) Reviewed-by: Philip Prindeville <pprindeville@gmail.com>
2012-01-02F14 mainboard: mptable updateKerry Sheh
Add GNB internal graphic interrupt, correct southbridge hd audio device interrupt. and remove the dead code already commented out. south_station, union_station, inagua, persimmon and e350m1 mainboard are included herein. Change-Id: Ic7618d80e0432ed0e22d1c16e1adb8ba6cea2e59 Signed-off-by: Kerry Sheh <shekairui@gmail.com> Signed-off-by: Kerry Sheh <kerry.she@amd.com> Reviewed-on: http://review.coreboot.org/451 Tested-by: build bot (Jenkins) Reviewed-by: Marc Jones <marcj303@gmail.com>
2012-01-02F14 mainboard: update acpi interrupt routing in pic and apic modeKerry Sheh
Add interrupt routing for APU GNB internal Graphic and HD audio device, and other pcie bridge device in GNB. south_station, union_station, inagua, persimmon and e350m1 mainboard are included herein. Change-Id: I4b6e0fce8d34637c03de8ebfdadea008c98e193b Signed-off-by: Kerry Sheh <shekairui@gmail.com> Signed-off-by: Kerry Sheh <kerry.she@amd.com> Reviewed-on: http://review.coreboot.org/452 Tested-by: build bot (Jenkins) Reviewed-by: Marc Jones <marcj303@gmail.com>
2011-12-31White space and coding style fixes.Nils Jacobs
Change-Id: I14f39b5666fc18e8183723ec78a40a849d337736 Signed-off-by: Nils Jacobs <njacobs8@adsltotaal.nl> Reviewed-on: http://review.coreboot.org/511 Tested-by: build bot (Jenkins) Reviewed-by: Peter Stuge <peter@stuge.se>
2011-12-26Fix Fam10 MMCONF_SUPPORT_DEFAULT setting.Marc Jones
I misunderstood how kconfig select works. It needs to be selected with a config option. Moved the select to the correct location. Change-Id: If9b1e21e6cbc5af4671efb76cf87dd18dbbe2234 Signed-off-by: Marc Jones <marcj303@gmail.com> Reviewed-on: http://review.coreboot.org/487 Tested-by: build bot (Jenkins) Reviewed-by: Patrick Georgi <patrick@georgi-clan.de>
2011-12-26trivial:change the value type of POST_PORT in Kconfig from int to hexVikram Narayanan
trivial change in src/console/Kconfig Change-Id: Ib6bb4ccfabaa3af18b48a23a51a576b872d807a8 Signed-off-by: Vikram Narayanan <vikram186@gmail.com> Reviewed-on: http://review.coreboot.org/505 Tested-by: build bot (Jenkins) Reviewed-by: Patrick Georgi <patrick@georgi-clan.de>
2011-12-24Sconfig: parse Kconfig options from devicetree.cbKyösti Mälkki
Mainboard and chip Kconfig files have several build options that are redundant with information in devicetree.cb. This patch enables sconfig to auto-generate equivalent configuration. sconfig -s Generates mainboard's static.c file, as before. sconfig -b This operation creates mainboard's bootblock init code. By default, for every chip listed in mainboard/devicetree.cb, if there is a chip/bootblock.c file, the init function is called. A mainboard/bootblock.c file can be added to override default behaviour. sconfig -k This operation generates select -options for component paths. Change-Id: I808d44af552dbc5e0565d6a0f4f72c7be9f5740e Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com> Reviewed-on: http://review.coreboot.org/472 Tested-by: build bot (Jenkins) Reviewed-by: Patrick Georgi <patrick@georgi-clan.de>
2011-12-24Only BSP CPU writes CMOS in bootblock codeKyösti Mälkki
CMOS accesses are not safe for multi-processor and only the BSP CPU should count reboots and test CMOS sanity. A questionable single byte CMOS read access from AP CPUs remains. AP CPUs should always select the same romstage prefix as BSP CPU. Change-Id: I29118e33c07c0080c94abb90f703e38312c72432 Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com> Reviewed-on: http://review.coreboot.org/446 Tested-by: build bot (Jenkins) Reviewed-by: Patrick Georgi <patrick@georgi-clan.de>
2011-12-24libpayload: remove uhci_reg_maskXPatrick Georgi
Not that good an idea to start with. Coccinelle patch: @@ @@ -void ( -uhci_reg_mask8 | -uhci_reg_mask16 | -uhci_reg_mask32 ) - (...) { ... } @@ @@ -void ( -uhci_reg_mask8 | -uhci_reg_mask16 | -uhci_reg_mask32 ) - (...); @@ expression ctrl, reg, ormask; @@ -uhci_reg_mask32 (ctrl, reg, ~0, ormask) +uhci_reg_write32 (ctrl, reg, uhci_reg_read32 (ctrl, reg) | ormask) @@ expression ctrl, reg, ormask; @@ -uhci_reg_mask16 (ctrl, reg, ~0, ormask) +uhci_reg_write16 (ctrl, reg, uhci_reg_read16 (ctrl, reg) | ormask) @@ expression ctrl, reg, ormask; @@ -uhci_reg_mask8 (ctrl, reg, ~0, ormask) +uhci_reg_write8 (ctrl, reg, uhci_reg_read8 (ctrl, reg) | ormask) @@ expression ctrl, reg, andmask; @@ -uhci_reg_mask32 (ctrl, reg, andmask, 0) +uhci_reg_write32 (ctrl, reg, uhci_reg_read32 (ctrl, reg) & andmask) @@ expression ctrl, reg, andmask; @@ -uhci_reg_mask16 (ctrl, reg, andmask, 0) +uhci_reg_write16 (ctrl, reg, uhci_reg_read16 (ctrl, reg) & andmask) @@ expression ctrl, reg, andmask; @@ -uhci_reg_mask16 (ctrl, reg, andmask, 0) +uhci_reg_write16 (ctrl, reg, uhci_reg_read16 (ctrl, reg) & andmask) Change-Id: Id0eb8327293831e54249d43fd06d50963c793699 Signed-off-by: Patrick Georgi <patrick.georgi@secunet.com> Reviewed-on: http://review.coreboot.org/477 Tested-by: build bot (Jenkins) Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2011-12-24Let lib_get_sysinfo() pass through the success of get_coreboot_info()Philip Prindeville
The return status of get_coreboot_info() might be handy to a platform driver calling lib_get_sysinfo() to test for the presence of coreboot. Change-Id: I0176c93ee92c9dff733112026ee50f2ca797bdff Signed-off-by: Philip Prindeville <philipp@redfish-solutions.com> Reviewed-on: http://review.coreboot.org/503 Tested-by: build bot (Jenkins) Reviewed-by: Patrick Georgi <patrick@georgi-clan.de>
2011-12-24Fix missing cast back to void *Philip Prindeville
MEM_RANGE_PTR() also needs to return a pointer to untyped memory. Change-Id: I0ec64ad7bdb136d5e1a999bff3df6fa66eb29bf1 Signed-off-by: Philip Prindeville <philipp@redfish-solutions.com> Reviewed-on: http://review.coreboot.org/500 Tested-by: build bot (Jenkins) Reviewed-by: Patrick Georgi <patrick@georgi-clan.de>
2011-12-24Fix missing VM mappingPhilip Prindeville
When processing FORWARD records, we weren't accounting for the pointer being in the physical address space and not the virtual space instead. Change-Id: I35ef637fbec7886d4cfeac5fd650a17eae8d555a Signed-off-by: Philip Prindeville <philipp@redfish-solutions.com> Reviewed-on: http://review.coreboot.org/499 Tested-by: build bot (Jenkins) Reviewed-by: Patrick Georgi <patrick@georgi-clan.de>
2011-12-24Use void pointers for untyped memoryPhilip Prindeville
To avoid unnecessary casts, we can use untyped pointers when accessing individual records. Change-Id: I1d628d6e25f1e53b4fee34e7c2c4688a789c45a3 Signed-off-by: Philip Prindeville <philipp@redfish-solutions.com> Reviewed-on: http://review.coreboot.org/498 Tested-by: build bot (Jenkins) Reviewed-by: Patrick Georgi <patrick@georgi-clan.de>
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