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AgeCommit message (Expand)Author
2020-06-14mb/google/fizz: add variant chipset display initJeff Chase
2020-06-14util/intelmetool: Add support for Intel Cannon Point LP HECI ControllerMatt DeVillier
2020-06-14mb/google/dedede: Enable early EC software syncMeera Ravindranath
2020-06-14mb/google/dedede: Select Recovery Cache Kconfig optionMeera Ravindranath
2020-06-14sb/intel/i82801ix: Fix SPDX license headerKyösti Mälkki
2020-06-14mb/google/hatch: Switch USB2 port1 and port3 on NoibatEdward O'Callaghan
2020-06-14soc/amd/picasso/acpi: Add a wrapper method WAL1 for calling ALIB function 1Furquan Shaikh
2020-06-14ec/google/chromeec: Call \PNOT () on initializing AC power stateFurquan Shaikh
2020-06-13cpu/intel/car: Use symbols for CAR MTRR setupKyösti Mälkki
2020-06-13arch/x86: Add symbols for CAR MTRRs in linker scriptKyösti Mälkki
2020-06-13soc/intel/common: Introduce ASL2.0 syntaxAlexey Buyanov
2020-06-13arch/x86: Include id.ld unconditionally in memlayout.ldFurquan Shaikh
2020-06-13arch/x86: Drop early_ram.ldFurquan Shaikh
2020-06-13soc/amd/picasso: Place early stages and data buffers at the bottom of DRAMFurquan Shaikh
2020-06-13util/cbfstool: Drop IS_TOP_ALIGNED_ADDRESS() check in cbfstool_convert_fspFurquan Shaikh
2020-06-13cbmem_id: Add CBMEM ID for early DRAM usageFurquan Shaikh
2020-06-13soc/amd/picasso: Add custom memlayout.ld fileFurquan Shaikh
2020-06-13treewide: Add Kconfig variable MEMLAYOUT_LD_FILEFurquan Shaikh
2020-06-13mb/google/zork: update DRAM SPD table for vilbozPaul Ma
2020-06-12mb/google/volteer/var/voxel: Add memory parts and generate DRAM IDsFurquan Shaikh
2020-06-12tests: Add some basic warnings and fix resulting issuesJulius Werner
2020-06-12vendorcode/intel/fsp: Update Tiger Lake FSP Headers for v3197Srinidhi N Kaushik
2020-06-12mb/google/volteer: Customize PCH VR settings for better Sx power savingsVenkata Krishna Nimmagadda
2020-06-12soc/intel/tigerlake: Add devicetree support to change PCH VR settingsVenkata Krishna Nimmagadda
2020-06-12mb/google/dedede: Add new variant botenPeichao Wang
2020-06-12nb/intel/i945/rcven.c: Correct commentAngel Pons
2020-06-12nb/intel/i945: Clean up raminit coding styleAngel Pons
2020-06-12mb/google/hatch: Remove unused USB2 port from NoibatEdward O'Callaghan
2020-06-12soc/amd/picasso: Reconfigure SPI speeds after FSP-S has runFurquan Shaikh
2020-06-12sb/intel/i82801ix: Use PCI bitwise opsAngel Pons
2020-06-12mb/google/puff: Update i2c[2] and i2c[3] rise and fall timesSam McNally
2020-06-12sb/intel/i82801jx: Use PCI bitwise opsAngel Pons
2020-06-11soc/amd/picasso/uart: fix possible out of bounds accessFelix Held
2020-06-11vc/amd/fsp/platform_descriptors: drop prefix from PCIe/DDI structsFelix Held
2020-06-11mb/google/dedede: Add new variant drawciaWisley Chen
2020-06-11mb/google/volteer: Update DPTF TSR2 sensor ID for volteerDeepika Punyamurtula
2020-06-10Revert "util/abuild: Have abuild generate the .xcompile if it doesn't exist"Nico Huber
2020-06-10util/abuild: Ensure .xcompile existsNico Huber
2020-06-10amd/picasso: Load x86 microcode from CBFS modulesZheng Bao
2020-06-10device/xhci: Add xHCI utility to enumerate capabilitiesRaul E Rangel
2020-06-10mb/google/hatch: drop VBOOT_LID_SWITCH from hatch baseboardMatt DeVillier
2020-06-10soc/intel/common: Replace cse_bp and ME with cse_lite in all console logsSridhar Siricilla
2020-06-10mb/google/dedede/variants/waddledoo: Adjust I2Cs CLK to meet specJohn Su
2020-06-10nb/intel/i945: Use PCI bitwise opsAngel Pons
2020-06-10sb/intel/bd82x6x: Use PCI bitwise opsAngel Pons
2020-06-10sb/intel/bd82x6x/pcie.c: Move `pch_pcie_acpi_name` upAngel Pons
2020-06-10soc/amd/picasso: Enable APOB/MRC training data cacheFurquan Shaikh
2020-06-10drivers/intel/fsp2_0: Allow SoC/mainboard to update NvsBufferPtrFurquan Shaikh
2020-06-10mb/google/zork: Set FMDFILE for zork familyFurquan Shaikh
2020-06-10Documentation: Add section about SPD tools for TGL and JSLFurquan Shaikh