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2009-04-22A small utility to dump the RAM of a laptop's Embedded/EnvironmentalStefan Reinauer
Controller. Nothing fancy, does not know any laptops, EC types, or what the values mean. It just dumps them. For the dump method, have a look at the ACPI 3.0b spec. Signed-off-by: Stefan Reinauer <stepan@coresystems.de> Acked-by: Uwe Hermann <uwe@hermann-uwe.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4163 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-04-21- function prototypes do not need "extern"Stefan Reinauer
- fix up debug messages of usb debug console (trivial) Signed-off-by: Stefan Reinauer <stepan@coresystems.de> Acked-by: Stefan Reinauer <stepan@coresystems.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4162 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-04-21flashrom: Add support for Gigabyte GA-MA790FX-DQ6. This board usesCarl-Daniel Hailfinger
IT8718F LPC->SPI translation for the flash chip. Tested by Mateusz Murawski. Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> Acked-by: Mateusz Murawski <matowy@tlen.pl> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4161 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-04-21remove a few warnings, and comments á la #include <foo.h> // include file ↵Stefan Reinauer
foo.h (trivial) Signed-off-by: Stefan Reinauer <stepan@coresystems.de> Acked-by: Stefan Reinauer <stepan@coresystems.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4160 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-04-21add define for Role-Based Error Reporting to PCIe defines (trivial)Stefan Reinauer
Signed-off-by: Stefan Reinauer <stepan@coresystems.de> Acked-by: Stefan Reinauer <stepan@coresystems.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4159 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-04-21fix a warning for a misnamed define, and make a debug message printk_debugStefan Reinauer
(trivial) Signed-off-by: Stefan Reinauer <stepan@coresystems.de> Acked-by: Stefan Reinauer <stepan@coresystems.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4158 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-04-21CONFIG_CHIP_NAME is dead (trivial)Stefan Reinauer
Signed-off-by: Stefan Reinauer <stepan@coresystems.de> Acked-by: Stefan Reinauer <stepan@coresystems.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4157 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-04-21small updates as suggested by Carl-Daniel Hailfinger.Stefan Reinauer
Signed-off-by: Stefan Reinauer <stepan@coresystems.de> Acked-by: Stefan Reinauer <stepan@coresystems.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4156 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-04-21Update to this very old documentStefan Reinauer
Signed-off-by: Stefan Reinauer <stepan@coresystems.de> Acked-by: Stefan Reinauer <stepan@coresystems.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4155 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-04-21Add a helper function to acpigen to create _PSD tables.Patrick Georgi
Signed-off-by: Patrick Georgi <patrick.georgi@coresystems.de> Acked-by: Stefan Reinauer <stepan@coresystems.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4154 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-04-21Add an "-l <num>" argument to abuild that sets the LOGLEVEL variablesPatrick Georgi
to the specified value. Only change Config-abuild.lb, as the others are for manual buildtarget use - adding __LOGLEVEL__ there would kill the build as it isn't replaced by the actual content. Signed-off-by: Patrick Georgi <patrick.georgi@coresystems.de> Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> Acked-by: Stefan Reinauer <stepan@coresystems.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4153 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-04-21Eliminate various issues brought up by scan-build.Patrick Georgi
Signed-off-by: Patrick Georgi <patrick.georgi@coresystems.de> Acked-by: Stefan Reinauer <stepan@coresystems.de> Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4152 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-04-21scan-build prefers -include over --includes=, gcc knows both.Patrick Georgi
With this change, romcc knows -include and the build system uses it. Also use a full path to settings.h because scan-build has trouble finding it otherwise. Signed-off-by: Patrick Georgi <patrick.georgi@coresystems.de> Acked-by: Joseph Smith <joe@settoplinux.org> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4151 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-04-21flashrom: Support Macronix MX2512805D flash chipStephan Guilloux
Signed-off-by: Stephan Guilloux <stephan.guilloux@free.fr> Acked-by: Peter Stuge <peter@stuge.se> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4150 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-04-21flashrom: Trivial indent fixStephan Guilloux
Signed-off-by: Stephan Guilloux <stephan.guilloux@free.fr> Acked-by: Peter Stuge <peter@stuge.se> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4149 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-04-21Somehow svn add didn't work for the include files. Commit the remainderCarl-Daniel Hailfinger
of r4147. Thanks to Myles' patch adding support for include statements, refactoring Config.lb became possible. Factor out ROM size calculation from Config.lb. This patch converts 87 boards (with and without USE_FAILOVER_IMAGE), but it has to work around a parser bug. 89 files changed, 209 insertions(+), 2415 deletions(-) A total of 2206 removed lines. Abuild works for all changed boards on khepri. Myles writes: I've tested serengeti for the failover portion and s2892 for the nofailover portion. ldoptions are exactly the same and they both boot the same. Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> Acked-by: Myles Watson <mylesgw@gmail.com> Acked-by: Peter Stuge <peter@stuge.se> Acked-by: Uwe Hermann <uwe@hermann-uwe.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4148 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-04-21Thanks to Myles' patch adding support for include statements,Carl-Daniel Hailfinger
refactoring Config.lb became possible. Factor out ROM size calculation from Config.lb. This patch converts 87 boards (with and without USE_FAILOVER_IMAGE), but it has to work around a parser bug. 89 files changed, 209 insertions(+), 2415 deletions(-) A total of 2206 removed lines. Abuild works for all changed boards on khepri. Myles writes: I've tested serengeti for the failover portion and s2892 for the nofailover portion. ldoptions are exactly the same and they both boot the same. Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> Acked-by: Myles Watson <mylesgw@gmail.com> Acked-by: Peter Stuge <peter@stuge.se> Acked-by: Uwe Hermann <uwe@hermann-uwe.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4147 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-04-20After verification in datasheets, all MX25 accept the same opcodesStephan Guilloux
0x60 and 0xC7 for Chip Erase. Signed-off-by: Stephan Guilloux <stephan.guilloux@free.fr> Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4146 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-04-20A little more info. Failover docs are next, then proposed new mechanismRonald G. Minnich
Signed-off-by: Ronald G. Minnich <rminnich@gmail.com> Acked-by: Ronald G. Minnich <rminnich@gmail.com> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4145 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-04-20This patch adds Myles Watson
cbfstool extract [FILE] [NAME] It also factors out the csize calculation in rom_add, and fixes rom_delete so that it can handle deleting the last entry. Signed-off-by: Myles Watson <mylesgw@gmail.com> Acked-by: Ronald G. Minnich <rminnich@gmail.com> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4144 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-04-20Continuing the slow doc-o updateRonald G. Minnich
Signed-off-by: Ronald G. Minnich <rminnich@gmail.com> Acked-by: Ronald G. Minnich <rminnich@gmail.com> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4143 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-04-20flashrom: board_enables: reconstruct table.Luc Verhaegen
This patch restores the pciid based board matching table. It makes this table readable and hackable again, and the only disadvantage is that the right margin is way beyond the rather dogmatic 80. All 0x0000 pci ids have been string replaced by 0 to more easily spot missing ids, and extra comments have been added to explain how the various entries are used. Signed-Off-By: Luc Verhaegen <libv@skynet.be> Acked-by: Peter Stuge <peter@stuge.se> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4142 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-04-20flashrom: Trivial README change Flashrom->flashromPeter Stuge
Signed-off-by: Peter Stuge <peter@stuge.se> Acked-by: Peter Stuge <peter@stuge.se> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4141 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-04-20Fix implicit declarations of done_cache_as_ram_main by adding aCarl-Daniel Hailfinger
prototype for these assembler functions. Affected boards: digitallogic/msm800sev pcengines/alix1c Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> Acked-by: Peter Stuge <peter@stuge.se> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4140 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-04-19flashrom: MX25L1605 and 1635 accept Chip Erase opcodes 60 and C7Stephan Guilloux
Signed-off-by: Stephan Guilloux <stephan.guilloux@free.fr> Acked-by: Peter Stuge <peter@stuge.se> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4139 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-04-19Add MX25L1635D support, as discussed on #coreboot.Stephan Guilloux
Signed-off-by: Stephan Guilloux <stephan.guilloux@free.fr> Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4138 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-04-18There is a typo in amdk8/raminit_f.c regarding the preprocessor symbol ↵Ronald Hoogenboom
QRANK_DIMM_SUPPORT in line 2208, which caused the protected code fragment never to be included for compilation. Signed-off-by: Ronald Hoogenboom <hoogenboom30@zonnet.nl> Acked-by: Marc Jones <marcj303@gmail.com> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4137 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-04-18drop the ChangeLog.cvsimport document from the transition from CVS Stefan Reinauer
to GNU arch. Does anyone remember that? What a fun! All history is in the SVN repository, including the CVS and TLA parts, so nothing is lost. Signed-off-by: Stefan Reinauer <stepan@coresystems.de> Acked-by: Stefan Reinauer <stepan@coresystems.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4136 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-04-18Drop long-obsolete HOWTO, it's still available in wikified form atUwe Hermann
http://www.coreboot.org/VIA_EPIA-M. Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de> Acked-by: Uwe Hermann <uwe@hermann-uwe.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4135 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-04-18s/LinuxBIOS/coreboot/.Uwe Hermann
Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de> Acked-by: Uwe Hermann <uwe@hermann-uwe.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4134 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-04-18Add support for the ASUS P2B-D mainboard.Uwe Hermann
This is a pretty standard "yet another 440BX" target, so the code is pretty straight-forward. It's a dual-CPU machine, which might need some fixing, I'm booting with 'maxcpus=0' for now. It does boot successfully up to a Linux login prompt, though. Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de> Acked-by: Peter Stuge <peter@stuge.se> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4133 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-04-17flashrom: Add VIA PC3500G board. It has SPI flash behind ITE8716 on LPC.Peter Stuge
Signed-off-by: Peter Stuge <peter@stuge.se> Acked-by: illdred <illdred@gmail.com> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4132 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-04-17Add include to config.gMyles Watson
Usage: include path path can be relative to the current directory or absolute starting at /src. I tested it with: include /config/absolute.lb include relative.lb in /src/northbridge/amd/amdk8/Config.lb which included /src/northbridge/amd/amdk8/relatvie.lb /src/config/absolute.lb Signed-off-by: Myles Watson <mylesgw@gmail.com> Acked-by: Ronald G. Minnich <rminnich@gmail.com> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4131 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-04-17Improvements for the coreboot v2 README:Uwe Hermann
- Point to the 'Payloads' wiki page for more info. - Document (most of) the build requirements of v2. - Point to the wiki for build instructions (wiki needs more docs, though). - Mention QEMU for testing coreboot, also point to wiki page. Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de> Acked-by: Uwe Hermann <uwe@hermann-uwe.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4130 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-04-17Updating documentation as I get ready to put v3-style startup in (which Ronald G. Minnich
I have working in an early version in my tree). Corrections welcome. Signed-off-by: Ronald G. Minnich <rminnich@gmail.com> Acked-by: Ronald G. Minnich <rminnich@gmail.com> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4129 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-04-17There are two identical cfgfile rules in config.g. Remove one of them.Myles Watson
Signed-off-by: Myles Watson <mylesgw@gmail.com> Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4128 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-04-17This patch allows you to add lines of the formMyles Watson
pci_rom PATH vendor_id = # device_id = # to Config.lb files. No more changing the ROM_SIZE to add an option ROM, and no more manual prepending. Examples: pci_rom ../ragexl.rom vendor_id = 0x1002 device_id = 0x4752 pci_rom ../nic.rom vendor_id = 0x1100 device_id = 0x4152 Signed-off-by: Myles Watson <mylesgw@gmail.com> Acked-by: Ronald G. Minnich <rminnich@gmail.com> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4127 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-04-17Add VIA CX700 support, plus VIA vt8454c reference board support.Stefan Reinauer
Signed-off-by: Stefan Reinauer <stepan@coresystems.de> Acked-by: Uwe Hermann <uwe@hermann-uwe.de> Acked-by: Ronald G. Minnich <rminnich@gmail.com> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4126 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-04-17This needed to be removed. Ronald G. Minnich
Signed-off-by: Ronald G. Minnich <rminnich@gmail.com> Acked-by: Ronald G. Minnich <rminnich@gmail.com> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4125 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-04-16Following patch flushes the instruction queue when we set PE=0. This is normallyRudolf Marek
done by FAR JMP, but here it is more tricky because we run at EIP>1MB. Many thanks to Marc and Kevin to tell me how to fix it The trick is to use 0x66 prefix (done with ljmpl) it will allow to jump in real mode to any EIP addresses ;) Signed-off-by: Rudolf Marek <r.marek@assembler.cz> Acked-by: Peter Stuge <peter@stuge.se> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4124 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-04-16I deleted mptable.c in my patch, but forgot to svn rm it.Myles Watson
Signed-off-by: Myles Watson <mylesgw@gmail.com> Acked-by: Myles Watson <mylesgw@gmail.com> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4123 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-04-15v2/src romfs->cbfs renamePeter Stuge
romfs.c has been replaced by cbfs.c. Signed-off-by: Peter Stuge <peter@stuge.se> Acked-by: Peter Stuge <peter@stuge.se> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4121 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-04-15This patch cleans up mpspec.h and allows it to be included whenMyles Watson
HAVE_MP_TABLE=0 It also removes the artifacts from the Asus m2v-mx_se that were necessary before the change. Signed-off-by: Myles Watson <mylesgw@gmail.com> Acked-by: Peter Stuge <peter@stuge.se> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4120 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-04-15Add -r|--remove option to force abuild to remove the output directoryUwe Hermann
after every board build, in order to save disk space if you don't need the actual output files. Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de> Acked-by: Peter Stuge <peter@stuge.se> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4119 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-04-15Some coding style and consistency fixes (trivial).Uwe Hermann
Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de> Acked-by: Uwe Hermann <uwe@hermann-uwe.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4117 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-04-15r4097 broke the tree and it remains unfixed :-( Stefan Reinauer
Repeat: Cosmetic patches shall not break the tree for 20 revisions. Signed-off-by: Stefan Reinauer <stepan@coresystems.de> Acked-by: Stefan Reinauer <stepan@coresystems.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4116 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-04-14EPIA-CN does not have any ACPI tables. Fixes manual and auto build here.Peter Stuge
Signed-off-by: Peter Stuge <peter@stuge.se> Acked-by: Peter Stuge <peter@stuge.se> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4115 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-04-14util/cbfstool/tools/rom-mk*->cbfs-mk* renamePeter Stuge
Signed-off-by: Peter Stuge <peter@stuge.se> Acked-by: Ronald G. Minnich <rminnich@gmail.com> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4114 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-04-14v2/src romfs->cbfs renamePeter Stuge
This also has the config tool changes in v2/util. Rename romfs.[ch]->cbfs.[ch] and sed romfs->cbfs romtool->cbfstool ROMFS->CBFS Signed-off-by: Peter Stuge <peter@stuge.se> Acked-by: Ronald G. Minnich <rminnich@gmail.com> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4113 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-04-14fix up the tree.Stefan Reinauer
Signed-off-by: Stefan Reinauer <stepan@coresystems.de> Acked-by: Stefan Reinauer <stepan@coresystems.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4112 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
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