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2010-05-25Long ago we agreed on kicking the _direct appendix because everything inStefan Reinauer
coreboot is direct. This patch does it. Signed-off-by: Stefan Reinauer <stepan@coresystems.de> Acked-by: Stefan Reinauer <stepan@coresystems.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5586 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2010-05-25Fix usbdebug compilation.Stefan Reinauer
Signed-off-by: Stefan Reinauer <stepan@coresystems.de> Acked-by: Stefan Reinauer <stepan@coresystems.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5585 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2010-05-25cosmetics.Stefan Reinauer
Signed-off-by: Stefan Reinauer <stepan@coresystems.de> Acked-by: Stefan Reinauer <stepan@coresystems.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5584 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2010-05-24Fix VGA after switching to realmode_interrupt()Michael Marineau
Signed-off-by: Michael Marineau <mike@marineau.org> Acked-by: Stefan Reinauer <stepan@coresystems.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5583 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2010-05-23consistently use decimal for the register offsets, and fix comment typos.Stefan Reinauer
Signed-off-by: Stefan Reinauer <stepan@coresystems.de> Acked-by: Stefan Reinauer <stepan@coresystems.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5582 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2010-05-23Fix bug from r5476 re CS5536 device search during GeodeLX PCI domain enablePeter Stuge
cs5536.c:chipsetinit() is called during northbridge pci_domain_enable() which happens before scan_bus() so the device tree does not have PCI vendor/device ids yet. Let's use dev_find_slot() for now. This works only as long as the CS5536 has PCI device id 0xf in all mainboards, and a better solution is needed in case that ever changes! Signed-off-by: Peter Stuge <peter@stuge.se> Acked-by: Nathan Williams <nathan@traverse.com.au> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5581 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2010-05-22Add tinybootblock support for broadcom/bcm5785.Patrick Georgi
In the bootblock, 4MB of ROM are mapped instead of the default 1MB Signed-off-by: Patrick Georgi <patrick.georgi@coresystems.de> Acked-by: Myles Watson <mylesgw@gmail.com> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5580 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2010-05-21Add "reasonable" values in ASL at places we overwrite fromStefan Reinauer
coreboot later. Current ASL compilers check for validity and complain about the dummy values. Signed-off-by: Stefan Reinauer <stepan@coresystems.de> Acked-by: Patrick Georgi <patrick.georgi@coresystems.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5579 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2010-05-21Fix amdk8_util.asl and explain behaviour a bit.Myles Watson
Signed-off-by: Myles Watson <mylesgw@gmail.com> Acked-by: Patrick Georgi <patrick.georgi@coresystems.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5578 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2010-05-21Get rid of this warning:Myles Watson
src/cpu/amd/model_10xxx/fidvid.c:758: warning: 'fid_max' may be used uninitialized in this function Quoting Marc: It [fid_max] should be initialized to 0. The !nb_cof_vid_update would mean that the fidmax shouldn't change so the value isn't important, but 0 would be the safest if there is another hole in the logic and CPUs are not matched. Signed-off-by: Myles Watson <mylesgw@gmail.com> Acked-by: Myles Watson <mylesgw@gmail.com> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5577 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2010-05-21Use lists instead of arrays for resources in devices to reduce memory usage.Myles Watson
Signed-off-by: Myles Watson <mylesgw@gmail.com> Acked-by: Patrick Georgi <patrick.georgi@coresystems.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5576 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2010-05-20Move generation of mptable entries for ISA to generic code.Patrick Georgi
Signed-off-by: Patrick Georgi <patrick.georgi@coresystems.de> Acked-by: Myles Watson <mylesgw@gmail.com> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5575 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2010-05-20Add support for the Traverse Technologies Geos mainboard.Nathan Williams
This board is similar to the AMD Norwich mainboard. Signed-off-by: Nathan Williams <nathan@traverse.com.au> Acked-by: Ronald G. Minnich <rminnich@gmail.com> Acked-by: Stefan Reinauer <stepan@coresystems.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5574 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2010-05-19Move the 'USE CMOS' Kconfig question.Joe Korty
Move the 'USE CMOS' question from the top level to the General Setup section of Kconfig. Signed-off-by: Joe Korty <joe.Korty@ccur.com> Acked-by: Stefan Reinauer <stepan@coresystems.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5573 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2010-05-19cosmetic comment changes.Stefan Reinauer
Signed-off-by: Stefan Reinauer <stepan@coresystems.de> Acked-by: Stefan Reinauer <stepan@coresystems.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5572 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2010-05-19The AMD Fam10 code breaks with coreboot 4.5.0.Stefan Reinauer
Potentially caused by reordering. Going back to 4.4.4 which is known working on Fam10 until gcc or the Fam10 code is fixed. Signed-off-by: Stefan Reinauer <stepan@coresystems.de> Acked-by: Stefan Reinauer <stepan@coresystems.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5571 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2010-05-19Fix path for mingw workaround. Trivial.Patrick Georgi
Signed-off-by: Patrick Georgi <patrick.georgi@coresystems.de> Acked-by: Patrick Georgi <patrick.georgi@coresystems.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5570 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2010-05-18get rid of some duplicate inclusion warnings.Stefan Reinauer
Signed-off-by: Stefan Reinauer <stepan@coresystems.de> Acked-by: Stefan Reinauer <stepan@coresystems.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5569 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2010-05-17New buildgcc version.Stefan Reinauer
Signed-off-by: Stefan Reinauer <stepan@coresystems.de> Acked-by: Patrick Georgi <patrick.georgi@coresystems.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5568 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2010-05-17drop old patches from crossgccStefan Reinauer
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5567 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2010-05-17msrtool: Print hex values using only as many digits as the field needsPeter Stuge
Signed-off-by: Peter Stuge <peter@stuge.se> Acked-by: Peter Stuge <peter@stuge.se> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5566 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2010-05-17msrtool: Remove some unneeded castsPeter Stuge
Signed-off-by: Peter Stuge <peter@stuge.se> Acked-by: Peter Stuge <peter@stuge.se> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5565 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2010-05-16Sorry for this for second time. Now compile tested for both cases ;)Rudolf Marek
Signed-off-by: Rudolf Marek <r.marek@assembler.cz> Acked-by: Rudolf Marek <r.marek@assembler.cz> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5564 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2010-05-16Sorry for this. I fixed that reverting the change for ROMCC.Rudolf Marek
Signed-off-by: Rudolf Marek <r.marek@assembler.cz> Acked-by: Rudolf Marek <r.marek@assembler.cz> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5563 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2010-05-16Following patch reworks car_disable into C. Tested, works here. I comparedRudolf Marek
also the GCC generated code and it looks all right. Please test on some multicore CPU. I added the "memory" clobber to read_cr0 / write_cr0 function as it is in Linux Kernel. Seems that if this is missing, GCC is too smart and messes the order of reads/writes to CR0 (not tested if really a problem here, but be safe for future users of this function ;) Signed-off-by: Rudolf Marek <r.marek@assembler.cz> Acked-by: Stefan Reinauer <stepan@coresystems.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5562 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2010-05-16Part of 5560 Dunno why I need extra delete after move.Rudolf Marek
Signed-off-by: Rudolf Marek <r.marek@assembler.cz> Acked-by: Stefan Reinauer <stepan@coresystems.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5561 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2010-05-16Following patch reprograms SIL3114 into PCI IDE native mode compatible class ↵Rudolf Marek
code allowing legacy software to recognize it as IDE and boot from it. I think this should be the default for two Tyan boards (k8s aka s2882 and s2881). Rename the directory to sil prefix to match the Linux kernel naming. (And I think it was a SiliconSystems wish to be named sil ;) Signed-off-by: Rudolf Marek <r.marek@assembler.cz> Acked-by: Stefan Reinauer <stepan@coresystems.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5560 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2010-05-16Add support for the Getac P470 Stefan Reinauer
Signed-off-by: Stefan Reinauer <stepan@coresystems.de> Acked-by: Uwe Hermann <uwe@hermann-uwe.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5559 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2010-05-16v2 -> v4Stefan Reinauer
Signed-off-by: Stefan Reinauer <stepan@coresystems.de> Acked-by: Stefan Reinauer <stepan@coresystems.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5558 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2010-05-16Add two new superios to coreboot:Stefan Reinauer
- SMSC FDC37n972 - SMSC SIO10N268 Signed-off-by: Stefan Reinauer <stepan@coresystems.de> Acked-by: Uwe Hermann <uwe@hermann-uwe.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5557 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2010-05-16Add TI PCI 7412 support.Stefan Reinauer
Signed-off-by: Stefan Reinauer <stepan@coresystems.de> Acked-by: Uwe Hermann <uwe@hermann-uwe.de> Acked-by: Myles Watson <mylesgw@gmail.com> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5556 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2010-05-14ITE IT8671F: Add it8671f_48mhz_clkin().Anders Jenbo
This fixes serial console on GIGABYTE GA-6BXE. Signed-off-by: Anders Jenbo <anders@jenbo.dk> Acked-by: Uwe Hermann <uwe@hermann-uwe.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5555 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2010-05-14Add initial support for the GIGABYTE GA-6BXE.Anders Jenbo
Signed-off-by: Anders Jenbo <anders@jenbo.dk> Acked-by: Uwe Hermann <uwe@hermann-uwe.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5554 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2010-05-14clean up some prototypesStefan Reinauer
Signed-off-by: Stefan Reinauer <stepan@coresystems.de> Acked-by: Stefan Reinauer <stepan@coresystems.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5553 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2010-05-14i945:Stefan Reinauer
* fix some potential compiler issues with newer gccs * add some more comments * make 32bit accesses for feature test functions * make some objects drivers because they contain a pci_driver struct. Signed-off-by: Stefan Reinauer <stepan@coresystems.de> Acked-by: Stefan Reinauer <stepan@coresystems.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5552 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2010-05-14more acpica fixes... The tricky part is the stuff in the AMD mainboard ↵Stefan Reinauer
directories. Signed-off-by: Stefan Reinauer <stepan@coresystems.de> Acked-by: Stefan Reinauer <stepan@coresystems.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5551 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2010-05-14Fix i945 ACPI for ASL Optimizing Compiler version 20100428.Stefan Reinauer
The values are overwritten on the fly but without the patch iasl will refuse to compile the code. Signed-off-by: Stefan Reinauer <stepan@coresystems.de> Acked-by: Stefan Reinauer <stepan@coresystems.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5550 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2010-05-14Various superiotool fixes.Uwe Hermann
- IT8671F/IT8687R: - Fix typo: Parallel port register 0x60 value is 0x03 (not 0x01). - Fix typo: APC register 0xf6 is 0x00. - Drop register 0x07 (LDN 0 / none), that's not useful and not listed in any of the other Super I/Os either, it always contains the LDN number selected "last time", which is useless. - Fix indentation and other cosmetics. - Cosmetics, and consistency fixes in LDN names of various Super I/Os. Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de> Acked-by: Uwe Hermann <uwe@hermann-uwe.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5549 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2010-05-14Remove another set of includes from Fam10 romstages:Patrick Georgi
northbridge/amd/amdht/ht_wrapper.c northbridge/amd/amdfam10/raminit_amdmct.c cpu/amd/model_10xxx/fidvid.c pc80/mc146818rtc_early.c They are now included by the fam10 chipset code that requires them. Signed-off-by: Patrick Georgi <patrick.georgi@coresystems.de> Acked-by: Peter Stuge <peter@stuge.se> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5548 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2010-05-14fix SeaBIOS loading on GX2.Nils Jacobs
Signed-off-by: Nils Jacobs <njacobs8@hetnet.nl> Acked-by: Stefan Reinauer <stepan@coresystems.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5547 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2010-05-14Fix warning. Hardware tested and didn't change behavior.Stefan Reinauer
Signed-off-by: Stefan Reinauer <stepan@coresystems.de> Acked-by: Stefan Reinauer <stepan@coresystems.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5546 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2010-05-14license header fixes Nils Jacobs
Signed-off-by: Nils Jacobs <njacobs8@hetnet.nl> Acked-by: Stefan Reinauer <stepan@coresystems.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5545 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2010-05-14This patch cleanes up the Wyse S50 port and unifies the memmory regionsNils Jacobs
with Geode LX , adds gpl2 headers plus some white space fixes. This is build and boot tested.(of course vsa loading is stil not fixed,it now runs forever with :"Oops, exception 13 while executing option rom") Signed-off-by: Nils Jacobs <njacobs8@hetnet.nl> Acked-by: Stefan Reinauer <stepan@coresystems.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5544 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2010-05-11Change real mode API to allow passing intXX number or entry point andStefan Reinauer
some register values from C. This theoretically fixes non-vga option roms, but it also allows to use the same assembler code for option roms and vsm. It will also make using the bootsplash without yabel a lot easier. Factor out and improve BDA setup, do some rom segment setup for those option roms that need it. Don't call the coreboot exception handler if an exception occurs in real mode. It's only partly usable, but mainly the Kontron 986LCD-M (and other i945GM boards) choke on an exception #6 (invalid opcode). This particular issue is not introduced by the changes in this patch but has been around for quite a while at least. Signed-off-by: Stefan Reinauer <stepan@coresystems.de> Acked-by: Patrick Georgi <patrick.georgi@coresystems.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5543 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2010-05-10Make show_all_routes work for fam10.Myles Watson
Signed-off-by: Myles Watson <mylesgw@gmail.com> Acked-by: Myles Watson <mylesgw@gmail.com> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5542 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2010-05-10High tables don't have to be on node 0 on K8. Make it less restrictive.Myles Watson
Signed-off-by: Myles Watson <mylesgw@gmail.com> Acked-by: Myles Watson <mylesgw@gmail.com> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5541 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2010-05-09Remove extra NULL #define in amdht code. ThePatrick Georgi
common one is enough. Trivial Signed-off-by: Patrick Georgi <patrick.georgi@coresystems.de> Acked-by: Patrick Georgi <patrick.georgi@coresystems.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5540 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2010-05-09Move includes to where they are needed. This allows to simplifyPatrick Georgi
romstage.c files in mainboards. Signed-off-by: Patrick Georgi <patrick.georgi@coresystems.de> Acked-by: Stefan Reinauer <stepan@coresystems.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5539 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2010-05-09Remove pc80/serial.c includes in ROMCC boards and includePatrick Georgi
it centrally in console/console.h instead. Signed-off-by: Patrick Georgi <patrick.georgi@coresystems.de> Acked-by: Stefan Reinauer <stepan@coresystems.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5538 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2010-05-09Begin implementation support to IT8512/IT8513Anton Kochkov
Signed-off-by: Anton Kochkov <anton.kochkov@gmail.com> Acked-by: Stefan Reinauer <stepan@coresystems.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5537 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
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