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2010-03-16Features supported in SB700 code:Zheng Bao
* SATA initialization. * USB initialization. * HDA initialization. * LPC initialization. * IDE initialization. * SMBUS initialization. Note: 1. I tried to add the description of every step to the code. For example, if it is made based on rpr, section 2.4.5, I will pasted the words from 2.4.5 to the c code. But the document I worked with might be different with the most updated one. A new section has been added and the 2.4.5 might be changed to 2.5.5. That migh lead to confusing. I correct every comment if I met one. But I have to confess that I am so reluctant to find out everyone. I believe it will be correct in the long run. 2. I only test the SATA port 0-3. The ports 4, 5 are "PATA emulations". I am confused about it. 3. This patch is not only about SB700. Actually it should be SB7x0. But I dont think it is nice to change everything to SB7x0. It is ugly, isn't it. As far as I know, they all use the same code with revision checking. If you guys think it is appropriate, please modify it to sb7x0. Signed-off-by: Zheng Bao <zheng.bao@amd.com> Acked-by: Marc Jones <marcj303@gmail.com> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5218 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2010-03-161. This patch is about the pci header of RS780 and SB700. It is madeZheng Bao zheng.bao
seperatedly because both RS780 and SB700 will modify the pci_ids.h. It maybe will cause conflict if the sequence the patches are applied is different with the one they are created. 2. Dev 0-10 of RS780 has AMD's Vendor ID. So we think it is better to define the Device ID as XXX_AMD_RS780_XXX. Does anyone think it is better to move this definition to the AMD zone? That will split the RS780 into two parts. Is it inappropriate? Signed-off-by: Zheng Bao <zheng.bao@amd.com Acked-by: Marc Jones <marcj303@gmail.com> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5217 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2010-03-16Make CLANG selectable in KconfigPatrick Georgi
Signed-off-by: Patrick Georgi <patrick.georgi@coresystems.de> Acked-by: Stefan Reinauer <stepan@coresystems.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5216 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2010-03-16This patch is what I needed to compile coreboot with LLVM.Stefan Reinauer
- call va_* directly if coreboot is running on GCC so we don't need to maintain hacks to get to stdarg.h - only define LIBGCC_FILE_NAME if it's an absolute path. GCC and LLVM just print "libgcc.a" if the file is not there. Signed-off-by: Stefan Reinauer <stepan@coresystems.de> Acked-by: Ronald G. Minnich <rminnich@gmail.com> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5215 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2010-03-16back out r5212 and r5210; Follow the thread of Stefan Reinauer
http://www.coreboot.org/pipermail/coreboot/2010-March/056501.html for the details. Signed-off-by: Stefan Reinauer <stepan@coresystems.de> Acked-by: Stefan Reinauer <stepan@coresystems.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5214 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2010-03-15Create a new build.h on every make call; this makes sure it contains aStefan Reinauer
valid compiler signature and time stamp. Since we maintain correct build.h dependencies in the source code we can also drop "prepare2" Signed-off-by: Stefan Reinauer <stepan@coresystems.de> Acked-by: Ronald G. Minnich <rminnich@gmail.com> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5213 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2010-03-15Use copy_triple only on non-flattened nodes.Patrick Georgi
Signed-off-by: Patrick Georgi <patrick.georgi@coresystems.de> Acked-by: Stefan Reinauer <stepan@coresystems.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5212 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2010-03-15Add an AM2R2 entry in to the src/arch/i386/Makefile.inc.Zheng Bao
Signed-off-by: Zheng Bao <zheng.bao@amd.com> Acked-by: Patrick Georgi <patrick.georgi@coresystems.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5211 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2010-03-14Fix segfault of romcc when complex assignment operatorsPatrick Georgi
were applied to non-trivial LHSs, eg. c[4] |= 1; Signed-off-by: Patrick Georgi <patrick.georgi@coresystems.de> Acked-by: Stefan Reinauer <stepan@coresystems.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5210 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2010-03-14Move deprecated Kconfig options to their own file,Patrick Georgi
so it's clear that they should be gone. More can (and should) be added, but this is a start. Of course, eliminating the uses of the flags (and then the flags themselves) that are in Kconfig.deprecated_options is a noble task for the future :-) Signed-off-by: Patrick Georgi <patrick.georgi@coresystems.de> Acked-by: Stefan Reinauer <stepan@coresystems.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5209 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2010-03-14Add scan-build support to the build system.Patrick Georgi
When configured in Kconfig, just running "make" calls scan-build as appropriate (however, it does not check for the presence of scan-build) The target directory for the scan-build report is configurable and defaults to the scan-build default of /tmp/scan-build-$date-$num abuild is adapted to properly run scanbuild when ran with the -sb option. Signed-off-by: Patrick Georgi <patrick.georgi@coresystems.de> Acked-by: Stefan Reinauer <stepan@coresystems.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5208 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2010-03-14ICH4 update, fix ATA init, drop SATA (chipset doesn't have SATA)Stefan Reinauer
fix some PCI IDs, enable USB bus mastering, add some license headers, ... LPC code needs another look, but I think we're getting there. Signed-off-by: Stefan Reinauer <stepan@coresystems.de> Acked-by: Joseph Smith <joe@settoplinux.org> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5207 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2010-03-13Fix llshellStefan Reinauer
Signed-off-by: Stefan Reinauer <stepan@coresystems.de> Acked-by: Patrick Georgi <patrick.georgi@coresystems.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5206 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2010-03-13Use CPU_INTEL_SLOT_1 for Slot 1 boards (trivial).Uwe Hermann
This fixes a longstanding TODO item. Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de> Acked-by: Uwe Hermann <uwe@hermann-uwe.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5205 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2010-03-13Add SDRAMPWR_4DIMM Kconfig option (not user-visible in menuconfig).Keith Hui
Each Intel 440BX board should select this option if it has 4 DIMM slots on the PCB, and _not_ select it (it defaults to 'n') if it has 3 DIMMs on the PCB. Signed-off-by: Keith Hui <buurin@gmail.com> Acked-by: Uwe Hermann <uwe@hermann-uwe.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5204 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2010-03-13Fix supermicro/h8qme_fam10 by enabling SPD ROM properly.Knut Kujat
Also configure GPIOs so the power LED is working. Some whitespace cleanups (but by no means comprehensive) Signed-off-by: Knut Kujat <knuku@gap.upv.es> Acked-by: Myles Watson <mylesgw@gmail.com> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5203 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2010-03-11Replace spaces with tabs. Trivial.Myles Watson
Signed-off-by: Myles Watson <mylesgw@gmail.com> Acked-by: Myles Watson <mylesgw@gmail.com> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5202 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2010-03-11Replace clear_memory with memset.Myles Watson
Replace set_init_ram_access with the call to set_var_mtrr. Remove unused #include statments. Signed-off-by: Myles Watson <mylesgw@gmail.com> Acked-by: Patrick Georgi <patrick.georgi@coresystems.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5201 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2010-03-10The following patch implements Opteron Fam 10 rev D (aka Istanbul)Arne Georg Gleditsch
support for coreboot. I have not updated MAX_CPUS for all fam10 mainboards, but it might make sense to multiply those by 1.5. Signed-off-by: Arne Georg Gleditsch <arne.gleditsch@numascale.com> I assume the line pci_write_config32(NODE_PCI(nodeid, 0), 0x168, dword); should be put outside the loop. Everything seems to be fine. I don't have Istanbul to test. I have read every changes and they all look good. Acked-by: Zheng Bao <zheng.bao@amd.com> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5200 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2010-03-09sb600 has problems with the virtual wire mode setup in setup_ioapic(). It ↵Marc Jones
causes problems when interrupts are enabled (specifically timer). Previously the sb600 setup was equivalent to clear_ioapic(), so that is what we will do for now. Signed-off-by: Marc Jones <marcj303@gmail.com> Acked-by: Stefan Reinauer <stepan@coresystems.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5199 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2010-03-08Remove Kconfig entries that disablePatrick Georgi
WAIT_BEFORE_CPUS_INIT. It's disabled by default (see src/cpu/x86/Kconfig) Signed-off-by: Patrick Georgi <patrick.georgi@coresystems.de> Acked-by: Myles Watson <mylesgw@gmail.com> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5198 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2010-03-08Set options to make AMD CAR code compile correctly,Arne Georg Gleditsch
and increase MAX_CPUS to aid support 6-core CPUs. Signed-off-by: Arne Georg Gleditsch <arne.gleditsch@numascale.com> Acked-by: Patrick Georgi <patrick.georgi@coresystems.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5197 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2010-03-08Trivial fix, use correct define.Mathias Krause
Signed-off-by: Mathias Krause <Mathias.Krause@secunet.com> Acked-by: Stefan Reinauer <stepan@coresystems.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5196 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2010-03-06More readable recursive descent macro in MakefilePatrick Georgi
Signed-off-by: Patrick Georgi <patrick.georgi@coresystems.de> Acked-by: Stefan Reinauer <stepan@coresystems.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5195 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2010-03-06440BX: Do not hardcode DIMM number + size anymore.Keith Hui
The code currently assumes a 4-DIMM-slots board, this will be fixed soon. Signed-off-by: Keith Hui <buurin@gmail.com> Acked-by: Uwe Hermann <uwe@hermann-uwe.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5194 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2010-03-06Add support for the 0x06B1 CPU ID for Celeron (Tualatin).Keith Hui
Signed-off-by: Keith Hui <buurin@gmail.com> Acked-by: Uwe Hermann <uwe@hermann-uwe.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5193 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2010-03-05Remove redundant run_bios prototype. Trivial.Myles Watson
Signed-off-by: Myles Watson <mylesgw@gmail.com> Acked-by: Myles Watson <mylesgw@gmail.com> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5192 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2010-03-051. Move run_bios prototype to device.hMyles Watson
2. Use time.h for get_time() and move tb_freq into functions.c 3. Move read_io and write_io to io.c and make them static 4. Make a couple of functions static in interrupt.c 5. Refactor a cast from char[] to u64 to get rid of potential alignment problems and a warning Signed-off-by: Myles Watson <mylesgw@gmail.com> Acked-by: Stefan Reinauer <stepan@coresystems.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5191 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2010-03-05i945 mini patch:Stefan Reinauer
- don't skip the reset on S4 violations. Specs ask us to do this so we do it - hlt on waiting for reset instead of hot looping. Signed-off-by: Stefan Reinauer <stepan@coresystems.de> Acked-by: Stefan Reinauer <stepan@coresystems.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5190 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2010-03-05Fix creation of coreboot.bootblock when -O2 is specified instead of -Os (4GB ↵Stefan Reinauer
image issue). According to some GCC folks -Os should be considered a buggy and unreliable code path, so at least keep -O2 working. coreboot_ram is only 4KB bigger. Signed-off-by: Stefan Reinauer <stepan@coresystems.de> Acked-by: Stefan Reinauer <stepan@coresystems.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5189 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2010-03-05Add support for the ASUS P2B-LS mainboard.Keith Hui
Signed-off-by: Keith Hui <buurin@gmail.com> Acked-by: Uwe Hermann <uwe@hermann-uwe.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5188 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2010-03-05Add proper Slot 1 CPU support code/infrastructure.Keith Hui
Signed-off-by: Keith Hui <buurin@gmail.com> Acked-by: Uwe Hermann <uwe@hermann-uwe.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5187 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2010-03-05This patch fixes two things:Stefan Reinauer
- -m32 is already defined by xcompile if the compiler is a 64bit compiler so drop it from the Makefile. - allow "obj-.. += foo.o" for util/, too. Otherwise the source files in util/x86emu/ put their objects in util/ instead of $(obj)/util Signed-off-by: Stefan Reinauer <stepan@coresystems.de> Acked-by: Stefan Reinauer <stepan@coresystems.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5186 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2010-03-05This patch is from 2009-10-20Uwe Hermann
Convert all DEBUG_SMBUS, DEBUG_SMI, and DEBUG_RAM_SETUP custom and local #defines into globally configurable kconfig options (and Options.lb options for as long as newconfig still exists) which can be enabled by the user in the "Debugging" menu. The respective menu items only appear if a board is selected where the chipset code actually provides such additional DEBUG output. All three variables default to 0 / off for now. Also, drop a small chunk of dead/useless code in the src/northbridge/via/cn700/raminit.c file, which would otherwise break compilation. Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de> Reworked to still apply to trunk, added X86EMU_DEBUG (and make the x86emu/yabel code only work printf instead of a redefined version of printk and Acked-by: Stefan Reinauer <stepan@coresystems.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5185 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2010-03-01Whitespace changes to make s2912_fam10/ms9652_fam10 more similar.Uwe Hermann
Also, fix another typo in the ms9652 board name. Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de> Acked-by: Uwe Hermann <uwe@hermann-uwe.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5184 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2010-03-01Drop unused doit.sh files (trivial).Uwe Hermann
Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de> Acked-by: Uwe Hermann <uwe@hermann-uwe.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5183 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2010-03-01Various cometic and coding-style fixes (trivial).Uwe Hermann
- Fix whitespace, alignment, and indentation in a few places. - Some more consistency fixes in license headers. - Fix incomplete license header: src/mainboard/msi/ms9652_fam10/devicetree.cb. - Fix typo for LIMIT_HT_SPEED_1800: s/1.6GHz/1.8GHz/. - Fix typo in src/mainboard/msi/ms9652_fam10/Kconfig: s/MS-9256/MS-9252/. Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de> Acked-by: Uwe Hermann <uwe@hermann-uwe.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5182 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2010-03-01- Simplify stack size determination: MAX_CPUS * STACK_SIZEPatrick Georgi
- Check that this doesn't run into vga/oprom/bios area at link time - Avoid overly complicated and not well understood hack which avoids that area by leaving a hole in the stack area. - Adapt technexion/tim5690 to put ramstage at 1MB Signed-off-by: Patrick Georgi <patrick.georgi@coresystems.de> Acked-by: Myles Watson <mylesgw@gmail.com> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5181 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2010-03-01Add msi/ms9652_fam10 board.Timothy Pearson
Updated Timothy's patch to match recent changes in the tree. It's build tested. Signed-off-by: Timothy Pearson <tpearson@raptorengineeringinc.com> Acked-by: Ronald G. Minnich <rminnich@gmail.com> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5180 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2010-03-01Allow per-board setting of HT clock and width soTimothy Pearson
less than optimal PCB designs can still work reliably with reduced clock. Signed-off-by: Timothy Pearson <tpearson@raptorengineeringinc.com> Acked-by: Patrick Georgi <patrick.georgi@coresystems.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5179 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2010-03-01Fix YABEL guards; make debugging optional; fix some warningsStefan Reinauer
Signed-off-by: Stefan Reinauer <stepan@coresystems.de> Acked-by: Stefan Reinauer <stepan@coresystems.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5178 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2010-03-01This patch implements MBI (modular bios interface) support to the i830 chipset.Stefan Reinauer
This is needed on the IP1000T to get VGA output. The VGA option rom will ask through an SMI for hardware specifics (in form of a VBT, video bios table) which the SMI handler copies into the VGA option rom. Signed-off-by: Stefan Reinauer <stepan@coresystems.de> Acked-by: Ronald G. Minnich <rminnich@gmail.com> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5177 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2010-03-01- Add rules that build either 4 or 5 ssdts (only those variants exist in the ↵Patrick Georgi
board now) - Change ACPI_SSDTX_NUM to either 4 or 5 for boards that have ssdtX.asl files, according to the number of ssdtX.asl there. - Remove custom ssdt rules Signed-off-by: Patrick Georgi <patrick.georgi@coresystems.de> Acked-by: Peter Stuge <peter@stuge.se> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5176 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2010-02-28Use the romstraps build infrastructure created for "tinybootblock"Patrick Georgi
(chipset_bootblock_inc and chipset_bootblock_lds) instead of using chipset specific rules for "bigbootblock" in the generic i386 Makefile. It also adds rules for the romstraps of * southbridge/nvidia/ck804 * southbridge/sis/sis966 * northbridge/via/vx800 for the benefit of both image layouts. Signed-off-by: Patrick Georgi <patrick.georgi@coresystems.de> Acked-by: Stefan Reinauer <stepan@coresystems.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5175 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2010-02-28disable AP_CODE_IN_CAR. The K8 code has an alternate code path to do the job,Stefan Reinauer
and it's not working anyways. Signed-off-by: Stefan Reinauer <stepan@coresystems.de> Acked-by: Stefan Reinauer <stepan@coresystems.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5174 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2010-02-28use names instead of numbers where possible, also print a better message if noStefan Reinauer
keyboard is connected. Signed-off-by: Stefan Reinauer <stepan@coresystems.de> Acked-by: Stefan Reinauer <stepan@coresystems.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5173 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2010-02-28Add attribute((noreturn)) to romccStefan Reinauer
It doesn't do anything, but it allows the same code to be compiled with gcc and romcc. Signed-off-by: Stefan Reinauer <stepan@coresystems.de> Acked-by: Ronald G. Minnich <rminnich@gmail.com> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5172 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2010-02-28- Add config flag for boards that have their own fadt.cPatrick Georgi
This should eventually go, as fadt seems to be better put into the southbridge - Add config flag for boards that have get_bus_conf.c Might be cleaned out as well, no idea - Use flags where appropriate. - Move the following rules to src/arch/i386/Makefile.inc: - fadt.o - dsdt.o - acpi_tables.o - get_bus_conf.o - Rename objs_dsl_template in toplevel Makefile to the more appropriate objs_asl_template - Remove all Makefiles that are empty now, which includes src/mainboard/Makefile.k8_CAR.inc and src/mainboard/Makefile.k8_ck804.inc and the include statements that used these files. - Add workaround to intel/xe7501devkit: It uses ACPI in an unusual way: It adds a MADT, but no DSDT. As this is highly unusual, I didn't want to add explicit support for that scenario (and encourage such uses that way), and added a dummy dsdt.asl instead. It will be linked to dsdt.o, but not linked into the final binary. Signed-off-by: Patrick Georgi <patrick.georgi@coresystems.de> Acked-by: Stefan Reinauer <stepan@coresystems.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5171 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2010-02-28assert.h: have the same information on asserts in romcc and non-romcc code.Stefan Reinauer
Signed-off-by: Stefan Reinauer <stepan@coresystems.de> Acked-by: Ronald G. Minnich <rminnich@gmail.com> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5170 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2010-02-27Put .config, build/, coreboot-builds (abuild) andPatrick Georgi
temporary/backup files to svn:ignore Signed-off-by: Patrick Georgi <patrick.georgi@coresystems.de> Acked-by: Patrick Georgi <patrick.georgi@coresystems.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5169 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
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