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2012-02-17amd/sb700: Move HAVE_HARD_RESET to southbridgePatrick Georgi
No in-tree board using that chipset has it not selected, so move selection from boards to southbridge. Change-Id: I7a7a1919b7a555156b8da21e8db7dd8f682d68e1 Signed-off-by: Patrick Georgi <patrick@georgi-clan.de> Reviewed-on: http://review.coreboot.org/661 Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org> Tested-by: build bot (Jenkins)
2012-02-17intel/i82801cx: Move HAVE_HARD_RESET to southbridgePatrick Georgi
No in-tree board using that chipset has it not selected, so move selection from boards to southbridge. Change-Id: Ifba0b65d81af60774f368d151e935ae1cc768336 Signed-off-by: Patrick Georgi <patrick@georgi-clan.de> Reviewed-on: http://review.coreboot.org/662 Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org> Tested-by: build bot (Jenkins)
2012-02-17sis/sis966: Move HAVE_HARD_RESET to southbridgePatrick Georgi
No in-tree board using that chipset has it not selected, so move selection from boards to southbridge. Change-Id: I9762ef01fc10c453ef643599c1c5dc8ee78081c3 Signed-off-by: Patrick Georgi <patrick@georgi-clan.de> Reviewed-on: http://review.coreboot.org/663 Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org> Tested-by: build bot (Jenkins)
2012-02-17intel/i82801ex: Move HAVE_HARD_RESET to southbridgePatrick Georgi
No in-tree board using that chipset has it not selected, so move selection from boards to southbridge. Change-Id: I83105e92d1cc5d2d12aede564a1ab9c5d912ac56 Signed-off-by: Patrick Georgi <patrick@georgi-clan.de> Reviewed-on: http://review.coreboot.org/664 Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org> Tested-by: build bot (Jenkins)
2012-02-17intel/sch: Move HAVE_HARD_RESET to southbridgePatrick Georgi
No in-tree board using that chipset has it not selected, so move selection from boards to southbridge. Change-Id: I521deecf58e5d5de303f1ef2f5ff7e965294de18 Signed-off-by: Patrick Georgi <patrick@georgi-clan.de> Reviewed-on: http://review.coreboot.org/665 Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org> Tested-by: build bot (Jenkins)
2012-02-17amd/sb800: Move HAVE_HARD_RESET to southbridgePatrick Georgi
No in-tree board using that chipset has it not selected, so move selection from boards to southbridge. (cimx/sb800 is a "different" chipset) Change-Id: If7cf2a141a1f2df60f687c51fbd760aa405c8480 Signed-off-by: Patrick Georgi <patrick@georgi-clan.de> Reviewed-on: http://review.coreboot.org/666 Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org> Tested-by: build bot (Jenkins)
2012-02-17broadcom/bcm5785: Move HAVE_HARD_RESET to southbridgePatrick Georgi
No in-tree board using that chipset has it not selected, so move selection from boards to southbridge. Change-Id: Id95660f088c8240606d45abf326cd5eefca30da3 Signed-off-by: Patrick Georgi <patrick@georgi-clan.de> Reviewed-on: http://review.coreboot.org/658 Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org> Tested-by: build bot (Jenkins)
2012-02-17libpayload: enforce const correctness for CMOS getter/setterMathias Krause
Input only arguments to {get,set}_option*() should be const to catch programming errors early. Change-Id: I560001a8e9226dfd156a4e529fcad20549236ebd Signed-off-by: Mathias Krause <mathias.krause@secunet.com> Reviewed-on: http://review.coreboot.org/652 Tested-by: build bot (Jenkins) Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2012-02-17Avoid ../../.. paths in ASL filesPatrick Georgi
The current directory is always part of the search path of cpp when using #include "..." Change-Id: I74fe39e0c79835e4b9a927afcbeab21040d8ae52 Signed-off-by: Patrick Georgi <patrick@georgi-clan.de> Reviewed-on: http://review.coreboot.org/648 Tested-by: build bot (Jenkins) Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2012-02-17Rename i945 ACPI files to not carry an i945_ prefixPatrick Georgi
In the spirit of the earlier renames. Change-Id: I458a42c79a164483120169d1822ffa6861cc3aff Signed-off-by: Patrick Georgi <patrick@georgi-clan.de> Reviewed-on: http://review.coreboot.org/647 Tested-by: build bot (Jenkins) Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2012-02-17libpayload: fix compiler warning for first_cmos_entry()Mathias Krause
The 'name' argument to lookup_cmos_entry() is declared to be 'char *' but we pass an empty string ("") which is 'const char[]' so the compiler legitimatly warns about discarded qualifiers here. Fix this by passing NULL as 'name'. Minor nitpick: The NULL test in lookup_cmos_entry() is superfluous as our implementation of strnlen() can handle NULL pointers gracefully. But for an average C hacker it just doesn't feel right not to do so. Change-Id: I592917d12d8fa840804c0d19e38b844427064fef Signed-off-by: Mathias Krause <mathias.krause@secunet.com> Reviewed-on: http://review.coreboot.org/651 Tested-by: build bot (Jenkins) Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2012-02-17nvidia/ck804: Move HAVE_HARD_RESET to southbridgePatrick Georgi
No in-tree ck804-using board has it not selected, so move selection from boards to southbridge. Change-Id: I3064b406cfd5ad18067c597bd5b5866a720f7e87 Signed-off-by: Patrick Georgi <patrick@georgi-clan.de> Reviewed-on: http://review.coreboot.org/657 Tested-by: build bot (Jenkins) Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2012-02-17Remove whitespace.Patrick Georgi
Fix issues reported by new lint test. Change-Id: I077a829cb4a855cbb3b71b6eb5c66b2068be6def Signed-off-by: Patrick Georgi <patrick@georgi-clan.de> Reviewed-on: http://review.coreboot.org/646 Tested-by: build bot (Jenkins) Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2012-02-17lint: Add test for whitespace issues in the codePatrick Georgi
So far it tests for trailing whitespace. "Upstream" files (bison/flex's .?_shipped, kconfig, vendorcode) are ignored. Change-Id: I7af1954d537fd05f06cd210ac130dac87892159b Signed-off-by: Patrick Georgi <patrick@georgi-clan.de> Reviewed-on: http://review.coreboot.org/645 Tested-by: build bot (Jenkins) Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2012-02-17amd/amd8111: Move HAVE_HARD_RESET to southbridgePatrick Georgi
No in-tree amd8111-using board has it not selected, so move selection from boards to southbridge. Change-Id: Iabbaa4cd2fd367ed6decec7ef5cdcbae3b264d52 Signed-off-by: Patrick Georgi <patrick@georgi-clan.de> Reviewed-on: http://review.coreboot.org/654 Reviewed-by: Marc Jones <marcj303@gmail.com> Tested-by: build bot (Jenkins)
2012-02-17via/cx700: Move HAVE_HARD_RESET to northbridgePatrick Georgi
No in-tree cx700-using board has it not selected, so move selection from boards to northbridge. Change-Id: Ifa79954a48cf99b5f7e49960eafce805401e571c Signed-off-by: Patrick Georgi <patrick@georgi-clan.de> Reviewed-on: http://review.coreboot.org/656 Tested-by: build bot (Jenkins) Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2012-02-17intel/82801dx: Move HAVE_HARD_RESET to southbridgePatrick Georgi
No in-tree 82801dx-using board has it not selected, so move selection from boards to southbridge. Change-Id: I69671cb6411a6cd9c791059ae9546dff3aff702c Signed-off-by: Patrick Georgi <patrick@georgi-clan.de> Reviewed-on: http://review.coreboot.org/655 Reviewed-by: Marc Jones <marcj303@gmail.com> Tested-by: build bot (Jenkins) Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2012-02-17Exit building if romstage.bin is larger than size of XIPzbao
When the romstage.bin becomes bigger than the size of XIP, the cbfstool can not allocate the romstage in the CBFS. But it doesn't report an error. It will take quite a while to find out the root cause. Change-Id: I5be2a46a8b57934f14c5a0d4596f3bec4251e0aa Signed-off-by: Zheng Bao <zheng.bao@amd.com> Signed-off-by: zbao <fishbaozi@gmail.com> Reviewed-on: http://review.coreboot.org/650 Reviewed-by: Patrick Georgi <patrick@georgi-clan.de> Tested-by: build bot (Jenkins) Reviewed-by: Marc Jones <marcj303@gmail.com>
2012-02-17Mainboard: Add AMD dinar mainboard.Kerry Sheh
Dinar mainboard is an AMD evaluation board for Orochi Platform family15 model 00-0f processor. The mainbaord has dual G34 Socket, SR5690/SR5670/SR5650 and SP5100 chipsets. 16 cores InterLagos Opteron processor are supported. Windows 7 are verified on this platform. Change-Id: Id97d35e7bca9f0d422841e23f4b762f1ed101ea0 Signed-off-by: Kerry Sheh <kerry.she@amd.com> Signed-off-by: Kerry Sheh <shekairui@gmail.com> Reviewed-on: http://review.coreboot.org/564 Tested-by: build bot (Jenkins) Reviewed-by: Marc Jones <marcj303@gmail.com>
2012-02-17SIO: Add smsc sio1036 superioKerry Sheh
Change-Id: Iaf5519f304f9f16f7ff6e4b02060bb75a3605ce9 Signed-off-by: Kerry Sheh <kerry.she@amd.com> Signed-off-by: Kerry Sheh <shekairui@gmail.com> Reviewed-on: http://review.coreboot.org/563 Tested-by: build bot (Jenkins) Reviewed-by: Marc Jones <marcj303@gmail.com>
2012-02-17SIO: Add smsc/sch4037 superio supportKerry Sheh
Change-Id: I3b113a27541b8efd096f3bd44e6621344ec916a5 Signed-off-by: Kerry Sheh <kerry.she@amd.com> Signed-off-by: Kerry Sheh <shekairui@gmail.com> Reviewed-on: http://review.coreboot.org/562 Tested-by: build bot (Jenkins) Reviewed-by: Marc Jones <marcj303@gmail.com>
2012-02-16M4A785-M,M4A785T-M: fix SSDT tablesDenis 'GNUtoo' Carikli
This commit is based on the commit 94fa3db36688e8db133aebe14d480b0c4722e4c9 (AMD Mahogany Fam10 ACPI table fixes.) Change-Id: I9a9bf955de0a2a7accdbce8561b23596a8641af4 Signed-off-by: Denis 'GNUtoo' Carikli <GNUtoo@no-log.org> Reviewed-on: http://review.coreboot.org/636 Tested-by: build bot (Jenkins) Reviewed-by: Kerry Sheh <shekairui@gmail.com> Reviewed-by: Marc Jones <marcj303@gmail.com>
2012-02-16M4A785T-M: fix TOM2.Denis 'GNUtoo' Carikli
This commit is based on the commit 94fa3db36688e8db133aebe14d480b0c4722e4c9 (AMD Mahogany Fam10 ACPI table fixes.) With commit permit to boot without pci=nocrs on the M4A785T-M board. Before the fix dmesg contained the following: [ 0.452071] ACPI Error: [TOM2] Namespace lookup failure, AE_NOT_FOUND (20110112/psargs-359) [ 0.480085] ACPI Error: [TOM2] Namespace lookup failure, AE_NOT_FOUND (20110112/psargs-359) [ 0.788222] ACPI Error: [TOM2] Namespace lookup failure, AE_NOT_FOUND (20110112/psargs-359) Now it only contains: [ 0.312102] TOM: 0000000080000000 aka 2048M Change-Id: I5d517604abe938af19b70d57d92c1f973114c1cd Signed-off-by: Denis 'GNUtoo' Carikli <GNUtoo@no-log.org> Reviewed-on: http://review.coreboot.org/635 Tested-by: build bot (Jenkins) Reviewed-by: Kerry Sheh <shekairui@gmail.com> Reviewed-by: Marc Jones <marcj303@gmail.com>
2012-02-16SB700 southbridge: AMD SB700/SP5100 southbridge CIMX wrapperKerry Sheh
Change-Id: If924b7eb176e7d3d82fa394929b653b1ced3a743 Signed-off-by: Kerry Sheh <kerry.she@amd.com> Signed-off-by: Kerry Sheh <shekairui@gmail.com> Reviewed-on: http://review.coreboot.org/561 Tested-by: build bot (Jenkins) Reviewed-by: Marc Jones <marcj303@gmail.com>
2012-02-16AGESA F15: AGESA family15 model 00-0fh northbridge wrapperKerry Sheh
Change-Id: I87c4d47f19161c604b0285102bb3809c8337375a Signed-off-by: Kerry Sheh <kerry.she@amd.com> Signed-off-by: Kerry Sheh <shekairui@gmail.com> Reviewed-on: http://review.coreboot.org/556 Tested-by: build bot (Jenkins) Reviewed-by: Marc Jones <marcj303@gmail.com>
2012-02-16HWM: Nuvoton W83795G/ADG HWM supportKerry Sheh
Supermicro H8QGI-F 1 Unit Chassis contain 9 system Fans, they are controled by a separate W83795G Hardware Monitor chip. This patch adds Nuvoton W83795G/ADG HWM support. Change-Id: I8756f5ed02dc2fa0884cde36e51451fd8aacee27 Signed-off-by: Kerry Sheh <kerry.she@amd.com> Signed-off-by: Kerry Sheh <shekairui@gmail.com> Reviewed-on: http://review.coreboot.org/569 Tested-by: build bot (Jenkins) Reviewed-by: Marc Jones <marcj303@gmail.com>
2012-02-16Mainboard: Supermicro/h8qgi mainboard updateKerry Sheh
1. Supermicro H8QGI mainboard update to support both family10 Revison D processor and family15 model 00-0fh processor in one binary image. 2. RD890/SR56X0 IO hub CIMX wrapper support. 3. SP5100/SB700 southbridge CIMX wrapper support. Both 8 cores and 16 Cores InterLagos Opteron Processor are tested on this platform. Debian Linux 5.0 and Windows Server 2008 R2 Statdard are tested. Change-Id: Iaad8c9b08310813441188deee6797b3f6dd37d6d Signed-off-by: Kerry Sheh <kerry.she@amd.com> Signed-off-by: Kerry Sheh <shekairui@gmail.com> Reviewed-on: http://review.coreboot.org/567 Tested-by: build bot (Jenkins) Reviewed-by: Marc Jones <marcj303@gmail.com>
2012-02-16SIO: Winbond w83627dhg updateKerry Sheh
1. Stop include c file. 2. W83627dhg Pin 89, Pin 90 are multi function pins, add support to select them to I2C function. Change-Id: I42eaaf7d70aa48d7edf2710349b51e401526c1a6 Signed-off-by: Kerry Sheh <kerry.she@amd.com> Signed-off-by: Kerry Sheh <shekairui@gmail.com> Reviewed-on: http://review.coreboot.org/565 Tested-by: build bot (Jenkins) Reviewed-by: Marc Jones <marcj303@gmail.com>
2012-02-16RD890: AMD RD890/SR56X0 CIMX wrapperKerry Sheh
Support AMD RD890 CIMX support AMD RD890TV, RX780, RD780, SR56x0, RD890 and 990FX chipsets. Change-Id: I39dc5fc316fbb465808bac48a13a49b7d867f04f Signed-off-by: Kerry Sheh <kerry.she@amd.com> Signed-off-by: Kerry Sheh <shekairui@gmail.com> Reviewed-on: http://review.coreboot.org/559 Tested-by: build bot (Jenkins) Reviewed-by: Marc Jones <marcj303@gmail.com>
2012-02-16pci_ids: Add AMD F15h model 00-0f and F10h cpu HT device pci idsKerry Sheh
Change-Id: I13905f5730d08510c8f0f6e652f41a679d618d1b Signed-off-by: Kerry Sheh <kerry.she@amd.com> Signed-off-by: Kerry Sheh <shekairui@gmail.com> Reviewed-on: http://review.coreboot.org/609 Tested-by: build bot (Jenkins) Reviewed-by: Marc Jones <marcj303@gmail.com>
2012-02-16AGESA F15: AGESA family15 model 00-0fh cpu wrapperKerry Sheh
Change-Id: I7580bc063c09d99d3fca8b20cd39df2384a6ad44 Signed-off-by: Kerry Sheh <kerry.she@amd.com> Signed-off-by: Kerry Sheh <shekairui@gmail.com> Reviewed-on: http://review.coreboot.org/555 Tested-by: build bot (Jenkins) Reviewed-by: Marc Jones <marcj303@gmail.com>
2012-02-16Intel cpus: use CPU_PHYSMASK_HI define in CARKyösti Mälkki
Unifies models 6ex, 6fx and 106cx. Change-Id: I2bb632c7148a7d937f24eb559f7f4e539d227470 Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com> Reviewed-on: http://review.coreboot.org/638 Tested-by: build bot (Jenkins) Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2012-02-15Intel model_106cx: Use symbolic names for MTRR bitsKyösti Mälkki
Change-Id: I6ea5ca631c22fe870224a498b68d77d85798b3f4 Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com> Reviewed-on: http://review.coreboot.org/637 Tested-by: build bot (Jenkins) Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2012-02-13AMD Geode cpus: apply un-written naming rulesKyösti Mälkki
Kconfig directives to select chip drivers for compile literally match the chip directory names capitalized and underscored. Rename directories and Kconfig as follows: model_lx -> geode_lx model_gx1 -> geode_gx1 model_gx2 -> geode_gx2 Change-Id: Ib8bf1e758b88f9efed1cf8b11c76b796388e7147 Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com> Reviewed-on: http://review.coreboot.org/613 Tested-by: build bot (Jenkins) Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2012-02-13libpayload: code cosmeticsMathias Krause
Be consistend with coding style at least within a function -- don't mix sizeof with plain values. Change-Id: Iefb5b7fe4f54977f5505fc9cea65c9c4af3e7f3a Signed-off-by: Mathias Krause <mathias.krause@secunet.com> Reviewed-on: http://review.coreboot.org/617 Tested-by: build bot (Jenkins) Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2012-02-10Intel cpus: apply un-written naming rulesKyösti Mälkki
Kconfig directives to select chip drivers for compile literally match the chip directory names capitalized and underscored. Note: CPU_INTEL_CORE2 was used on both model_6fx and model_1067x. Change-Id: I8fa5ba71b14dcce79ab2a2c1c69b3bc36edbdea0 Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com> Reviewed-on: http://review.coreboot.org/618 Tested-by: build bot (Jenkins) Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2012-02-10libpayload: fix possible mem leak in get_option_as_string()Mathias Krause
Change-Id: I7c3adbd1b72be81585bbaabb42532fc4cad57f58 Signed-off-by: Mathias Krause <mathias.krause@secunet.com> Reviewed-on: http://review.coreboot.org/616 Tested-by: build bot (Jenkins) Reviewed-by: Peter Stuge <peter@stuge.se>
2012-02-10Remove non-existent includeSven Schnelle
Change-Id: I702d59371b4a57ce22623cbab6e936b653d57edf Signed-off-by: Sven Schnelle <svens@stackframe.org> Reviewed-on: http://review.coreboot.org/619 Tested-by: build bot (Jenkins)
2012-02-10i5000: halt second BSPSven Schnelle
If both FSBs on i5000 are equipped with CPU packages, one CPU from each package is elected as BSP. To prevent races between both BSPs, hlt the second BSP. Change-Id: I6bfcb17d34e9f028280acff1694309e37307ec21 Signed-off-by: Sven Schnelle <svens@stackframe.org> Reviewed-on: http://review.coreboot.org/615 Tested-by: build bot (Jenkins)
2012-02-09Add Intel Socket LGA771Sven Schnelle
Change-Id: Iee7d3ff2884d8c43ff1af498160589e551bc9cc8 Signed-off-by: Sven Schnelle <svens@stackframe.org> Reviewed-on: http://review.coreboot.org/492 Tested-by: build bot (Jenkins)
2012-02-09VIA cpus: apply un-written naming rulesKyösti Mälkki
Rename files and directories: model_c3 -> c3 model_c7 -> c7 Change-Id: If144fc501e8ae44b347ac44fa90c689c33a8e126 Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com> Reviewed-on: http://review.coreboot.org/614 Tested-by: build bot (Jenkins) Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2012-02-09Remove no-op Makefiles under mainboard directoryKyösti Mälkki
Patch removes following files: src/mainboard/amd/serengeti_cheetah/Makefile.inc src/mainboard/amd/serengeti_cheetah_fam10/Makefile.inc src/mainboard/broadcom/blast/Makefile.inc src/mainboard/hp/dl145_g1/Makefile.inc src/mainboard/msi/ms9282/Makefile.inc src/mainboard/supermicro/h8dme/Makefile.inc src/mainboard/tyan/s2881/Makefile.inc src/mainboard/tyan/s2892/Makefile.inc src/mainboard/via/epia-m700/Makefile.inc Change-Id: I020776313abff1772be38afc896af51ca5ab6453 Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com> Reviewed-on: http://review.coreboot.org/612 Tested-by: build bot (Jenkins) Reviewed-by: Kerry Sheh <shekairui@gmail.com> Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2012-02-07romcc: kill gcc warnings and .gitignore generated filesBernhard Urban
don't remove calls to `flatten()' and `correct_coalesce_conflicts()', since they (probably) have side effects. Change-Id: I78fc4163b3f5f1f5f3c5153f9559c22e11e8344d Signed-off-by: Bernhard Urban <lewurm@gmail.com> Reviewed-on: http://review.coreboot.org/605 Tested-by: build bot (Jenkins) Reviewed-by: Marc Jones <marcj303@gmail.com> Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2012-02-07Don't loop infinitely long on serial comm failuresKyösti Mälkki
If serial uart (8250/16x50) takes abnormally long to respond, give up on logging to serial console and instead let the system boot. Also reference bit in LSR register with correct name. Change-Id: I3796efc3e8690425f04a130af4bc99541b64d335 Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com> Reviewed-on: http://review.coreboot.org/611 Tested-by: build bot (Jenkins) Reviewed-by: Peter Stuge <peter@stuge.se>
2012-02-07Delete hard-coded driver includesKyösti Mälkki
Driver components are conditionally included in the build using the Kconfig options. Change-Id: I05417ee263a5b82e947600482dfb68f7a3f52d58 Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com> Reviewed-on: http://review.coreboot.org/610 Tested-by: build bot (Jenkins) Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2012-02-07libpayload: Remove workaround for bitfield management in EHCI driverPatrick Georgi
We don't use bitfields anymore. Change-Id: I25ceec2024f659612871bcfe5f98df3a10789055 Signed-off-by: Patrick Georgi <patrick.georgi@secunet.com> Reviewed-on: http://review.coreboot.org/595 Tested-by: build bot (Jenkins) Reviewed-by: Marc Jones <marcj303@gmail.com>
2012-02-07libpayload: Force checking all EHCI ports on power-onPatrick Georgi
EHCI port status reporting isn't very consistent on power-on, so just looking for devices on all ports is the safest way to find everything. Change-Id: I26b4305016f0bed1d2c1b5cffc59d5813fa1cbbb Signed-off-by: Patrick Georgi <patrick.georgi@secunet.com> Reviewed-on: http://review.coreboot.org/594 Tested-by: build bot (Jenkins) Reviewed-by: Marc Jones <marcj303@gmail.com>
2012-02-07Fix multipleVGA cards resource conflict on WindowsKerry Sheh
If multiple VGA-compatible legacy graphic cards decode the IO range 3B0-3BB, 3C0-3DF and MEM range A00000-BFFFF. Windows 7 complain a resource conflict, so only one VGA card can works at the same time. There is a discussion in coreboot mail list before, please reference thread: "how to prevent legacy resource conflictwith multipleVGA cards" http://www.coreboot.org/pipermail/coreboot/2010-October/061508.html Linux using VGA Arbiter module(vgaarb) to resolve this resource conflict, Please see the following linux dmesg log, more information can be found in Linux source dir Documentation/vgaarbiter.txt. But it seems that windows don't dealwith this conflict. ~# dmesg | grep -i vgaarb [ 0.774076] vgaarb: device added: PCI:0000:00:01.0,decodes=io+mem,owns=io+mem [ 0.776065] vgaarb: device added: PCI:0000:01:00.0,decodes=io+mem,owns=none,l [ 0.780051] vgaarb: loaded [ 0.784049] vgaarb: bridge control possible 0000:01:00.0 [ 0.788050] vgaarb: bridge control possible 0000:00:01.0 For the second legacy graphic device, coreboot already disabled the IO and MEM decode in function set_vga_bridge_bits(). But it will be enabled again in function pci_set_resource(), if the second legacy vga-compatible graphic device take any IO/MEM resources. Following log printed by enable_resources() shows the problem: ...snip... PCI: 00:00.0 cmd <- 06 PCI: 00:01.0 subsystem <- 1022/1410 PCI: 00:01.0 cmd <- 07 <== The first graphic device PCI: 00:01.1 subsystem <- 1022/1410 PCI: 00:01.1 cmd <- 02 PCI: 00:02.0 bridge ctrl <- 0003 PCI: 00:02.0 cmd <- 07 ...snip... PCI: 01:00.0 cmd <- 03 <== The second graphic device PCI: 01:00.1 cmd <- 02 PCI: 02:00.0 cmd <- 02 PCI: 03:00.0 cmd <- 03 done. ...snip... The IO & MEM decoding on the second vga graphic device should be disabled. Please reference PCI spec. section 3.10 in detail. set_vga_bridge_bits() would do this work for us, it did the right thing, but was put to the wrong place, the setting would be overwritten by assign_resources() later. In order to make sure the set_vga_bridge_bits() setting not be overwritten by others, moving the call of set_vga_bridge_bits() to the end of dev_configure(), instead of at the beginning. This patch resolved the dual graphic cards resource conflict in windows7, multiple vga-compatible graphic cards can work together in windows7. Signed-off-by: Kerry Sheh <shekairui@gmail.com> Signed-off-by: Kerry Sheh <kerry.she@amd.com> Change-Id: I0de5e3761b51e2723d9c1dc0c39fff692e3a779d Reviewed-on: http://review.coreboot.org/489 Tested-by: build bot (Jenkins) Reviewed-by: Marc Jones <marcj303@gmail.com>
2012-02-07Inagua: Indent and wihtespace cleanupKerry Sheh
Change-Id: Ie574e08f138c88084c8ce06d0d0acc489013e3d7 Signed-off-by: Kerry Sheh <shekairui@gmail.com> Signed-off-by: Kerry Sheh <kerry.she@amd.com> Reviewed-on: http://review.coreboot.org/547 Tested-by: build bot (Jenkins) Reviewed-by: Marc Jones <marcj303@gmail.com>
2012-02-07Inagua: mainboard specific GPIO settingKerry Sheh
Pcie device connected to Hudson/sb800 southbridge GPP training can works, by applying this mainbaind specific GPIO PCIE De-Assert setting. Change-Id: I563b2e6354a958a28f5d0162e7a4d60aa437fb9b Signed-off-by: Kerry Sheh <shekairui@gmail.com> Signed-off-by: Kerry Sheh <kerry.she@amd.com> Reviewed-on: http://review.coreboot.org/543 Tested-by: build bot (Jenkins) Reviewed-by: Marc Jones <marcj303@gmail.com>
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