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coreboot
2560p
820g2
autoport-hsw
broadwell_refcode
e6230
e7240_bdw
haswell-mrc
hp820g1
hp9480m
mec1322
Some coreboot project code with my work
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2011-05-22
Ensure ck804 romstrap is 16-byte aligned.
Jonathan Kollasch
2011-05-21
Add regression test for build directory handling to make lint target
Patrick Georgi
2011-05-20
Handle absolute source file paths
Patrick Georgi
2011-05-20
Handle both cases, obj being absolute and relative
Patrick Georgi
2011-05-20
Fix building with relative path to object directory outside the source tree
Patrick Georgi
2011-05-20
iasl still can't cope with extra "." in file paths
Patrick Georgi
2011-05-20
Fix ccache behaviour if more than one ccache in PATH
Patrick Georgi
2011-05-20
Correct amd persimmon romstage code for early SPI prefetch enable.
Scott Duplichan
2011-05-20
Move the ACPI FACP table to the front of the RSDT list. This is done to work ...
Scott Duplichan
2011-05-16
Move crossgcc rules to coreboot specific Makefile
Patrick Georgi
2011-05-16
Add crossgcc target to automatically build reference toolchain
Cristian Magherusan-Stanciu
2011-05-16
cimx_wrapper/sb800: Fix indent in late.c:sb800_enable()
Peter Stuge
2011-05-15
Remove multiple mmconf settings and just use kconfig setting.
Marc Jones
2011-05-15
agesa_wrapper: Avoid repetitive Kconfig depends, trivial
Peter Stuge
2011-05-15
Cosmetic cleanup.
Scott Duplichan
2011-05-15
1) Remove unused kconfig options.
Scott Duplichan
2011-05-15
Update gpp port configuration.
Scott Duplichan
2011-05-15
Enable rom cache early to reduce boot time.
Scott Duplichan
2011-05-15
Fix memory allocation problem in amdInitLate. Disabled until further debug.
Scott Duplichan
2011-05-15
Remove some non-essential agesa options to reduce boot time.
Scott Duplichan
2011-05-15
Declare legacy video frame buffer so that Windows generic VGA driver will work.
Scott Duplichan
2011-05-15
Declare RTC as not PIIX4 compatible to match AMD hardware.
Scott Duplichan
2011-05-15
Make fadt revision match its length. Solves Windows 7 checked build assert.
Scott Duplichan
2011-05-15
Enable SPI cacheline prefetch early to reduce boot time.
Scott Duplichan
2011-05-15
Enable SPI cacheline prefetch early to reduce boot time.
Scott Duplichan
2011-05-15
Switch processor cores to pstate 0 early to reduce boot time.
Scott Duplichan
2011-05-15
Enable 33 MHz fast mode SPI read early to reduce boot time.
Scott Duplichan
2011-05-15
Build device paths for AP cores so that coreboot will report them to the OS.
Scott Duplichan
2011-05-15
Program the I/O APIC ID.
Scott Duplichan
2011-05-15
Enable AHCI mode and hide IDE controller to reduce boot time.
Scott Duplichan
2011-05-15
Move mmconf base from e0000000 to f8000000 to avoid conflict with UMA BAR.
Scott Duplichan
2011-05-15
Fix ACPI shutdown function by removing reliance on SMI.
Scott Duplichan
2011-05-15
Configure CIMx to use 33 MHz fast mode for SPD read.
Scott Duplichan
2011-05-15
Match DIMM SPD addressing to implemented slots.
Scott Duplichan
2011-05-15
Size mmconf according to CONFIG_MMCONF_BUS_NUMBER.
Scott Duplichan
2011-05-15
1) Use D18F1xF4 VGA Enable to simplify legacy video I/O support.
Scott Duplichan
2011-05-15
1) Set I/O APIC ID according to BKDG recommendation
Scott Duplichan
2011-05-15
Correct the number of MCA error reporting banks cleared.
Scott Duplichan
2011-05-15
1) Initialize BSP fixed MTRRs to match AP fixed MTRR initialization.
Scott Duplichan
2011-05-13
siemens/sitemp_g1p1: Adapt read_option() to latest changes
Josef Kellermann
2011-05-12
Remove uart_init() in Siemens sitemp-g1p1
Patrick Georgi
2011-05-11
Add Siemens SITEMP-G1 board
Josef Kellermann
2011-05-11
Work around unclean CMOS handling for now
Patrick Georgi
2011-05-10
Change read_option() to a macro that wraps some API uglyness
Patrick Georgi
2011-05-10
This replaces the fixed shift values in the apic timer init with macros.
Vikram Narayanan
2011-05-10
Fix compilation error due to non-unix style line endings in cmos.layout file ...
Patrick Georgi
2011-05-09
Adds RS740 HT and internal graphics PCI ids.
Ivaylo Valkov
2011-05-07
ADVANSUS A785E-I Mainboard support, Family10h ASB2, RS880(RS785E) + SB820 pla...
Kerry She
2011-05-07
RS780 DDI Lanes configure support,
Kerry She
2011-05-07
SB800 CIMX code can share the AGESA V5 lib code,
Kerry She
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