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AgeCommit message (Expand)Author
2015-04-13pistachio: increase the size of romstage to 36KIonela Voinescu
2015-04-13vboot2: use offset to vboot2 work buffer instead of absolute addressDaisuke Nojiri
2015-04-13arch: armv7: Fix cache sync instructions.Deepa Dinamani
2015-04-11hp/pavilion_m6_1035dx/cmos.layout: Remove unused optionsAlexandru Gagniuc
2015-04-10fmap: allocate memory as much as discovered fmap sizeDaisuke Nojiri
2015-04-10rk3288: reset edp after edp clock source selecthuang lin
2015-04-10Add google/veyron_mighty boardKatie Roberts-Hoffman
2015-04-10rockchip: support displayhuang lin
2015-04-10veyron*: select VIRTUAL_DEV_SWITCHDavid Hendricks
2015-04-10veyron: Adapt to new board revisionsJulius Werner
2015-04-10veyron_jerry: Port CPU overshoot preventionJulius Werner
2015-04-10veyron*: sdram_get_ram_code() -> ram_code()David Hendricks
2015-04-10veyron*: use gpio_base2_value() in board_id()David Hendricks
2015-04-10veyron: Change VCC10_LCD_PWREN_H to allowed maximum of 2.5VJulius Werner
2015-04-10veyron_jerry: Remove board ID based assumptionsJulius Werner
2015-04-10veyron: Change eMMC enable pin to be pulled (not driven) highDoug Anderson
2015-04-10Add google/veyron_jerry boardKatie Roberts-Hoffman
2015-04-10storm: copy WiFi calibration data in the CBMEMVadim Bendebury
2015-04-10tegra132: psci: add cpu_on/off supportJoseph Lo
2015-04-10arm64: No need of invalidating cache line for secondary CPU stackFurquan Shaikh
2015-04-10arm64: Add support for save/restore registers for CPU startup.Furquan Shaikh
2015-04-10arm64: Add macro to invalidate stage 1 TLB entries at current ELFurquan Shaikh
2015-04-10arm64: Add conditional read/write from/to EL3 assembly macros.Furquan Shaikh
2015-04-10arm64: Add function for reading TCR register at current ELFurquan Shaikh
2015-04-10tegra132: Make non-vboot2 memlayout more usefulFurquan Shaikh
2015-04-10tegra132: Change memlayout to have PRERAM and POSTRAM CBFS CacheFurquan Shaikh
2015-04-10tegra132: Bump up ramstage to 256KFurquan Shaikh
2015-04-10google/rush_ryu: Add speaker amp config for AD4567 on P0/P1Tom Warren
2015-04-10tegra132: prepare cpu startup in psciAaron Durbin
2015-04-10arm64: psci: actually inform SoC layer of CPU_ON entryAaron Durbin
2015-04-10google/rush_ryu: Remove long delay when turning on AVDD_DSI_CSIJimmy Zhang
2015-04-10tegra132: Increase size of bootblock due to overflowTom Warren
2015-04-10arm64: ensure secondary CPU's stack tops are not in the cacheAaron Durbin
2015-04-10arm64: add timeout waiting for CPUs to come onlineAaron Durbin
2015-04-10tegra132: always bring up PLLDAaron Durbin
2015-04-10tegra132: rename clock_display() to clock_configure_plld()Aaron Durbin
2015-04-10google/rush_ryu: audio: Setup clocks for AHUB, I2S1, codec, etc.Tom Warren
2015-04-10tegra132: Set dc to resize the difference between framebuffer and panelJimmy Zhang
2015-04-10google/rush_ryu: devicetree: Add framebuffer resolution settingsJimmy Zhang
2015-04-10tegra132: Add framebuffer parametersJimmy Zhang
2015-04-10tegra132: Pass panel spec to lib_sysinfoJimmy Zhang
2015-04-10tegra132: Expand ramstage size to 208k (from 192k)Jimmy Zhang
2015-04-10tegra132: Add dsi driverJimmy Zhang
2015-04-10google/rush_ryu: devicetree: Add dsi panel mode settingsJimmy Zhang
2015-04-10tegra132: Add panel mode specJimmy Zhang
2015-04-10google/rush_ryu: dsi: Enable panel related vdd and clocksJimmy Zhang
2015-04-10google/rush_ryu: Disable EC SW sync for proto boards before proto3Furquan Shaikh
2015-04-10tegra132: Increase space for romstage in memlayoutFurquan Shaikh
2015-04-10urara: support building with CHROMEOS enabledVadim Bendebury
2015-04-10baytrail: correct NC pin to GPO pin according to BYT platform design guideKane Chen
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