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2009-04-20After verification in datasheets, all MX25 accept the same opcodesStephan Guilloux
0x60 and 0xC7 for Chip Erase. Signed-off-by: Stephan Guilloux <stephan.guilloux@free.fr> Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4146 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-04-20A little more info. Failover docs are next, then proposed new mechanismRonald G. Minnich
Signed-off-by: Ronald G. Minnich <rminnich@gmail.com> Acked-by: Ronald G. Minnich <rminnich@gmail.com> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4145 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-04-20This patch adds Myles Watson
cbfstool extract [FILE] [NAME] It also factors out the csize calculation in rom_add, and fixes rom_delete so that it can handle deleting the last entry. Signed-off-by: Myles Watson <mylesgw@gmail.com> Acked-by: Ronald G. Minnich <rminnich@gmail.com> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4144 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-04-20Continuing the slow doc-o updateRonald G. Minnich
Signed-off-by: Ronald G. Minnich <rminnich@gmail.com> Acked-by: Ronald G. Minnich <rminnich@gmail.com> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4143 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-04-20flashrom: board_enables: reconstruct table.Luc Verhaegen
This patch restores the pciid based board matching table. It makes this table readable and hackable again, and the only disadvantage is that the right margin is way beyond the rather dogmatic 80. All 0x0000 pci ids have been string replaced by 0 to more easily spot missing ids, and extra comments have been added to explain how the various entries are used. Signed-Off-By: Luc Verhaegen <libv@skynet.be> Acked-by: Peter Stuge <peter@stuge.se> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4142 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-04-20flashrom: Trivial README change Flashrom->flashromPeter Stuge
Signed-off-by: Peter Stuge <peter@stuge.se> Acked-by: Peter Stuge <peter@stuge.se> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4141 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-04-20Fix implicit declarations of done_cache_as_ram_main by adding aCarl-Daniel Hailfinger
prototype for these assembler functions. Affected boards: digitallogic/msm800sev pcengines/alix1c Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> Acked-by: Peter Stuge <peter@stuge.se> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4140 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-04-19flashrom: MX25L1605 and 1635 accept Chip Erase opcodes 60 and C7Stephan Guilloux
Signed-off-by: Stephan Guilloux <stephan.guilloux@free.fr> Acked-by: Peter Stuge <peter@stuge.se> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4139 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-04-19Add MX25L1635D support, as discussed on #coreboot.Stephan Guilloux
Signed-off-by: Stephan Guilloux <stephan.guilloux@free.fr> Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4138 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-04-18There is a typo in amdk8/raminit_f.c regarding the preprocessor symbol ↵Ronald Hoogenboom
QRANK_DIMM_SUPPORT in line 2208, which caused the protected code fragment never to be included for compilation. Signed-off-by: Ronald Hoogenboom <hoogenboom30@zonnet.nl> Acked-by: Marc Jones <marcj303@gmail.com> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4137 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-04-18drop the ChangeLog.cvsimport document from the transition from CVS Stefan Reinauer
to GNU arch. Does anyone remember that? What a fun! All history is in the SVN repository, including the CVS and TLA parts, so nothing is lost. Signed-off-by: Stefan Reinauer <stepan@coresystems.de> Acked-by: Stefan Reinauer <stepan@coresystems.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4136 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-04-18Drop long-obsolete HOWTO, it's still available in wikified form atUwe Hermann
http://www.coreboot.org/VIA_EPIA-M. Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de> Acked-by: Uwe Hermann <uwe@hermann-uwe.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4135 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-04-18s/LinuxBIOS/coreboot/.Uwe Hermann
Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de> Acked-by: Uwe Hermann <uwe@hermann-uwe.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4134 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-04-18Add support for the ASUS P2B-D mainboard.Uwe Hermann
This is a pretty standard "yet another 440BX" target, so the code is pretty straight-forward. It's a dual-CPU machine, which might need some fixing, I'm booting with 'maxcpus=0' for now. It does boot successfully up to a Linux login prompt, though. Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de> Acked-by: Peter Stuge <peter@stuge.se> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4133 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-04-17flashrom: Add VIA PC3500G board. It has SPI flash behind ITE8716 on LPC.Peter Stuge
Signed-off-by: Peter Stuge <peter@stuge.se> Acked-by: illdred <illdred@gmail.com> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4132 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-04-17Add include to config.gMyles Watson
Usage: include path path can be relative to the current directory or absolute starting at /src. I tested it with: include /config/absolute.lb include relative.lb in /src/northbridge/amd/amdk8/Config.lb which included /src/northbridge/amd/amdk8/relatvie.lb /src/config/absolute.lb Signed-off-by: Myles Watson <mylesgw@gmail.com> Acked-by: Ronald G. Minnich <rminnich@gmail.com> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4131 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-04-17Improvements for the coreboot v2 README:Uwe Hermann
- Point to the 'Payloads' wiki page for more info. - Document (most of) the build requirements of v2. - Point to the wiki for build instructions (wiki needs more docs, though). - Mention QEMU for testing coreboot, also point to wiki page. Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de> Acked-by: Uwe Hermann <uwe@hermann-uwe.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4130 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-04-17Updating documentation as I get ready to put v3-style startup in (which Ronald G. Minnich
I have working in an early version in my tree). Corrections welcome. Signed-off-by: Ronald G. Minnich <rminnich@gmail.com> Acked-by: Ronald G. Minnich <rminnich@gmail.com> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4129 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-04-17There are two identical cfgfile rules in config.g. Remove one of them.Myles Watson
Signed-off-by: Myles Watson <mylesgw@gmail.com> Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4128 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-04-17This patch allows you to add lines of the formMyles Watson
pci_rom PATH vendor_id = # device_id = # to Config.lb files. No more changing the ROM_SIZE to add an option ROM, and no more manual prepending. Examples: pci_rom ../ragexl.rom vendor_id = 0x1002 device_id = 0x4752 pci_rom ../nic.rom vendor_id = 0x1100 device_id = 0x4152 Signed-off-by: Myles Watson <mylesgw@gmail.com> Acked-by: Ronald G. Minnich <rminnich@gmail.com> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4127 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-04-17Add VIA CX700 support, plus VIA vt8454c reference board support.Stefan Reinauer
Signed-off-by: Stefan Reinauer <stepan@coresystems.de> Acked-by: Uwe Hermann <uwe@hermann-uwe.de> Acked-by: Ronald G. Minnich <rminnich@gmail.com> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4126 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-04-17This needed to be removed. Ronald G. Minnich
Signed-off-by: Ronald G. Minnich <rminnich@gmail.com> Acked-by: Ronald G. Minnich <rminnich@gmail.com> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4125 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-04-16Following patch flushes the instruction queue when we set PE=0. This is normallyRudolf Marek
done by FAR JMP, but here it is more tricky because we run at EIP>1MB. Many thanks to Marc and Kevin to tell me how to fix it The trick is to use 0x66 prefix (done with ljmpl) it will allow to jump in real mode to any EIP addresses ;) Signed-off-by: Rudolf Marek <r.marek@assembler.cz> Acked-by: Peter Stuge <peter@stuge.se> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4124 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-04-16I deleted mptable.c in my patch, but forgot to svn rm it.Myles Watson
Signed-off-by: Myles Watson <mylesgw@gmail.com> Acked-by: Myles Watson <mylesgw@gmail.com> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4123 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-04-15v2/src romfs->cbfs renamePeter Stuge
romfs.c has been replaced by cbfs.c. Signed-off-by: Peter Stuge <peter@stuge.se> Acked-by: Peter Stuge <peter@stuge.se> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4121 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-04-15This patch cleans up mpspec.h and allows it to be included whenMyles Watson
HAVE_MP_TABLE=0 It also removes the artifacts from the Asus m2v-mx_se that were necessary before the change. Signed-off-by: Myles Watson <mylesgw@gmail.com> Acked-by: Peter Stuge <peter@stuge.se> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4120 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-04-15Add -r|--remove option to force abuild to remove the output directoryUwe Hermann
after every board build, in order to save disk space if you don't need the actual output files. Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de> Acked-by: Peter Stuge <peter@stuge.se> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4119 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-04-15Some coding style and consistency fixes (trivial).Uwe Hermann
Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de> Acked-by: Uwe Hermann <uwe@hermann-uwe.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4117 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-04-15r4097 broke the tree and it remains unfixed :-( Stefan Reinauer
Repeat: Cosmetic patches shall not break the tree for 20 revisions. Signed-off-by: Stefan Reinauer <stepan@coresystems.de> Acked-by: Stefan Reinauer <stepan@coresystems.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4116 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-04-14EPIA-CN does not have any ACPI tables. Fixes manual and auto build here.Peter Stuge
Signed-off-by: Peter Stuge <peter@stuge.se> Acked-by: Peter Stuge <peter@stuge.se> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4115 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-04-14util/cbfstool/tools/rom-mk*->cbfs-mk* renamePeter Stuge
Signed-off-by: Peter Stuge <peter@stuge.se> Acked-by: Ronald G. Minnich <rminnich@gmail.com> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4114 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-04-14v2/src romfs->cbfs renamePeter Stuge
This also has the config tool changes in v2/util. Rename romfs.[ch]->cbfs.[ch] and sed romfs->cbfs romtool->cbfstool ROMFS->CBFS Signed-off-by: Peter Stuge <peter@stuge.se> Acked-by: Ronald G. Minnich <rminnich@gmail.com> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4113 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-04-14fix up the tree.Stefan Reinauer
Signed-off-by: Stefan Reinauer <stepan@coresystems.de> Acked-by: Stefan Reinauer <stepan@coresystems.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4112 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-04-14util: romfs->cbfs renamePeter Stuge
I noticed this before sed, but forgot to change it back after sed. Signed-off-by: Peter Stuge <peter@stuge.se> Acked-by: Peter Stuge <peter@stuge.se> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4111 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-04-14v2/util: romfs -> cbfs renamePeter Stuge
It's all sed here. romfs->cbfs, ROMFS->CBFS, romtool->cbfstool Signed-off-by: Peter Stuge <peter@stuge.se> Acked-by: Ronald G. Minnich <rminnich@gmail.com> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4110 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-04-14v2/documentation: romfs -> cbfs renamePeter Stuge
This is svn mv romfs.txt cbfs.txt and sed romfs->cbfs, ROMFS->CBFS along with one manual change: CBFS_file->cbfs_file Signed-off-by: Peter Stuge <peter@stuge.se> Acked-by: Ronald G. Minnich <rminnich@gmail.com> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4109 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-04-13Fix the build. This error was introduced by change in acpi.c, the ↵Rudolf Marek
acpi_slp_type exists only conditionally. Signed-off-by: Rudolf Marek <r.marek@assembler.cz> Acked-by: Rudolf Marek <r.marek@assembler.cz> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4108 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-04-13Fix typo. Add missing copyright year.Uwe Hermann
Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de> Acked-by: Uwe Hermann <uwe@hermann-uwe.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4107 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-04-13Emergency fix. Most targets now build. Ronald G. Minnich
Signed-off-by: Ronald G. Minnich <rminnich@gmail.com> Acked-by: Ronald G. Minnich <rminnich@gmail.com> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4106 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-04-13I need to do uses HAVE_ACPI_RESUME for each board. Here we go.Rudolf Marek
Signed-off-by: Rudolf Marek <r.marek@assembler.cz> Acked-by: Rudolf Marek <r.marek@assembler.cz> It should fix the build break introduced in r4101 git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4105 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-04-13The wake_vec must be HAVE_ACPI_RESUME guarded because PPC uses -Werror on ↵Rudolf Marek
this file. Signed-off-by: Rudolf Marek <r.marek@assembler.cz> Self ack, trivial fix: Acked-by: Rudolf Marek <r.marek@assembler.cz> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4104 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-04-13Following patch adds support for the ACPI resume on Asus M2V-MX SE. The ACPIRudolf Marek
code just blinks the leds. The motherboard resources are use to reserve coreboot used memory. Signed-off-by: Rudolf Marek <r.marek@assembler.cz> Acked-by: Peter Stuge <peter@stuge.se> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4103 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-04-13Following patch adds resume (exit from self refresh) support for AMD K8 revFRudolf Marek
CPUs. It handles both type of erratas on those CPUs. Signed-off-by: Rudolf Marek <r.marek@assembler.cz> Acked-by: Peter Stuge <peter@stuge.se> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4102 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-04-13Following patch implements ACPI resume support for coreboot. The hardware mainRudolf Marek
hook will come in separate patch perhaps. Signed-off-by: Rudolf Marek <r.marek@assembler.cz> Acked-by: Peter Stuge <peter@stuge.se> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4101 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-04-13Following patch adds support for resume on VT8237 based motherboards. The NBRudolf Marek
part of this patch adds support for resume well NVRAM. In which DQS values are stored. Signed-off-by: Rudolf Marek <r.marek@assembler.cz> Acked-by: Peter Stuge <peter@stuge.se> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4100 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-04-13Following patch adds necessary hooks and as well the compile time checks forRudolf Marek
ACPI suspend/resume. The memory cleared now is just the coreboot memory not the low memory. Signed-off-by: Rudolf Marek <r.marek@assembler.cz> Acked-by: Peter Stuge <peter@stuge.se> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4099 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-04-13Fix the following errors:Carl-Daniel Hailfinger
In file included from src/mainboard/asus/a8v-e_se/cache_as_ram_auto.c:93: src/northbridge/amd/amdk8/raminit.c: In function ‘sdram_set_spd_registers’: src/northbridge/amd/amdk8/raminit.c:2123: error: implicit declaration of function ‘activate_spd_rom’ In file included from src/mainboard/asus/a8v-e_se/cache_as_ram_auto.c:101: src/cpu/amd/model_fxx/init_cpus.c: In function ‘init_cpus’: src/cpu/amd/model_fxx/init_cpus.c:319: error: implicit declaration of function ‘soft_reset’ In file included from src/mainboard/asus/m2v-mx_se/cache_as_ram_auto.c:98: src/northbridge/amd/amdk8/raminit_f.c: In function ‘sdram_set_spd_registers’: src/northbridge/amd/amdk8/raminit_f.c:2848: error: implicit declaration of function ‘activate_spd_rom’ Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> Acked-by: Peter Stuge <peter@stuge.se> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4098 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-04-12This patch cleans up the calls to $CC in mainboard Config.lb files. TheyCarl-Daniel Hailfinger
now all have the same parameter order. action "$(CC) $(DISTRO_CFLAGS) $(CFLAGS) $(CPPFLAGS) $(DEBUG_CFLAGS) -I$(TOP)/src -I. -nostdinc -nostdlib -fno-builtin -Wall -Os -c -S $(MAINBOARD)/$(CACHE_AS_RAM_AUTO_C) -o $@" The idea behind this parameter order is: - *FLAGS at the beginning. - Use a common set of *FLAGS. - Include files and directories listed afterwards. - nostdinc, nostdlib, no-builtin tell the compiler this is standalone code. - Warnings. They do not influence source or compilation. - Compilation strategy (small) and output mode (asm or binary). - File to be compiled. - Output name. - $(DEBUG_CFLAGS) and -S are only used for asm output. Other changes in this patch: - src/supermicro/h8dme/Config.lb now uses $DEBUG_CFLAGS instead of hardcoding the respective flags. - $DEBUG_CFLAGS was added to asm outputting $CC calls: supermicro/h8dme/Config.lb lippert/roadrunner-lx/Config.lb - $DISTRO_CFLAGS was added to some $CC calls in: iwill/dk8_htx/Config.lb (CAR AP code) supermicro/h8dmr/Config.lb (CAR AP code) supermicro/h8dme/Config.lb (CAR AP code) gigabyte/m57sli/Config.lb (CAR AP code) gigabyte/ga_2761gxdk/Config.lb (CAR AP code) amd/serengeti_cheetah_fam10/Config.lb (everywhere) msi/ms7135/Config.lb (everywhere) nvidia/l1_2pvv/Config.lb (CAR AP code) -$CFLAGS was added to all $CC calls in: amd/db800/Config.lb amd/dbm690t/Config.lb amd/norwich/Config.lb amd/pistachio/Config.lb amd/serengeti_cheetah/Config.lb amd/serengeti_cheetah_fam10/Config.lb arima/hdama/Config.lb artecgroup/dbe61/Config.lb asus/a8n_e/Config.lb asus/a8v-e_se/Config.lb asus/m2v-mx_se/Config.lb broadcom/blast/Config.lb digitallogic/msm800sev/Config.lb gigabyte/ga_2761gxdk/Config.lb gigabyte/m57sli/Config.lb ibm/e325/Config.lb ibm/e326/Config.lb iei/pcisa-lx-800-r10/Config.lb iwill/dk8_htx/Config.lb iwill/dk8s2/Config.lb iwill/dk8x/Config.lb kontron/986lcd-m/Config.lb lippert/roadrunner-lx/Config.lb lippert/spacerunner-lx/Config.lb msi/ms7135/Config.lb msi/ms7260/Config.lb msi/ms9185/Config.lb msi/ms9282/Config.lb newisys/khepri/Config.lb nvidia/l1_2pvv/Config.lb pcengines/alix1c/Config.lb sunw/ultra40/Config.lb supermicro/h8dme/Config.lb supermicro/h8dmr/Config.lb technexion/tim8690/Config.lb tyan/s2735/Config.lb tyan/s2850/Config.lb tyan/s2875/Config.lb tyan/s2880/Config.lb tyan/s2881/Config.lb tyan/s2882/Config.lb tyan/s2885/Config.lb tyan/s2891/Config.lb tyan/s2892/Config.lb tyan/s2895/Config.lb tyan/s2912/Config.lb tyan/s2912_fam10/Config.lb tyan/s4880/Config.lb tyan/s4882/Config.lb - Use $@ wherever appropriate. - Kill that evil CACHE_AS_RAM_AUTO_C variable. - Trailing whitespace fixups on lines which were touched anyway. We now only have 6 remaining different calls to $CC whereas before there were 20. If I am allowed to rename src/mainboard/kontron/986lcd-m/auto.c to src/mainboard/kontron/986lcd-m/cache_as_ram_auto.c, we're down to 4 different calls. If we can decide on the use of $CPU_OPT, we are down to 3 different calls. One additional point I'd like to clear up: if ASSEMBLER_DEBUG makedefine DEBUG_CFLAGS := -g -dA -fverbose-asm end "-dA -fverbose-asm" is only useful for asm output. For these flags, DEBUG_CFLAGS is a total misnomer. What about calling them DEBUG_ASMCFLAGS or somesuch? "-g" should be controllable by a separate switch. It is useful even for object code. The following targets are broken by this patch because they contain implicit declarations, but the error did not trigger due to missing CFLAGS: amd/serengeti_cheetah asus/a8v-e_se asus/m2v-mx_se digitallogic/msm800sev pcengines/alix1c supermicro/h8dme supermicro/h8dmr Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> Acked-by: Ronald G. Minnich <rminnich@gmail.com> Acked-by: Peter Stuge <peter@stuge.se> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4097 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-04-12The IT8712F needs to have the configuration bits changed to handle the power forRudolf Marek
memory correctly during suspend.s Signed-off-by: Rudolf Marek <r.marek@assembler.cz> Acked-by: Peter Stuge <peter@stuge.se> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4096 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-04-11Bring S2912 and S2912_Fam10 Config.lb in line with each other.Carl-Daniel Hailfinger
- Use $(CACHE_AS_RAM_AUTO_C) instead of cache_as_ram_auto.c - Compile apc_auto.c with $(DISTRO_CFLAGS) - Clean up whitespace If anyone can explain the remaining differences in Config.lb which are NOT caused by the K8/Fam10 switch, I'd be glad to hear them. Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> Acked-by: Peter Stuge <peter@stuge.se> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4095 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
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