index
:
coreboot
2560p
820g2
autoport-hsw
broadwell_refcode
e6230
e7240_bdw
haswell-mrc
hp820g1
hp9480m
mec1322
Some coreboot project code with my work
vimacs
summary
refs
log
tree
commit
diff
log msg
author
committer
range
Age
Commit message (
Expand
)
Author
2010-09-22
Here is a proposed way how to handle the SATA PHY settings on SB700. It
Rudolf Marek
2010-09-21
First round of i82801ax clean-ups (trivial).
Uwe Hermann
2010-09-21
Cut the crap.
Uwe Hermann
2010-09-21
Complete the code which was missing.
Zheng Bao
2010-09-21
Fix the typo. Field DisAutoRefresh is in DramTimngHi.
Zheng Bao
2010-09-20
A number of cleanups for 440BX raminit code.
Keith Hui
2010-09-19
Make ASUS P3B-F RAM init actually work by enabling SPD access.
Uwe Hermann
2010-09-17
AMD Fam10 code breaks with gcc 4.5.0.
Scott Duplichan
2010-09-17
Clear bit 35 of msr c001_102a in Fam10 rev C cores.
Arne Georg Gleditsch
2010-09-16
Add default libpayload build, xcompile, and lpgcc setup to tint.
Marc Jones
2010-09-16
Add more Fam10 CPUID strings from the AMD revision guide. Includes
Marc Jones
2010-09-14
This patch corrects a coding error in the original implementation
Scott Duplichan
2010-09-13
IEI Kino added to IEI mainboard Kconfig. I missed this in r5812
Marc Jones
2010-09-13
IEI Kino mainboard support based on Mahogany Fam10.
Marc Jones
2010-09-13
CONFIG_MMCONF_SUPPORT is always defined. Fix build.
Myles Watson
2010-09-13
Move initialization of MMCONF BAR to cache_as_ram setup phase, in order
Arne Georg Gleditsch
2010-09-13
Add support for Asus M4A785-M.
Juhana Helovuo
2010-09-13
Add reserved areas for fam10.
Myles Watson
2010-09-13
Port k8 UMA handling to fam10.
Myles Watson
2010-09-13
Generate multiboot tables from coreboot tables.
Juhana Helovuo
2010-09-13
Print an error and correct pci scan limits. Skip sb700 ISA DMA init if needed.
Juhana Helovuo
2010-09-13
Fix a typo reported by Sylvain Hitier.
Myles Watson
2010-09-13
Convert i945 boards to use reserved resources instead of directly adding
Myles Watson
2010-09-10
Add F71859 SIO.
Marc Jones
2010-09-10
Add support for LiPPERT Hurricane-LX (EPIC board with AMD Geode-LX,
Jens Rottmann
2010-09-10
Move memory type information out of some AMD sockets.
Myles Watson
2010-09-09
Adapt comment, too. (trivial)
Patrick Georgi
2010-09-09
This patch avoids a timeout during PS/2 keyboard
Scott Duplichan
2010-09-09
Make huge macros inline functions for readability. Remove warnings. Trivial.
Myles Watson
2010-09-09
Please find appended. This patch gets rid of the %gs magic altogether,
Arne Georg Gleditsch
2010-09-09
Add support for reserved regions to resources and coreboot tables.
Myles Watson
2010-09-09
Only try to beep when speaker support is compiled in.
Patrick Georgi
2010-09-09
My Jmicron SATA card writes the name of the hard drive to the screen.
Myles Watson
2010-09-09
Also improve boot time on AMD for the DDR3 code path.
Arne Georg Gleditsch
2010-09-09
Apparently, it's not crucial to clear this at the exact moment we switch
Arne Georg Gleditsch
2010-09-09
Add a DRIVERS_PS2_KEYBOARD option which controls the PS2 keyboard
Kevin O'Connor
2010-09-08
Trivial - remove stray characters from a comment block.
Marc Jones
2010-09-08
Code must not access the smbus registers before the RTC power well is
Kevin O'Connor
2010-09-08
Make timer2 the default choice for TSC initialization.
Patrick Georgi
2010-09-08
It should not be necessary to read in the rom during CAR setup.
Kevin O'Connor
2010-09-08
Changes to str*cmp functions. Fixes a couple more corner cases.
Liu Tao
2010-09-07
My Jmicron SATA card depends on the BIOS not clearing AL when setting AH.
Myles Watson
2010-09-07
Make a Kconfig option for debugging output from realmode emulation. Trivial.
Myles Watson
2010-09-07
Add support for LiPPERT Cool LiteRunner-LX (PC/104 board with AMD
Jens Rottmann
2010-09-07
Remove unused ide0_enable and sata0_enable entries from SB7xx
Rudolf Marek
2010-09-07
2ms is enough time to accurately obtain the clock rate.
Kevin O'Connor
2010-09-07
Set up an arbitrary amount of system memory on Geode LX, so
Aurelien Guillaume
2010-09-06
Instead of requiring users to modify qemu to allow writes to
Kevin O'Connor
2010-09-05
Trivial. Currently the max frequency is preset as 400Mhz. We need to set a
Zheng Bao
2010-09-04
AMD DDR2 and DDR3 MCT function InitPhyCompensation() compliant with AGESA code.
Kerry She
[next]