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2010-01-27Change memory map of geode lx: 768kb-systop is aEdwin Beasant
single range. This change allows both seabios and filo to boot linux successfully (which was confused before) Signed-off-by: Edwin Beasant <edwin_beasant@virtensys.com> Signed-off-by: Patrick Georgi <patrick.georgi@coresystems.de> Acked-by: Patrick Georgi <patrick.georgi@coresystems.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5058 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2010-01-26Mark c0000-fffff as usable on geode-lx. SeaBIOS needs it.Edwin Beasant
a0000-bffff might be usable as well, but it won't hurt to keep that range excluded. Signed-off-by: Edwin Beasant <edwin_beasant@virtensys.com> Acked-by: Patrick Georgi <patrick.georgi@coresystems.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5057 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2010-01-26use stdint types for structures, and don't use pointersStefan Reinauer
for fields defined 32bit in the multi processor specification. Also, fix lots of trivial warnings in the code. If you ever wondered, why you get odd or wrong mp tables on your x64 system: It's not because bios vendors neglected mp tables; it's because we neglected 64bit systems. ;-) Signed-off-by: Stefan Reinauer <stepan@coresystems.de> Acked-by: Stefan Reinauer <stepan@coresystems.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5056 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2010-01-26- Clean up and comment writing of MSRs for cache control (Backport from v3)Edwin Beasant
- Invalidate Cache Tags (by means of in-place rewrite of cache data) which allows CAR data to be flushed to RAM - Re-enable cache after flush of CAR to RAM Signed-off-by: Edwin Beasant <edwin_beasant@virtensys.com> Acked-by: Patrick Georgi <patrick.georgi@coresystems.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5055 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2010-01-25Fix ACPI build on a couple of boards (now that it's active)Patrick Georgi
Fix timer handling on amd/sc520 systems Match UDELAY_* configuration of newconfig in Kconfig Signed-off-by: Patrick Georgi <patrick.georgi@coresystems.de> Acked-by: Stefan Reinauer <stepan@coresystems.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5054 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2010-01-25This code was copied from amdk8 and never really made usable. Stefan Reinauer
It's supposed to be a userspace regression test for ram init, but in fact, it doesn't even execute ram init. This was suggested by Carl-Daniel on 2009-08-27 Thus, dropping it. Signed-off-by: Stefan Reinauer <stepan@coresystems.de> Acked-by: Stefan Reinauer <stepan@coresystems.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5053 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2010-01-25More Kconfig changes to improve match with newconfig:Patrick Georgi
DIMM_SUPPORT APIC_ID_OFFSET ACPI_SSDTX_NUM IRQ_SLOT_COUNT MAINBOARD_PCI_SUBSYSTEM_VENDOR_ID (except msi/ms9185) MAINBOARD_PCI_SUBSYSTEM_DEVICE_ID MEM_TRAIN_SEQ HAVE_ACPI_RESUME Also remove MMX (kconfig specific) and HAVE_MOVNTI and IOAPIC (which we deliberately differ in kconfig) from compareboard report. Signed-off-by: Patrick Georgi <patrick.georgi@coresystems.de> Acked-by: Stefan Reinauer <stepan@coresystems.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5052 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2010-01-25Align several kconfig options to match newconfig:Patrick Georgi
HT_CHAIN_UNITID_BASE HT_CHAIN_END_UNITID_BASE SB_HT_CHAIN_ON_BUS0 SB_HT_CHAIN_UNITID_OFFSET_ONLY MAX_CPUS MAX_PHYSICAL_CPUS ROM_SIZE TSC_X86RDTSC_CALIBRATE_WITH_TIMER2 Also hook up asus/p2b-ds Signed-off-by: Patrick Georgi <patrick.georgi@coresystems.de> Acked-by: Stefan Reinauer <stepan@coresystems.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5051 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2010-01-24Document CONFIG_PCI usage in the README (trivial).Uwe Hermann
Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de> Acked-by: Uwe Hermann <uwe@hermann-uwe.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5050 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2010-01-24Update list of superiotool contributors to r5048 (trivial).Uwe Hermann
The list is mostly generated by grepping for Signed-off-by in 'svn log'. Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de> Acked-by: Uwe Hermann <uwe@hermann-uwe.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5049 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2010-01-24Add missing files from the last commit (trivial).Uwe Hermann
Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de> Acked-by: Uwe Hermann <uwe@hermann-uwe.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5048 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2010-01-24Add VIA VT82C686A/VT82C686B detection support to superiotool.Carl-Daniel Hailfinger
This adds an additional requirement to superiotool: libpci. The PCI code is conditional on PCI_SUPPORT. You can set the CONFIG_PCI variable in the Makefile to 'no' to disable it. Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de> Acked-by: Stefan Reinauer <stepan@coresystems.de> Acked-by: Uwe Hermann <uwe@hermann-uwe.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5047 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2010-01-23Add detection support for the Winbond W83667HG Super I/O.David Bartley
$ sudo ./superiotool superiotool r4931 Found Winbond W83667HG (id=0xa5, rev=0x13) at 0x2e Details: http://lists.lm-sensors.org/pipermail/lm-sensors/2008-July/023683.html Signed-off-by: David Bartley <dtbartle@csclub.uwaterloo.ca> Acked-by: Uwe Hermann <uwe@hermann-uwe.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5046 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2010-01-23Add detection support for ITE IT8510E/TE/G and IT8511E/TE/G.Anders Juel Jensen
Signed-off-by: Anders Juel Jensen <andersjjensen@gmail.com> Acked-by: Uwe Hermann <uwe@hermann-uwe.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5045 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2010-01-20These two files accidently got a wrong license header.Stefan Reinauer
Clarified with the authors Signed-off-by: Stefan Reinauer <stepan@coresystems.de> Acked-by: Ronald G. Minnich <rminnich@gmail.com> Acked-by: Peter Stuge <peter@stuge.se> Acked-by: Myles Watson <mylesgw@gmail.com> Acked-by: Patrick Georgi <patrick.georgi@coresystems.de> Acked-by: Uwe Hermann <uwe@hermann-uwe.de> Acked-by: Harald Gutmann <harald.gutmann@gmx.net> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5044 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2010-01-19Kontron 986LCD-M MP table:Stefan Reinauer
When any of the onboard network cards are disabled, the bus numbers change and thus PCI devices in the riser wouldn't get their interrupts right if a kernel without ACPI support is booted. This patch dynamically creates the correct bus numbers for the firewire and riser card entries Signed-off-by: Stefan Reinauer <stepan@coresystems.de> Acked-by: Peter Stuge <peter@stuge.se> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5043 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2010-01-19Add Yabel support (int 15 5fXX callbacks for vga bios) on the kontron 986lcd-mStefan Reinauer
so it's possible to use the LCD panel connector. Values are hard coded instead of read from CMOS but it's a start. Signed-off-by: Stefan Reinauer <stepan@coresystems.de> Acked-by: Peter Stuge <peter@stuge.se> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5042 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2010-01-19dev->rom_address was dropped a while ago which broke yabel. This patch fixes itStefan Reinauer
again. Signed-off-by: Stefan Reinauer <stepan@coresystems.de> Acked-by: Peter Stuge <peter@stuge.se> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5041 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2010-01-19drop COREBOOT_V2 and COREBOOT_V4 define. We're not sharing code with v3Stefan Reinauer
anymore so this ugly hack is no longer needed. Signed-off-by: Stefan Reinauer <stepan@coresystems.de> Acked-by: Peter Stuge <peter@stuge.se> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5040 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2010-01-18Move all IOAPIC selection to southbridges, and remove themPatrick Georgi
from mainboards. Some adaptations were necessary after the IOAPIC cleanup, so this should fix the build. Fix intel/d945gclf build, which was missing some ACPI component. Signed-off-by: Patrick Georgi <patrick.georgi@coresystems.de> Acked-by: Stefan Reinauer <stepan@coresystems.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5039 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2010-01-18run preprocessor on DSDT of D945GCLF, otherwise Stefan Reinauer
smart iasl will segfault. Signed-off-by: Stefan Reinauer <stepan@coresystems.de> Acked-by: Stefan Reinauer <stepan@coresystems.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5038 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2010-01-18ncurses is only a requirement for make menuconfig, not for Kconfig in general.Stefan Reinauer
Signed-off-by: Stefan Reinauer <stepan@coresystems.de> Acked-by: Stefan Reinauer <stepan@coresystems.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5037 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2010-01-18add ncurses to list of requirementsStefan Reinauer
Signed-off-by: Stefan Reinauer <stepan@coresystems.de> Acked-by: Stefan Reinauer <stepan@coresystems.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5036 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2010-01-18get rid of Kconfig warning.Stefan Reinauer
Signed-off-by: Stefan Reinauer <stepan@coresystems.de> Acked-by: Stefan Reinauer <stepan@coresystems.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5035 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2010-01-17msrtool: Fix typoPaul Menzel
Trivial! Signed-off-by: Paul Menzel <paulepanter@users.sourceforge.net> Acked-by: Peter Stuge <peter@stuge.se> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5034 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2010-01-17msrtool: Read both MSR values from file in diff modePeter Stuge
Previously, msrtool would assume that MSR values should be compared between stored value in file and current value in hardware which msrtool was running on. This does not always fit the use case and with this change msrtool can now compare two sets of MSR values stored in a file. If only one MSR value is stored in the file, msrtool will behave as before, and read the second MSR value from hardware. This change means that msrtool does not always need access to the system MSR functions so it can now be run as a regular user when using diff mode with both MSR values stored in the file. Signed-off-by: Peter Stuge <peter@stuge.se> Acked-by: Stefan Reinauer <stepan@coresystems.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5033 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2010-01-17msrtool: Add endptr to str2msr() showing how many characters were parsedPeter Stuge
This also introduces a small change in the user interface for immediate mode (-i). Previously, whitespace could separate high and low words in an MSR as such: msrtool -i 4c00000f='f2f100ff 56960004' That is no longer allowed, a space character now ends the MSR value. Any other character can still be used as separator however, so the following syntax still works as expected: msrtool -i 4c00000f=f2f100ff:56960004 Signed-off-by: Peter Stuge <peter@stuge.se> Acked-by: Stefan Reinauer <stepan@coresystems.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5032 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2010-01-17Add support for the Roda RK886EX a.k.a Rocky III+ ruggedised notebookStefan Reinauer
http://www.roda-computer.com/en/products/notebooks/rocky-iii-rk886ex.html Signed-off-by: Stefan Reinauer <stepan@coresystems.de> Acked-by: Ronald G. Minnich <rminnich@gmail.com> Acked-by: Peter Stuge <peter@stuge.se> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5031 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2010-01-17Initial PCIe tuning: Enable Active State Power Management (ASPM)Stefan Reinauer
Signed-off-by: Stefan Reinauer <stepan@coresystems.de> Acked-by: Ronald G. Minnich <rminnich@gmail.com> Acked-by: Peter Stuge <peter@stuge.se> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5030 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2010-01-17Add support for the Texas Instruments Cardbus+Firewire bridge TI PCI7420Stefan Reinauer
Signed-off-by: Stefan Reinauer <stepan@coresystems.de> Acked-by: Ronald G. Minnich <rminnich@gmail.com> Acked-by: Peter Stuge <peter@stuge.se> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5029 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2010-01-17Add support for Renesas M3885x Embedded ControllerStefan Reinauer
Signed-off-by: Stefan Reinauer <stepan@coresystems.de> Acked-by: Ronald G. Minnich <rminnich@gmail.com> Acked-by: Peter Stuge <peter@stuge.se> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5028 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2010-01-17Add support for the SMSC LPC47n227 SuperI/O chipStefan Reinauer
Signed-off-by: Stefan Reinauer <stepan@coresystems.de> Acked-by: Ronald G. Minnich <rminnich@gmail.com> Acked-by: Peter Stuge <peter@stuge.se> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5027 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2010-01-17ICH7 updateStefan Reinauer
* change the code to use macros names instead of constants in many places * SMI/ACPI: rework power-off code to work with old Linux kernels (2.6.12.x) * SMI: Add support for mainboard GPI handler * SMI: immediate power-off on power button press, if OSPM is not active * Add fix for some USB errata * Some register tweaks for mobile systems * Enable configure SCI on interrupt 9 correctly. Signed-off-by: Stefan Reinauer <stepan@coresystems.de> Acked-by: Ronald G. Minnich <rminnich@gmail.com> Acked-by: Peter Stuge <peter@stuge.se> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5026 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2010-01-17Support a few more i945 variants. With this framework in place it shouldStefan Reinauer
be possible to support i955 and i975 relatively easy, too. Signed-off-by: Stefan Reinauer <stepan@coresystems.de> Acked-by: Ronald G. Minnich <rminnich@gmail.com> Acked-by: Peter Stuge <peter@stuge.se> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5025 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2010-01-16msrtool: More trivial rearrangementPeter Stuge
Rename some variables Remove the 'found' variable which turns out not to be needed anyway Signed-off-by: Peter Stuge <peter@stuge.se> Acked-by: Peter Stuge <peter@stuge.se> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5024 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2010-01-16coreboot has 13 instances of IOAPIC setup distributed across a lotStefan Reinauer
of components. This patch is a rewrite of the generic IOAPIC setup code. Additionally it drops the other 12 instances of IOAPIC setup code and makes the components use the generic code. Signed-off-by: Stefan Reinauer <stepan@coresystems.de> Acked-by: Ronald G. Minnich <rminnich@gmail.com> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5023 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2010-01-16coreboot used to have two different "APIs" for memory accesses:Stefan Reinauer
read32(unsigned long addr) vs readl(void *addr) and write32(unsigned long addr, uint32_t value) vs writel(uint32_t value, void *addr) read32 was only available in __PRE_RAM__ stage, while readl was used in stage2. Some unclean implementations then made readl available to __PRE_RAM__ too which results in really messy includes and code. This patch fixes all code to use the read32/write32 variant, so that we can remove readl/writel in another patch. Signed-off-by: Stefan Reinauer <stepan@coresystems.de> Acked-by: Ronald G. Minnich <rminnich@gmail.com> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5022 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2010-01-16ectool: Support for dumping EC "index ram"Stefan Reinauer
Signed-off-by: Stefan Reinauer <stepan@coresystems.de> Acked-by: Ronald G. Minnich <rminnich@gmail.com> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5021 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2010-01-16msrtool: Remove indent by using continue inside for() to avoid an if blockPeter Stuge
The only actual code change is from if (.. >= 1) { } to if (.. < 1) continue so this is pretty trivial. Signed-off-by: Peter Stuge <peter@stuge.se> Acked-by: Peter Stuge <peter@stuge.se> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5020 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2010-01-16Update reference toolchain toStefan Reinauer
gcc 4.4.2 binutils 2.20 gdb 7.0 and add mingw support. Signed-off-by: Stefan Reinauer <stepan@coresystems.de> Acked-by: Patrick Georgi <patrick.georgi@coresystems.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5019 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2010-01-16Intel D945GCLF: Enable SMI and ACPI in Kconfig, too (it's enabled in newconfig)Stefan Reinauer
and guard SMI specific parts of the ACPI code. (trivial) Signed-off-by: Stefan Reinauer <stepan@coresystems.de> Acked-by: Stefan Reinauer <stepan@coresystems.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5018 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2010-01-16(trivial) cosmetics for i82801gx cmos failover.Stefan Reinauer
Signed-off-by: Stefan Reinauer <stepan@coresystems.de> Acked-by: Stefan Reinauer <stepan@coresystems.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5017 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2010-01-16* drop reset files from 945 mainboards (and use southbridge specific reset)Stefan Reinauer
* drop debug.c files from 945 mainboards (and share it in the northbridge code) * adapt the mainboard and auto.c files for above changes. Rather trivial Signed-off-by: Stefan Reinauer <stepan@coresystems.de> Acked-by: Stefan Reinauer <stepan@coresystems.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5016 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2010-01-16nvramtool: Consider a string with non-printable characters a "bad value".Stefan Reinauer
Otherwise nvramtool -a with random cmos contents can mess up your terminal. Signed-off-by: Stefan Reinauer <stepan@coresystems.de> Acked-by: Patrick Georgi <patrick.georgi@coresystems.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5015 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2010-01-16Make internal functions static in speedstep ACPI generation code.Stefan Reinauer
(trivial) Signed-off-by: Stefan Reinauer <stepan@coresystems.de> Acked-by: Stefan Reinauer <stepan@coresystems.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5014 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2010-01-16Fix stack base for Atom CPUs, the resume mechanism (cbmem etc) expects this.Stefan Reinauer
This unifies the base with Core and Core 2 CPUs. Signed-off-by: Stefan Reinauer <stepan@coresystems.de> Acked-by: Stefan Reinauer <stepan@coresystems.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5013 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2010-01-16Micro-optimization: movl $0 --> xorl.Stefan Reinauer
Signed-off-by: Stefan Reinauer <stepan@coresystems.de> Acked-by: Stefan Reinauer <stepan@coresystems.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5012 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2010-01-16new microcode for Intel Core 2(tm) CPUsStefan Reinauer
(taken from Intel's Linux microcode release) Signed-off-by: Stefan Reinauer <stepan@coresystems.de> Acked-by: Stefan Reinauer <stepan@coresystems.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5011 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2010-01-16RTC: Don't drop the alpha specific code but get it in shape for our Kconfig ↵Stefan Reinauer
scheme. (trivial) Signed-off-by: Stefan Reinauer <stepan@coresystems.de> Acked-by: Stefan Reinauer <stepan@coresystems.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5010 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2010-01-15(missing svn add)Nils Jacobs
Support for the AMD Geode GX2 Processors to Msrtool. It seems to work as it was tested on a Wyse Winterm S50. Signed-off-by: Nils Jacobs <njacobs8@hetnet.nl> Acked-by: Stefan Reinauer <stepan@coresystems.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5009 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
generated by cgit v1.2.3 (git 2.25.1) at 2024-12-22 21:28:08 +0000