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2015-04-26lint: remove test for build dir handlingPatrick Georgi
This test outlives its usefulness and only slows down commits. We can now be confident that out-of-tree builds work because some of our automated builders do them regularly. Change-Id: I7c27e613ddd16f7bacbd4e232596b8a76e0c3301 Signed-off-by: Patrick Georgi <pgeorgi@chromium.org> Reviewed-on: http://review.coreboot.org/9988 Tested-by: build bot (Jenkins) Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org> Reviewed-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
2015-04-26crossgcc: close stdin when search_tool() execute programs.Alexander Couzens
bzip2 --version |grep -c will wait for input on stdin. ./buildgcc will hang because of this. Add `cat /dev/null |` close the stdin. Change-Id: I2a8b08a4d90ca7a89705923d5b68ba6ac13f29b3 Signed-off-by: Alexander Couzens <lynxis@fe80.eu> Reviewed-on: http://review.coreboot.org/9605 Tested-by: build bot (Jenkins) Reviewed-by: Patrick Georgi <pgeorgi@google.com>
2015-04-25nvidia/cbootimage: update to 1.5Patrick Georgi
Change-Id: I16e7c376fe6d79676734df325ac61449bb2d0871 Signed-off-by: Patrick Georgi <pgeorgi@chromium.org> Reviewed-on: http://review.coreboot.org/9982 Tested-by: build bot (Jenkins) Reviewed-by: Marc Jones <marc.jones@se-eng.com>
2015-04-25cbfstool: Fix ability to add files at offsets near the end of empty spacesSol Boucher
Because cbfs_add_entry_at() previously *assumed* it would have to create a trailing empty entry, it was impossible to add files at exact offsets close enough to the end of an existing empty entry that they occupied the remainder of its space. This addresses the problem by skipping the step of creating the trailing empty entry if doing so would place it at the start offset of whatever already followed the original empty section. BUG=chromium:473511 TEST=Run the following commands: $ ./cbfstool test.image create -s 0x100000 -m arm $ dd if=/dev/zero of=twok.bin bs=1 count=2048 $ ./cbfstool test.image add -t 0x50 -f twok.bin -n at_end -b 0xff7c0 $ ./cbfstool test.image add -t 0x50 -f twok.bin -n near_end -b 0xfef80 $ ./cbfstool test.image print There shouldn't be any assertions, and the output should be: test.image: 1024 kB, bootblocksize 0, romsize 1048576, offset 0x40 alignment: 64 bytes, architecture: arm Name Offset Type Size (empty) 0x40 null 1044184 near_end 0xfef40 raw 2048 at_end 0xff780 raw 2048 BRANCH=None Change-Id: Ic8a6c3dfa4f82346a067c0804afb6c5a5e89e6c8 Signed-off-by: Sol Boucher <solb@chromium.org> Original-Commit-Id: 1bbd353fddc818f725e488e8f2fb6e967033539d Original-Change-Id: I15d25df80787a8e34c2237262681720203509c72 Original-Signed-off-by: Sol Boucher <solb@chromium.org> Original-Reviewed-on: https://chromium-review.googlesource.com/263809 Original-Reviewed-by: Hung-Te Lin <hungte@chromium.org> Original-Reviewed-by: Stefan Reinauer <reinauer@google.com> Reviewed-on: http://review.coreboot.org/9938 Tested-by: build bot (Jenkins) Reviewed-by: Patrick Georgi <pgeorgi@google.com> Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
2015-04-25cbfstool: Clean up in preparation for adding new filesSol Boucher
This enables more warnings on the cbfstool codebase and fixes the issues that surface as a result. A memory leak that used to occur when compressing files with lzma is also found and fixed. Finally, there are several fixes for the Makefile: - Its autodependencies used to be broken because the target for the .dependencies file was misnamed; this meant that Make didn't know how to rebuild the file, and so would silently skip the step of updating it before including it. - The ability to build to a custom output directory by defining the obj variable had bitrotted. - The default value of the obj variable was causing implicit rules not to apply when specifying a file as a target without providing a custom value for obj. - Add a distclean target for removing the .dependencies file. BUG=chromium:461875 TEST=Build an image with cbfstool both before and after. BRANCH=None Change-Id: I951919d63443f2b053c2e67c1ac9872abc0a43ca Signed-off-by: Sol Boucher <solb@chromium.org> Original-Commit-Id: 49293443b4e565ca48d284e9a66f80c9c213975d Original-Change-Id: Ia7350c2c3306905984cfa711d5fc4631f0b43d5b Original-Signed-off-by: Sol Boucher <solb@chromium.org> Original-Reviewed-on: https://chromium-review.googlesource.com/257340 Original-Reviewed-by: Julius Werner <jwerner@chromium.org> Original-Reviewed-by: Stefan Reinauer <reinauer@chromium.org> Reviewed-on: http://review.coreboot.org/9937 Tested-by: build bot (Jenkins) Reviewed-by: Patrick Georgi <pgeorgi@google.com>
2015-04-24driver/intel/fsp: Correct the fastboot data (MRC data) printing lengthYork Yang
Fastboot data in Intel FSP project is printed by hexdump32() in dword length. So the data length needs to be divided by 4 when printing it. Change-Id: I959d538bd6e60282882dd138045cc730b4bd8159 Signed-off-by: York Yang <york.yang@intel.com> Reviewed-on: http://review.coreboot.org/9976 Tested-by: build bot (Jenkins) Reviewed-by: Marc Jones <marc.jones@se-eng.com>
2015-04-24Revert "board-status: Add field for release year"Alexandru Gagniuc
This reverts commit d555d5a2b5364d2eeb13e2ace00844c7b6321bb9. It produces too much clutter, and is not particularly useful. Change-Id: I62268a215a22a5cc76a10cdcfcae86349b466963 Signed-off-by: Alexandru Gagniuc <mr.nuke.me@gmail.com> Reviewed-on: http://review.coreboot.org/9990 Reviewed-by: Patrick Georgi <pgeorgi@google.com> Tested-by: Patrick Georgi <pgeorgi@google.com>
2015-04-24board-status: Add field for release yearPatrick Georgi
Add the option to add a release year to each mainboard to get a sense of how old the hardware is. Change-Id: Id43c80fdf8bf65241b2be92678616d1774529f8c Signed-off-by: Patrick Georgi <pgeorgi@google.com> Reviewed-on: http://review.coreboot.org/9945 Tested-by: build bot (Jenkins) Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net> Reviewed-by: Alexander Couzens <lynxis@fe80.eu>
2015-04-24fsp: Move fsp to fsp1_0Marc Jones
Prepare for FSP 1.1 integration by moving the FSP to a FSP 1.0 specific directory. See follow-on patches for sharing of common code. Change-Id: Ic58cb4074c65b91d119909132a012876d7ee7b74 Signed-off-by: Marc Jones <marc.jones@se-eng.com> Reviewed-on: http://review.coreboot.org/9970 Tested-by: build bot (Jenkins) Reviewed-by: Aaron Durbin <adurbin@chromium.org>
2015-04-23ramstage: don't drop cbmem consoleAaron Durbin
In commit b0d8f5e9 I moved the call to cbmem_initialize() in the CONFIG_EARLY_CBMEM_INIT case to the very beginning of ramstage. However, that caused an issue in the ordering of the cbmem console driver in that it expects cbmemc_init() to be called prior to cbmemc_reinit(). Therefore, ensure console is called as the first thing even if some time is lost w.r.t. timestamp tracking. Change-Id: I42137d28116e0bccb9235f4e3f394d4fd8b84e37 Signed-off-by: Aaron Durbin <adurbin@chromium.org> Reviewed-on: http://review.coreboot.org/9933 Tested-by: Raptor Engineering Automated Test Stand <noreply@raptorengineeringinc.com> Tested-by: build bot (Jenkins) Reviewed-by: Patrick Georgi <pgeorgi@google.com>
2015-04-23cbmem_console: fix it for x86Aaron Durbin
The Kconfig options pertaining cbmem console in the preram environment no longer make sense with the linker script changes. Remove them and their usage within cbmem_console. Change-Id: Ibf61645ca2331e4851e748e4e7aa5059e1192ed7 Signed-off-by: Aaron Durbin <adurbin@chromium.org> Reviewed-on: http://review.coreboot.org/9851 Tested-by: build bot (Jenkins) Reviewed-by: Patrick Georgi <pgeorgi@google.com>
2015-04-23memlayout: Make sure preram_cbmem_console symbols existPatrick Georgi
This enables its _size variable (a macro) to work even when the console has no location assigned to it in the chip/board's memlayout.ld. Since _size == 0, the code will do the right thing. Change-Id: I6b42ed0c5c3aaa613603680728b61cbdb24c4b61 Signed-off-by: Patrick Georgi <pgeorgi@chromium.org> Reviewed-on: http://review.coreboot.org/9973 Tested-by: build bot (Jenkins) Reviewed-by: Aaron Durbin <adurbin@chromium.org>
2015-04-23src/mainboard/*/*/board_info.txt: Added Release year for boardsMathias Friman
To simplify browsing the "Supported hardware" list, I added Release year for the hardware from asus, asrock, gigabyte, msi, via, tyan, intel, lenovo, apple, jetway and hp. Still several models and manufacturers to add information to. This is more of a proof-of-concept. The "Release year" will be shown in the wiki page. Change-Id: I6bc14ed06ac7c6b3c9f054b49f08cb9b3dc47947 Signed-off-by: Mathias Friman <mathias@workplays.se> Reviewed-on: http://review.coreboot.org/9963 Tested-by: build bot (Jenkins) Reviewed-by: Patrick Georgi <pgeorgi@google.com> Reviewed-by: Edward O'Callaghan <edward.ocallaghan@koparo.com>
2015-04-23AMD Lamar: Add a new AMD FP3 socket mainboardBruce Griffith
Add a new mainboard based on AMD's Family 15 Model 30 processor. TEST: Lamar will boot DOS, Ubuntu 14.10 and Windows 7. Change-Id: I2f73c396247239d54f978846e8958950697d7464 Signed-off-by: Bruce Griffith <Bruce.Griffith@se-eng.com> Signed-off-by: Dave Frodin <dave.frodin@se-eng.com> Reviewed-on: http://review.coreboot.org/5968 Tested-by: build bot (Jenkins) Reviewed-by: Marc Jones <marc.jones@se-eng.com>
2015-04-22cbmem: switch over to imd-based cbmemAaron Durbin
By design, the imd library still provdes dynamic growth so that feature is consistent. The imd-based cbmem packs small allocations into a larger entry using a tiered imd. The following examples show the reduced fragmentation and reduced memory usage. Before with dynamic cbmem: CBMEM ROOT 0. 023ff000 00001000 aaaabbbb 1. 023fe000 00001000 aaaabbbc 2. 023fd000 00001000 aaaabbbe 3. 023fc000 00001000 aaaacccc 4. 023fa000 00002000 aaaacccd 5. 023f9000 00001000 ROMSTAGE 6. 023f8000 00001000 CONSOLE 7. 023d8000 00020000 COREBOOT 8. 023d6000 00002000 After with tiered imd: IMD ROOT 0. 023ff000 00001000 IMD SMALL 1. 023fe000 00001000 aaaacccc 2. 023fc000 00001060 aaaacccd 3. 023fb000 000007cf CONSOLE 4. 023db000 00020000 COREBOOT 5. 023d9000 00002000 IMD small region: IMD ROOT 0. 023fec00 00000400 aaaabbbb 1. 023febe0 00000020 aaaabbbc 2. 023feba0 00000040 aaaabbbe 3. 023feb20 00000080 ROMSTAGE 4. 023feb00 00000004 Side note: this CL provides a basis for what hoops one needs to jump through when there are not writeable global variables on a particular platform in the early stages. Change-Id: If770246caa64b274819e45a26e100b62b9f8d2db Signed-off-by: Aaron Durbin <adurbin@chromium.org> Reviewed-on: http://review.coreboot.org/9169 Tested-by: build bot (Jenkins) Reviewed-by: Marc Jones <marc.jones@se-eng.com>
2015-04-22elog: enable by default for CHROMEOSPatrick Georgi
elog breaks the build if ELOG_FLASH_BASE isn't configured - and CHROMEOS isn't enabled, since with Chrome OS builds, it just uses fmap to find out the base. So it makes sense to enable it on all Chrome OS builds - if the code never uses it, the linker will drop it soon enough. Change-Id: I7ee129fadf75caf15fb9bd32b0acf6f7d9d015d8 Signed-off-by: Patrick Georgi <pgeorgi@chromium.org> Reviewed-on: http://review.coreboot.org/9965 Tested-by: build bot (Jenkins) Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2015-04-22google/storm: indicate start of normal boot on LED ringVadim Bendebury
Instead of switching off the LED ring for the normal boot path, turn it on with the dedicated pattern, indicating that the device firmware has started executing. BRANCH=storm BUG=chrome-os-partner:39044 TEST=program the new firmware on an SP5 device and verify that the new 'normal boot' pattern is displayed in all following scenarios: - power up the device (the pattern shows within the first second) - boot the device to bash prompt and restart. - press the recovery button and reboot the device. Once the LED ring shows the 'recovery button pressed' pattern, release the recovery button. Change-Id: Iedd66d2575ad587af77e35d23efb22a83a92858b Signed-off-by: Patrick Georgi <pgeorgi@chromium.org> Original-Commit-Id: 092358bd17a323d0bd2fec555f43cb587486bbec Original-Change-Id: I24de45326eab83b57bcf16b5598388f81c7d0f00 Original-Signed-off-by: Vadim Bendebury <vbendeb@chromium.org> Original-Reviewed-on: https://chromium-review.googlesource.com/265536 Original-Reviewed-by: Aaron Durbin <adurbin@chromium.org> Reviewed-on: http://review.coreboot.org/9923 Tested-by: build bot (Jenkins) Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org> Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
2015-04-22i2c/ww_ring: add a pattern for normal bootVadim Bendebury
It became necessary to indicate the beginning of the normal boot process. This patch adds a new pattern, a slow (over 2 seconds) fade in into the 0, 87, 155 color. BRANCH=storm BUG=chrome-os-partner:39044 TEST=tested by the next patch. Change-Id: Idd977688e5aa2cc55fc295072c0766526ae95016 Signed-off-by: Patrick Georgi <pgeorgi@chromium.org> Original-Commit-Id: 577c8bd6f8c69073cfdd7acd4a87e7ae603d48e6 Original-Change-Id: I9aff3f4558e733ff2e47206075533556e400f183 Original-Signed-off-by: Vadim Bendebury <vbendeb@chromium.org> Original-Reviewed-on: https://chromium-review.googlesource.com/265535 Original-Reviewed-by: Aaron Durbin <adurbin@chromium.org> Reviewed-on: http://review.coreboot.org/9922 Tested-by: build bot (Jenkins) Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2015-04-22google/storm: enable zero page access protection.Deepa Dinamani
BRANCH=storm BUG=chrome-os-partner:24786 TEST=verified mmu.pagetable.list output for Storm: _______address___________|_physical________________|sec|_d_|_size____|_permissions____________________|_glb|_shr|_pageflags______________________| C:00000000--00000FFF| | | | | | | | | C:00001000--000FFFFF| A:00:00001000--000FFFFF| ns| 00| 00001000| P:readwrite U:readwrite notexec| yes| no | strongly ordered | C:00100000--29FFFFFF| A:00:00100000--29FFFFFF| ns| 00| 00100000| P:readwrite U:readwrite notexec| yes| no | strongly ordered | C:2A000000--2A05FFFF| A:00:2A000000--2A05FFFF| ns| 00| 00001000| P:readwrite U:readwrite exec | yes| no | write-back/no write alloc | C:2A060000--2A0FFFFF| A:00:2A060000--2A0FFFFF| ns| 00| 00001000| P:readwrite U:readwrite notexec| yes| no | strongly ordered | C:2A100000--3FFFFFFF| A:00:2A100000--3FFFFFFF| ns| 00| 00100000| P:readwrite U:readwrite notexec| yes| no | strongly ordered | C:40000000--59FFFFFF| A:00:40000000--59FFFFFF| ns| 00| 00100000| P:readwrite U:readwrite exec | yes| no | write-back/no write alloc | C:5A000000--5A1FFFFF| A:00:5A000000--5A1FFFFF| ns| 00| 00100000| P:readwrite U:readwrite notexec| yes| no | strongly ordered | C:5A200000--7FFFFFFF| A:00:5A200000--7FFFFFFF| ns| 00| 00100000| P:readwrite U:readwrite exec | yes| no | write-back/no write alloc | C:80000000--FFFFFFFF| | | | | | | | | Change-Id: I08a5094b2da9d67244c94984e2da14399e477b01 Signed-off-by: Patrick Georgi <pgeorgi@chromium.org> Original-Commit-Id: f137a589434b09055e6b9d32907e662e6c296502 Original-Change-Id: Ia2deab1cf8f08c4ba5a5b6dbe4c4ebf29c9df480 Original-Signed-off-by: Vikas Das <vdas@codeaurora.org> Original-Reviewed-on: https://chromium-review.googlesource.com/253801 Original-Tested-by: Deepa Dinamani <deepad@codeaurora.org> Original-Reviewed-by: Vadim Bendebury <vbendeb@chromium.org> Original-Reviewed-by: Julius Werner <jwerner@chromium.org> Original-Commit-Queue: Deepa Dinamani <deepad@codeaurora.org> Reviewed-on: http://review.coreboot.org/9920 Tested-by: build bot (Jenkins) Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2015-04-22i2c/ww_ring: update color definitionsVadim Bendebury
After testing on a final assembly the PD team adjusted the wipeout request and recovery request modes' colors. BRANCH=storm BUG=none TEST=verified new colors while booting an SP5 device in recovery mode Change-Id: I9bd2dac63b99140573533c2cda8eaa9213478ab1 Signed-off-by: Patrick Georgi <pgeorgi@chromium.org> Original-Commit-Id: 41c34a619dc0317af67907f18ee844c71a73d623 Original-Change-Id: Iab84710ebdeed35ddd4a8a163bbb6b8ac9cdb799 Original-Signed-off-by: Vadim Bendebury <vbendeb@chromium.org> Original-Reviewed-on: https://chromium-review.googlesource.com/262602 Original-Reviewed-by: Aaron Durbin <adurbin@chromium.org> Reviewed-on: http://review.coreboot.org/9890 Tested-by: build bot (Jenkins) Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2015-04-22i2c/ww_ring: change colors for different display modesVadim Bendebury
Modify colors as suggested by product review folks. This is not final, to make it easier to identify RGB locations in the hex dumps, express their values in decimal as opposed to hex. BRANCH=storm BUG=chrome-os-partner:36059 TEST=verified new all three color schemes while pressing the recovery button at boot for 20 seconds. Change-Id: I7461acd7004e3d10cba6665a9bfe25ec8aa6f3ba Signed-off-by: Patrick Georgi <pgeorgi@chromium.org> Original-Commit-Id: 7a075824a1954eb5d1b65ce887304924724a6d21 Original-Change-Id: I7f5968e361333572fd1f84aa11b7150194ad902a Original-Signed-off-by: Vadim Bendebury <vbendeb@chromium.org> Original-Reviewed-on: https://chromium-review.googlesource.com/261690 Original-Reviewed-by: Aaron Durbin <adurbin@chromium.org> Reviewed-on: http://review.coreboot.org/9880 Tested-by: build bot (Jenkins) Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2015-04-22storm: add config option to clear dev mode state on recoveryVadim Bendebury
Storm and whirlwind devices should leave developer mode as soon as recovery is requested. BRANCH=storm BUG=chrome-os-partner:36059 TEST=with the rest of the patches applies observed desired behavior on SP5 Change-Id: I3e8e481f85cd067eff4fe2049b8aa47e09f6d63e Signed-off-by: Patrick Georgi <pgeorgi@chromium.org> Original-Commit-Id: c6dbafc16edb11ec687359b25098ce8a1b055b91 Original-Change-Id: Iac6fa62229556bc7a6960d7f1630d37570ba72c4 Original-Signed-off-by: Vadim Bendebury <vbendeb@chromium.org> Original-Reviewed-on: https://chromium-review.googlesource.com/261621 Original-Reviewed-by: Aaron Durbin <adurbin@chromium.org> Reviewed-on: http://review.coreboot.org/9879 Tested-by: build bot (Jenkins) Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2015-04-22google/storm: enable virtual development mode switchVadim Bendebury
The whirlwind device is using a button instead of the switch to enable dev mode. BRANCH=storm BUG=chrome-os-partner:36059 TEST=with the rest of the patches applied it is possible to enable and disable dev mode on Whirlwind and the mode persists over reboots. Change-Id: I6d31c8429ea0515bea2b7d707325d9092487048a Signed-off-by: Patrick Georgi <pgeorgi@chromium.org> Original-Commit-Id: 495bd07e3a1d6c587a5f01efa2801d2c4e7edbe8 Original-Change-Id: I8879833ca13074e8275393c3b98df06d56a5361d Original-Signed-off-by: Vadim Bendebury <vbendeb@chromium.org> Original-Reviewed-on: https://chromium-review.googlesource.com/261416 Original-Reviewed-by: David Hendricks <dhendrix@chromium.org> Reviewed-on: http://review.coreboot.org/9875 Tested-by: build bot (Jenkins) Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2015-04-22i2c/ww_ring: use shorter blinking programVadim Bendebury
The originally loaded blinking program was written to allow gradual change in LED brightness, which required controlling each LED with its own engine. In fact there is no need in gradual brightness changes when the firmware is controlling the ring. This allows to control all LEDs by one engine, making the code simpler and more robust (no need to synchronize the three engines any more). BRANCH=storm BUG=chrome-os-partner:36059 TEST=verified that recovery boot WW ring patterns work as expected. Change-Id: I89d231fb61693f4e834d8d9323ae5a7ddd149525 Signed-off-by: Patrick Georgi <pgeorgi@chromium.org> Original-Commit-Id: 19809cf8120df8865da9b5b9e7b8e932334bf4b5 Original-Change-Id: I41038fd976dc9600f223dc0e9c9602331baf68f9 Original-Signed-off-by: Vadim Bendebury <vbendeb@chromium.org> Original-Reviewed-on: https://chromium-review.googlesource.com/261026 Original-Reviewed-by: Aaron Durbin <adurbin@chromium.org> Reviewed-on: http://review.coreboot.org/9873 Tested-by: build bot (Jenkins) Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2015-04-22i2c/ww_ring: stop running programs before loading the new onesVadim Bendebury
The two controllers on the ring are programmed independently, and if the second controller is running the old pattern while the first one was loaded with a new pattern, there is a window of when the two unrelated patterns might interact. To avoid this shut down execution on both controllers before starting downloading the new pattern code. BRANCH=storm BUG=chrome-os-partner:36059 TEST=verified recovery/wipeout LED ring behavior did not change. Change-Id: I163f2983d414fe839208054ae3e9025663a46aeb Signed-off-by: Patrick Georgi <pgeorgi@chromium.org> Original-Commit-Id: 3502ca6b119c033855b45388e7b782d35cfdd82b Original-Change-Id: I0f71f94a7e82f6c0e7f98d3aad1f93ece207248f Original-Signed-off-by: Vadim Bendebury <vbendeb@chromium.org> Original-Reviewed-on: https://chromium-review.googlesource.com/261200 Original-Reviewed-by: Aaron Durbin <adurbin@chromium.org> Reviewed-on: http://review.coreboot.org/9872 Tested-by: build bot (Jenkins) Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2015-04-22i2c/ww_ring: define display pattern programsVadim Bendebury
Add compiled lp55231 code snippets to allow display certain patterns when booting the device with the recovery button pressed. As soon as the press is detected, the low intensify solid white pattern is enabled. Holding recovery button long enough causes the device transition between the wipeout requested and recovery requested states, with the appropriate changes in the displayed pattern. The patch also includes the source code for the LED controller as well as instructions on how to compile and modify the code to result in different colors, intensities, blink periods and duty cycles. BRANCH=storm BUG=chrome-os-partner:36059 TEST=reboot an SP5 device with the LED ring attached, keep the recovery button pressed, observe the changes in the LED display pattern while the device progresses through the boot sequence. Change-Id: Ic7d45fc7c313b6d21119d4ae6adaeb4f46f7d181 Signed-off-by: Patrick Georgi <pgeorgi@chromium.org> Original-Commit-Id: 0fd6a5c0067d705197816629f41640a931d2f7cd Original-Change-Id: Ib5cc5188c2eeedbba128101bf4092a0b9a74e155 Original-Signed-off-by: Vadim Bendebury <vbendeb@chromium.org> Original-Reviewed-on: https://chromium-review.googlesource.com/260670 Original-Reviewed-by: Aaron Durbin <adurbin@chromium.org> Reviewed-on: http://review.coreboot.org/9870 Tested-by: build bot (Jenkins) Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2015-04-22i2c/ww_ring: decouple LED display from vbootVadim Bendebury
The patterns displayed on the LED ring while under the coreboot control are not driven by the vboot, but by the board code instead, The four distinct states of the LED display are: - all off - recovery button push detected, waiting for it to be released - wipeout request pending - recovery button was pushed long enough to trigger this request - recovery request pending - recovery button was pushed long enough to trigger this request. BRANCH=storm BUG=chrome-os-partner:36059 TEST=no functional changes Change-Id: I38d9a3028013b902a7a67ccd4eb1c5d533bf071c Signed-off-by: Patrick Georgi <pgeorgi@chromium.org> Original-Commit-Id: bdfff0e646283da6a2faaacf33e0179d2fea221c Original-Change-Id: Ie279151b6060a2888268a2e9a0d4dc22ecaba460 Original-Signed-off-by: Vadim Bendebury <vbendeb@chromium.org> Original-Reviewed-on: https://chromium-review.googlesource.com/260649 Original-Reviewed-by: Aaron Durbin <adurbin@chromium.org> Reviewed-on: http://review.coreboot.org/9868 Tested-by: build bot (Jenkins) Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2015-04-22i2c/ww_ring: various driver fixes and improvementsVadim Bendebury
When in development environment, some SP5 devices might not have the LED ring attached. They are still fully functional, but when booting up are generating massive amount of i2c error messages. This patch prevents accesses to non-existing lp55321 devices. When loading the program into the device the vendor recommends 1 ms delay when accessing the program control register. This patch separates these accesses into a function and add a delay after every access. Another fix - advance the program address when loading multipage programs. Set the global variable register 3c, not used by coreboot programs, to a fixed value. This will allow depthcharge to avoid re-initializing the controller when not necessary. BRANCH=storm BUG=chrome-os-partner:36059 TEST=booted firmware on an SP5 with no LED ring attached, no excessive error messages are generated, saw the default pattern displayed when the recovery button is pressed during reset. Change-Id: I6a2a27968684c40dae15317540a16405b1419e30 Signed-off-by: Patrick Georgi <pgeorgi@chromium.org> Original-Commit-Id: 5e0b4c84aca27460db594da1faf627ddee56f399 Original-Change-Id: I10f1f53cefb866d11ecf76ea48f74131d8b0ce77 Original-Signed-off-by: Vadim Bendebury <vbendeb@chromium.org> Original-Reviewed-on: https://chromium-review.googlesource.com/260648 Original-Reviewed-by: Aaron Durbin <adurbin@chromium.org> Reviewed-on: http://review.coreboot.org/9867 Tested-by: build bot (Jenkins) Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2015-04-22google/storm: support factory reset (wipeout) requestVadim Bendebury
The recovery switch on storm is overloaded: it needs to be pressed for a certain duration at startup to signal different requests: - keeping it pressed for 8 to 16 seconds after startup signals the need for factory reset (wipeout); - keeping it pressed for longer than 16 seconds signals the need for Chrome OS recovery. This patch adds a function to report the wipeout request status and enables the new feature on Storm. BRANCH=storm BUG=chrome-os-partner:37219 TEST=verified that keeping the recovery button pressed between 8 and 16 seconds at startup results in the wipeout request generated (crossystem 'wipeout_request' returns 1). Keeping the button pressed for more than 16 seconds triggers recovery mode. Change-Id: I17131593e12833866a22837271feb0e6989e6750 Signed-off-by: Patrick Georgi <pgeorgi@chromium.org> Original-Commit-Id: 3c503ec13c2b096d4a21fb299c0dd0396f1d01e9 Original-Change-Id: Ic3678217906e56307d47378fa8a6defeb314084e Original-Signed-off-by: Vadim Bendebury <vbendeb@chromium.org> Original-Reviewed-on: https://chromium-review.googlesource.com/259844 Reviewed-on: http://review.coreboot.org/9863 Tested-by: build bot (Jenkins) Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org> Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
2015-04-22google/storm: use whirlwind LED ring on SP5 boardsVadim Bendebury
The latest whirlwind requirements call for the need to indicate different device states while it is still in coreboot (it could be waiting for recovery or for factory reset trigger). Initialize the LED ring when running on the SP5 hardware (which is the first proper Whirlwind device). BRANCH=storm BUG=chrome-os-partner:36059 TEST=when the device starts the LED ring gets shut down Change-Id: I9dd0bca4849a2a8500322c84c7351aeef00d862e Signed-off-by: Patrick Georgi <pgeorgi@chromium.org> Original-Commit-Id: 24e4da56d4c43d03f235d0cfd5995ef235e6a2c5 Original-Change-Id: Ica37301aa27f35897d2bf467ae319fb5e68adc1d Original-Signed-off-by: Vadim Bendebury <vbendeb@chromium.org> Original-Reviewed-on: https://chromium-review.googlesource.com/258271 Original-Reviewed-by: David Hendricks <dhendrix@chromium.org> Reviewed-on: http://review.coreboot.org/9859 Tested-by: build bot (Jenkins) Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2015-04-22i2c: add support for ww_ringVadim Bendebury
This is a copy of the depthcharge ww ring driver implementation ported into coreboot. The main differences are: - direct use of the i2c driver instead of using the callback driver description - no dynamic memory allocation for the controller structures BRANCH=storm BUG=chrome-os-partner:36059 TEST=with the rest of the patches applied the LED ring gets initialized to the default pattern at coreboot start. Change-Id: I6902c8b76fc173ad2ec28b8cc94695e892df338a Signed-off-by: Patrick Georgi <pgeorgi@chromium.org> Original-Commit-Id: eda24b78f8aff311dd6296d458bdfecf26c3d65a Original-Change-Id: I5660dc3f255aab8fbe3a87041c72916a645c193b Original-Signed-off-by: Vadim Bendebury <vbendeb@chromium.org> Original-Reviewed-on: https://chromium-review.googlesource.com/257730 Original-Reviewed-by: Aaron Durbin <adurbin@chromium.org> Reviewed-on: http://review.coreboot.org/9858 Tested-by: build bot (Jenkins) Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2015-04-22abuild: add option to build with CHROMEOS enabledPatrick Georgi
abuild -x (we're running out of letters) builds with CHROMEOS enabled. Change-Id: Ie9abd8aa999dd339aab113ff28c16671b2a17845 Signed-off-by: Patrick Georgi <pgeorgi@chromium.org> Reviewed-on: http://review.coreboot.org/9966 Tested-by: build bot (Jenkins) Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2015-04-22abuild: mark failed builds as failedPatrick Georgi
abuild only created compile.status for successful builds, but sometimes it's helpful to easily identify all failed builds of a full run: $ grep -l failed coreboot-builds/*/compile.status Change-Id: Ic90280fb2e8cff1f8f558a2e67ffad741beddbdf Signed-off-by: Patrick Georgi <pgeorgi@chromium.org> Reviewed-on: http://review.coreboot.org/9964 Tested-by: build bot (Jenkins) Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
2015-04-22util/broadcom: specify libraries after object filesPatrick Georgi
Some compilers and linkers require a strict order or fail to find all symbols. Change-Id: I3f44bec1f0e21e7313a751fbc99c61c1aa9b7cf1 Signed-off-by: Patrick Georgi <pgeorgi@chromium.org> Reviewed-on: http://review.coreboot.org/9962 Tested-by: build bot (Jenkins) Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net> Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2015-04-22mainboards: Add CHROMEOS_VBNV_* where appropriatePatrick Georgi
For boards with MAINBOARD_HAS_CHROMEOS, we should also state what kind of storage is available for vboot's non-volatile data. The flags are taken from the chromium repository and have no effect with CHROMEOS disabled. Change-Id: I1747ad26c8c7f6d4076740ec2800dbd52c5d6b3d Signed-off-by: Patrick Georgi <pgeorgi@chromium.org> Reviewed-on: http://review.coreboot.org/9952 Tested-by: build bot (Jenkins) Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net> Reviewed-by: Aaron Durbin <adurbin@chromium.org>
2015-04-22intel/broadwell: guard CHROMEOS support betterPatrick Georgi
Since CHROMEOS_VBNV_* are selected by mainboards, they may be active without CHROMEOS being selected. In this case, they should be a no-op. Change-Id: I3b84e2a919ffaa809d713e72e5e4df7a7575e6b9 Signed-off-by: Patrick Georgi <pgeorgi@chromium.org> Reviewed-on: http://review.coreboot.org/9954 Tested-by: build bot (Jenkins) Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net> Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2015-04-22coreboot: common stage cacheAaron Durbin
Many chipsets were using a stage cache for reference code or when using a relocatable ramstage. Provide a common API for the chipsets to use while reducing code duplication. Change-Id: Ia36efa169fe6bd8a3dbe07bf57a9729c7edbdd46 Signed-off-by: Aaron Durbin <adurbin@chromium.org> Reviewed-on: http://review.coreboot.org/8625 Tested-by: build bot (Jenkins) Reviewed-by: Marc Jones <marc.jones@se-eng.com>
2015-04-22coreboot: tiered imdAaron Durbin
A tiered imd allows for both small and large allocations. The small allocations are packed into a large region. Utilizing a tiered imd reduces internal fragmentation within the imd. Change-Id: I0bcd6473aacbc714844815b24d77cb5c542abdd0 Signed-off-by: Aaron Durbin <adurbin@chromium.org> Reviewed-on: http://review.coreboot.org/8623 Tested-by: build bot (Jenkins) Reviewed-by: Marc Jones <marc.jones@se-eng.com>
2015-04-22coreboot: add imd libraryAaron Durbin
The imd (internal memory database) library provides a way to track memory regions by assigning ids to each region. The implementation is a direct descendant of dynamic cbmem. The intent is to replace the existing mechanisms which do similar things: dynamic cbmem, stage cache, etc. Differences between dynamic cbmem and imd: - All structures/objects are relative to one another. There are no absolute pointers serialized to memory. - Allow limiting the size of the idm. i.e. provide a maximum memory usage. - Allow setting the size of the root structure which allows control of the number of allocations to track. Change-Id: Id7438cff80d396a594d6a7330d09b45bb4fedf2e Signed-off-by: Aaron Durbin <adurbin@chromium.org> Reviewed-on: http://review.coreboot.org/8621 Tested-by: build bot (Jenkins) Reviewed-by: Marc Jones <marc.jones@se-eng.com>
2015-04-22chromeos: fix some compilation issuesAaron Durbin
This fixes some compilation issues observed with CONFIG_CHROMEOS. Nothing within the vbootX subdirectories is functional yet, but a partial compilation within the chromeos direction works now. Notable fixes: duplicate definitions and missing prototypes. Change-Id: I53c7b6dcf06b8bcf41a8555094b48968c0740026 Signed-off-by: Aaron Durbin <adurbin@chromium.org> Reviewed-on: http://review.coreboot.org/9936 Tested-by: build bot (Jenkins) Reviewed-by: Patrick Georgi <pgeorgi@google.com>
2015-04-22chromeos: make functions visible with CONFIG_CHROMEOSPatrick Georgi
They were keyed to VBOOT_VERIFY_FIRMWARE which made them invisible under some circumstances. Change-Id: I61c56b4d245351fae0ec14f80bcd17ba93184651 Signed-off-by: Patrick Georgi <pgeorgi@chromium.org> Reviewed-on: http://review.coreboot.org/9956 Tested-by: build bot (Jenkins) Reviewed-by: Aaron Durbin <adurbin@chromium.org>
2015-04-22elog: use CONFIG_RTCPatrick Georgi
When RTC is not selected, return all 0. Change-Id: I892a9489fc1d82fb8e61cf02666f797dc6412e05 Signed-off-by: Patrick Georgi <pgeorgi@chromium.org> Reviewed-on: http://review.coreboot.org/9955 Tested-by: build bot (Jenkins) Reviewed-by: Aaron Durbin <adurbin@chromium.org>
2015-04-22rtc: add config flag to denote rtc API availabilityPatrick Georgi
RTC drivers now select RTC, so that code which depends on them can implement fallback behavior for systems that lack the hardware or driver. Change-Id: I0f5a15d643b0c45c511f1151a98e071b4155fb5a Signed-off-by: Patrick Georgi <pgeorgi@chromium.org> Reviewed-on: http://review.coreboot.org/9953 Tested-by: build bot (Jenkins) Reviewed-by: Aaron Durbin <adurbin@chromium.org>
2015-04-22chromeos: Drop {developer,recovery}_mode_enabledPatrick Georgi
They were already moved to src/lib/bootmode.c in commit 5687fc9 Declare recovery and developer modes outside ChromeOS Change-Id: Ia27a0c79baa364ce3779a8a699e9246d26d02ecb Signed-off-by: Patrick Georgi <pgeorgi@chromium.org> Reviewed-on: http://review.coreboot.org/9951 Tested-by: build bot (Jenkins) Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net> Reviewed-by: Aaron Durbin <adurbin@chromium.org>
2015-04-22nvidia/tegra132: Add spi_crop_chunk()Patrick Georgi
Missed during upstreaming Change-Id: Ifef4bb8a097a71244bdb648840cd64a812673107 Signed-off-by: Patrick Georgi <pgeorgi@chromium.org> Reviewed-on: http://review.coreboot.org/9950 Tested-by: build bot (Jenkins) Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net> Reviewed-by: Aaron Durbin <adurbin@chromium.org>
2015-04-22google/*: Add MAINBOARD_HAS_CHROMEOS where appropriatePatrick Georgi
Some recently upstreamed boards are missing this flag Change-Id: I89d73970f23eed6ea127e620c38f9687b2f5b048 Signed-off-by: Patrick Georgi <pgeorgi@chromium.org> Reviewed-on: http://review.coreboot.org/9949 Tested-by: build bot (Jenkins) Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
2015-04-22vboot2: CFLAGS_* doesn't contain preprocessor flags anymorePatrick Georgi
The preprocessor flags that are manipulated in that line are managed exclusively in CPPFLAGS since commit 58f73a69. Change-Id: I2263401a292b4f7435659b24cf4f695a927015ef Signed-off-by: Patrick Georgi <pgeorgi@chromium.org> Reviewed-on: http://review.coreboot.org/9948 Tested-by: build bot (Jenkins) Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net> Reviewed-by: Aaron Durbin <adurbin@chromium.org>
2015-04-22qemu-armv7: fix cbfs media implementationAaron Durbin
When using qemu-armv7 to load coreboot.rom with the -kernel flag the rom is offset by 0x10000. Therefore only allow mappings within 0x10000 and 0x10000 + CONFIG_ROM_SIZE. TEST= QEMU_AUDIO_DRV=none qemu-system-arm -M vexpress-a9 \ -m 1024M -nographic \ -kernel coreboot-builds/emulation_qemu-armv7/coreboot.rom Change-Id: Ifec5761a7d54685f664c54efaa31949b8cc94bad Signed-off-by: Aaron Durbin <adurbin@chromium.org> Reviewed-on: http://review.coreboot.org/9935 Tested-by: build bot (Jenkins) Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net> Reviewed-by: Patrick Georgi <pgeorgi@google.com>
2015-04-22coreboot: add a place to choose romstage loaderAaron Durbin
Instead of always loading romstage from cbfs provide a way, similar to ramstage and payload, for other program loaders to intervene. For now, only the cbfs loader is consulted. TEST=Booted to end of ramstage on qemu-armv7 Change-Id: I87c3e2e566d7a0723e775aa427de58af745ecdd5 Signed-off-by: Aaron Durbin <adurbin@chromium.org> Reviewed-on: http://review.coreboot.org/9934 Tested-by: build bot (Jenkins) Reviewed-by: Edward O'Callaghan <edward.ocallaghan@koparo.com> Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
2015-04-22kontron/986lcd-m: update vendor URLPatrick Georgi
Change-Id: Ia43291d0d41e565f2442b625387f3ffde9a98d32 Signed-off-by: Patrick Georgi <pgeorgi@google.com> Reviewed-on: http://review.coreboot.org/9947 Tested-by: build bot (Jenkins) Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
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