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2007-10-30move target directory to have the same name as the directory in theStefan Reinauer
mainboard/ path. Also add a Config.lb for abuild. It's required for the three images variant as abuild doesnt detect this automatically. Trivial patch - it does not even fix the build yet. Patches welcome. Signed-off-by: Stefan Reinauer <stepan@coresystems.de> Acked-by: Stefan Reinauer <stepan@coresystems.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2906 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2007-10-30fix the readwrite/readonly clashes for the pci_driver structs in the sisStefan Reinauer
code. This is trivial, I did it for the other components before. Signed-off-by: Stefan Reinauer <stepan@coresystems.de> Acked-by: Stefan Reinauer <stepan@coresystems.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2905 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2007-10-30K8 resource dump utility from Rudolf MarekRudolf Marek
Signed-off-by: Rudolf Marek <r.marek@assembler.cz> Acked-by: Stefan Reinauer <stepan@coresystems.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2904 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2007-10-30Add support for Intel 440MX systems.Uwe Hermann
Add support for the Fujitsu MBM29F400TC flash part. Detection and reading works, writing is not tested. Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de> Acked-by: Peter Stuge <peter@stuge.se> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2903 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2007-10-29Thanks to the great efforts of Morgan Tsai of SiS we support the SiS966Morgan Tsai
southbridge now: From: Morgan Tsai <my_tsai@sis.com> It supports SiS761GX / SiS966 chipset, only for AMD K8 platform so far. Due to integrated VGA sharing system memory, some code in southbridge folder have to init northbridge. Copyright (C) 2007 Morgan Tsai <my_tsai@sis.com> Copyright (C) 2007 Silicon Integrated Systems Corp. (SiS) Change Log: Newly support GIGABYTE GA-2761GXDK CPU type: AMD AM2 socket Northbridge: SiS 761GX Southbridge: SiS 966 SuperIO: ITE8716F Signed-off-by: Morgan Tsai <my_tsai@sis.com> Acked-by: Stefan Reinauer <stepan@coresystems.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2902 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2007-10-27Move ARRAY_SIZE to stdlib.h to make it available to all code (trivial).Uwe Hermann
Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de> Acked-by: Uwe Hermann <uwe@hermann-uwe.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2901 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2007-10-27Drop duplicated and unneeded #defines from some northbridges (trivial).Uwe Hermann
This is generic PCI stuff, not nothbridge-specific in any way. The respective #defines are already present in src/include/device/pci_def.h. Abuild-tested, so shouldn't break anything. Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de> Acked-by: Uwe Hermann <uwe@hermann-uwe.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2900 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2007-10-26This code gets us to a working linux boot on the alix1c. I have not tested Ronald G. Minnich
Ethernet yet. The fixes are a board-specific fake spd_read_byte, cleaning up comments, and just in general customizing for the 1c. The lxraminit change fixes a bug (&& used instead of ||), adds some debug prints which were VERY useful debugging the alix1c, changes fatal error messages from print_debug to print_emerg, and adds two functions: banner, which just prints out a string with a banner, and hcf, which print an emergency message and then pushes null bytes into the uart forever, just to make sure that no bytes get lost for any reason. Signed-off-by: Ronald G. Minnich <rminnich@gmail.com> Acked-by: Peter Stuge <peter@stuge.se> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2899 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2007-10-26Add support for the AXUS TC320 thin client.Juergen Beisert
This board uses nearly the same devices as the BCOM Winnet100, so most of the new code here is from the BCOM Winnet100. They differ in the IRQ routing table only. BTW: The AXUS board uses standard DIMM memory and can be run at 100MHz SDRAM clock speed (it runs reliably here since month). Signed-off-by: Juergen Beisert <juergen@kreuzholzen.de> Acked-by: Uwe Hermann <uwe@hermann-uwe.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2898 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2007-10-25Added Am29LV040BPeter Lemenkov
Looking through the sources of Uniflash utility I found that this chip is no more no less than low-voltage variant of Am29F040B but with different ID. So I created a very quick patch (attached). Signed-off-by: Peter Lemenkov <lemenkov@gmail.com> Acked-by: Peter Stuge <peter@stuge.se> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2897 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2007-10-24Some fixes for the BCOM WinNET100, mostly in Config.lb:Uwe Hermann
- Add missing entry for the NIC: device pci 0f.0 on end # Ethernet (onboard) - Drop the following lines: register "com1" = "{115200}" register "com2" = "{38400}" Those entries hardcode the BAUD rate (as far as I can tell, please correct me if I'm wrong). We don't want that -- instead the config option TTYS0_BAUD in Options.lb should be used(?) I verified that dropping those lines will not break serial output (COM1, 115200, 8n1). - Enable IDE (PCI device 00:12.2) and add the following register lines to tell the CS5530 code to actually enable IDE channel 0: register "ide0_enable" = "1" register "ide1_enable" = "0" # Not available/needed on this board Tested with a 2.5" hard drive and FILO, works fine. - Enable USB (PCI device 00:13.0), not sure why it was commented. - Enable COM2 as it's used by the smartcard reader. - Add CONFIG_COMPRESSED_PAYLOAD_LZMA to Options.lb, in order to fix abuild for this board. - Add some more comments. Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de> Acked-by: Stefan Reinauer <stepan@coresystems.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2896 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2007-10-24Another CONSTification... Stefan Reinauer
(trivial) Signed-off-by: Stefan Reinauer <stepan@coresystems.de> Acked-by: Stefan Reinauer <stepan@coresystems.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2895 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2007-10-24This change removes all warnings from romcc in my build environment,Stefan Reinauer
making the output of "make -s" finally usable.. (still trivial, doesn't change any logic or remove any code) Signed-off-by: Stefan Reinauer <stepan@coresystems.de> Acked-by: Stefan Reinauer <stepan@coresystems.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2894 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2007-10-24smaller changes to silence build warnings. (trivial)Stefan Reinauer
Signed-off-by: Stefan Reinauer <stepan@coresystems.de> Acked-by: Stefan Reinauer <stepan@coresystems.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2893 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2007-10-24analog changes for the cpu_driver structures...Stefan Reinauer
make them const before putting them into the read-only segment... (trivial) Signed-off-by: Stefan Reinauer <stepan@coresystems.de> Acked-by: Stefan Reinauer <stepan@coresystems.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2892 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2007-10-24Ever wondered where those "setting incorrect section attributes forStefan Reinauer
rodata.pci_driver" warnings are coming from? We were packing those structures into a read-only segment, but forgot to mark them const. Despite its size, this is a fairly trivial patch created by a simple search/replace Signed-off-by: Stefan Reinauer <stepan@coresystems.de> Acked-by: Stefan Reinauer <stepan@coresystems.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2891 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2007-10-23fix a whole bunch of warnings. (trivial)Stefan Reinauer
Signed-off-by: Stefan Reinauer <stepan@coresystems.de> Acked-by: Stefan Reinauer <stepan@coresystems.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2890 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2007-10-23drop unused variable (and thus warning). trivial patch.Stefan Reinauer
Signed-off-by: Stefan Reinauer <stepan@coresystems.de> Acked-by: Stefan Reinauer <stepan@coresystems.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2889 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2007-10-23Add support for the Intel mFCPGA 478 socket. (trivial)Stefan Reinauer
Signed-off-by: Stefan Reinauer <stepan@coresystems.de> Acked-by: Stefan Reinauer <stepan@coresystems.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2888 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2007-10-23The s2882 ships with a 1MB rom chip. The targets/tyan/s2882/Config.lb fileWard Vandewege
assumes a 1MB rom chip. Hence the default position for the VGA bios should also assume a 1MB rom chip, not a 512KB chip. Signed-off-by: Ward Vandewege <ward@gnu.org> Acked-by: Corey Osgood <corey.osgood@gmail.com> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2887 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2007-10-22Fix typo (trivial)Ward Vandewege
Signed-off-by: Ward Vandewege <ward@gnu.org> Acked-by: Ward Vandewege <ward@gnu.org> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2886 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2007-10-22Add support for a precompressed LZMA payload (trivial).Ward Vandewege
Signed-off-by: Ward Vandewege <ward@gnu.org> Acked-by: Ward Vandewege <ward@gnu.org> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2885 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2007-10-22Flashrom: Add more Vendor IDs and ensure correct sorting in flash.h.Peter Lemenkov
Signed-off-by: Peter Lemenkov <lemenkov@gmail.com> Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2884 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2007-10-22This patch adds support for K8T890CE northbridge.Rudolf Marek
Signed-off-by: Rudolf Marek <r.marek@assembler.cz> Acked-by: Uwe Hermann <uwe@hermann-uwe.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2883 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2007-10-22Trivial: remove unused variable.Ronald G. Minnich
Signed-off-by: Ronald G. Minnich <rminnich@gmail.com> Acked-by: Ronald G. Minnich <rminnich@gmail.com> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2882 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2007-10-22Introduce block and sector erase routines to flashrom, but do not useCarl-Daniel Hailfinger
them yet. Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> Acked-by: Stefan Reinauer <stepan@coresystems.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2881 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2007-10-22This is a hack for easier testing of GRUB2 in LinuxBIOSv2Stefan Reinauer
since it is still our most wide-spread codebase. The patch is pretty trivial, and nobody except Torsten even looked at it in a week, so.... Signed-off-by: Stefan Reinauer <stepan@coresystems.de> Acked-by: Stefan Reinauer <stepan@coresystems.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2880 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2007-10-21Put the print in the right place. This is trivial patch but a veryRonald G. Minnich
serious issue, so I am self-acking. Signed-off-by: Ronald G. Minnich <rminnich@gmail.com> Acked-by: Ronald G. Minnich <rminnich@gmail.com> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2879 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2007-10-21I am signing off and acking this trivial patch, as I just wasted severalRonald G. Minnich
days on a function named pll_reset that, on exit, says "Done cpuRegInit", and which, in turn, made me think it was a lot farther along that it was. Signed-off-by: Ronald G. Minnich <rminnich@gmail.com> Acked-by: Ronald G. Minnich <rminnich@gmail.com> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2878 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2007-10-18Remove hardcoded wait from SPI write/erase routines and check the chipCarl-Daniel Hailfinger
status register instead. This has been tested by Harald Gutmann <harald.gutmann@gmx.net> with a MX25L4005 chip. Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> Acked-by: Stefan Reinauer <stepan@coresystems.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2876 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2007-10-18Documentation fixes and updates (trivial).Uwe Hermann
Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de> Acked-by: Uwe Hermann <uwe@hermann-uwe.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2875 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2007-10-18Add generic SPI flash erase and write support to flashrom. The firstCarl-Daniel Hailfinger
chip the code was tested and verified with is the Macronix MX25L4005, but other chips should work as well. Timeouts are still hardcoded to data sheet maxima, but the status register checking code is already there. Thanks to Harald Gutmann for the initial code on which this is loosely based. Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> Acked-by: Stefan Reinauer <stepan@coresystems.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2874 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2007-10-17Some cosmetic cleanups in the flashrom code and output.Uwe Hermann
Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de> Acked-by: Stefan Reinauer <stepan@coresystems.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2873 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2007-10-17Drop support for the --human-readable option. It's not any more useful thanUwe Hermann
the --dump option, it just means lots of additional work for no gain, IMO. Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de> Acked-by: Stefan Reinauer <stepan@coresystems.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2872 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2007-10-17Print the version number always, not only in verbose mode.Uwe Hermann
We often want to know the exact version number of superiotool which was used to gather a certain output/dump. Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de> Acked-by: Stefan Reinauer <stepan@coresystems.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2871 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2007-10-17Add dump support for the Winbond W83697SF.Idwer Vollering
Signed-off-by: Idwer Vollering <idwer_v@hotmail.com> Acked-by: Uwe Hermann <uwe@hermann-uwe.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2870 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2007-10-17Add a debug message to keyboard init. This helped isolate at least oneCarl-Daniel Hailfinger
case of keyboard failure (the keyboard initialization was never hit). Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> Acked-by: Stefan Reinauer <stepan@coresystems.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2869 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2007-10-17Fix wrong values/typos in chipset_enable.c. This has been confirmed byCarl-Daniel Hailfinger
Ed Swierk in http://www.mail-archive.com/linuxbios@linuxbios.org/msg09788.html . Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> Acked-by: Stefan Reinauer <stepan@coresystems.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2868 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2007-10-17Fix up totally broken Super I/O setup on the MSI MS-7260 (K9N Neo).Uwe Hermann
This has not been working at all until now. With this fix, keyboard, mouse, parallel port, and the Super I/O sensors work fine (tested on actual hardware). Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de> Acked-by: Uwe Hermann <uwe@hermann-uwe.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2867 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2007-10-16Multiple flashrom fixes:Uwe Hermann
- Install binary in /usr/sbin (not /usr/bin), as it's a root-only tool. - Rename manpage from flashrom.1 to flashrom.8, as section 8 contains "System administration commands (usually only for root)". - Actually install the manpage upon 'make install'. Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de> Acked-by: Stefan Reinauer <stepan@coresystems.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2866 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2007-10-16Add detection support for the Winbond W83977AF as found in theUwe Hermann
Advantech PCM-5820 board (confirmed by Erwan Velu <erwan@seanodes.com> on IRC). Trivial (and tested) patch. Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de> Acked-by: Uwe Hermann <uwe@hermann-uwe.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2865 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2007-10-16Add Gigabyte M61P-S3 SPI flash support to board_enable.cMichael van der Kolff
Signed-off-by: Michael van der Kolff <mvanderkolff@gmail.com> Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2864 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2007-10-16Convert the existing it8716f_* functions to generic_spi_* functions byCarl-Daniel Hailfinger
applying abstraction and wrapping. Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> Acked-by: Stefan Reinauer <stepan@coresystems.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2863 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2007-10-16Add resource size and resource granularity reporting to device_util.c.Carl-Daniel Hailfinger
Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> Acked-by: Uwe Hermann <uwe@hermann-uwe.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2862 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2007-10-16Fix the detection for the Winbond W83697SF. Unfortunately the revisionUwe Hermann
has a slightly different format than that of the W83697UF/UG so we have to hack around it a bit. This patch has been verified to work on real hardware by Idwer Vollering <idwer_v@hotmail.com> on IRC (thanks!). Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de> Acked-by: Ronald G. Minnich <rminnich@gmail.com> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2861 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2007-10-16Dump support for the Winbond W83977TF.Idwer Vollering
Signed-off-by: Idwer Vollering <idwer_v@hotmail.com> Acked-by: Uwe Hermann <uwe@hermann-uwe.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2860 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2007-10-16Completely rip out / replace the ASUS P2B code (which wasn't really working),Uwe Hermann
replacing it with a minimal, but working, framework which will be expanded. Drop a bunch of useless and duplicated files, add missing license headers. I'm self-acking it this time, the diff is a huge unreadable mess and the old code is broken anyway... This code is tested to build fine, and can boot a Linux kernel up to a login-prompt via FILO (IDE). This is verified on actual hardware. Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de> Acked-by: Uwe Hermann <uwe@hermann-uwe.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2859 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2007-10-15(forgot to add spi.c)Carl-Daniel Hailfinger
Move SPI code out of board_enable.c where it started its life. The SPI chip finding and SPI chip accessor code is moved as well. This can be split later if we feel like it. The non-use of svn cp is intentional because the only history we'd have to preserve are a few commits which were early prototypes of chip identification code. For those who intend to look at that history, they can look at board_enable.c revision 2853. Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> Acked-by: Stefan Reinauer <stepan@coresystems.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2858 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2007-10-15Move SPI code out of board_enable.c where it started its life. The SPICarl-Daniel Hailfinger
chip finding and SPI chip accessor code is moved as well. This can be split later if we feel like it. The non-use of svn cp is intentional because the only history we'd have to preserve are a few commits which were early prototypes of chip identification code. For those who intend to look at that history, they can look at board_enable.c revision 2853. Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> Acked-by: Stefan Reinauer <stepan@coresystems.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2857 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2007-10-15This patch adds support for the Mobile Intel Celeron CPU (Micro-FC-BGA)Joseph Smith
Signed-off-by: Joseph Smith <joe@smittys.pointclark.net> Acked-by: Corey Osgood <corey.osgood@gmail.com> Acked-by: Stefan Reinauer <stepan@coresystems.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2856 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
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