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AgeCommit message (Expand)Author
2008-05-27libpayload: Add PAYLOAD_INFO macroJordan Crouse
2008-05-27not sure why this ever worked. Add --xml / -x to the supported options (trivial)Stefan Reinauer
2008-05-27libpayload: Add a function to verify the checksum on a LAR fileJordan Crouse
2008-05-27sync latest version of abuild (0.6) (trivial patch)Stefan Reinauer
2008-05-27Mark SST49LF004A/B as tested (trivial).Mart Raudsepp
2008-05-26Mark the following chips as tested (trivial).Uwe Hermann
2008-05-22A bunch of cosmetic improvements (trivial).Uwe Hermann
2008-05-22Mark more chips as tested (all operations), tested on ASUS P4B266 (trivial).Uwe Hermann
2008-05-22Add support for the ASUS P4B266 board.Uwe Hermann
2008-05-22Add support for Amic A25L40P SPI flash.Rudolf Marek
2008-05-22Changes to make flashrom compile (and work) on FreeBSD.Andriy Gapon
2008-05-21This is a simple patch which allows payloads to be placed in memory inMyles Watson
2008-05-21Add KEY_ESC (trivial).Uwe Hermann
2008-05-21Myles reported SST49LF080A status -> TESTED_PREWPeter Stuge
2008-05-20coreinfo: Use the ESC key to exit the payloadJordan Crouse
2008-05-20coreinfo: Fix the subwindow refresh based on the libpayload changesJordan Crouse
2008-05-20libpayload: Add an exec() and i386_do_exec() functionJordan Crouse
2008-05-20libpayload: Add larfptr functionJordan Crouse
2008-05-20libpayload: Fix curses subwindowsJordan Crouse
2008-05-20Add post-RAM init code for the Fintek F71805F Super I/O.Corey Osgood
2008-05-19Add support for the VIA EPIA-CN baord, which uses C7 + CN700 + VT8237R.Aaron Lwe
2008-05-17Initial support for the Intel 82845 (Brookdale) and ICH2 (trivial).Uwe Hermann
2008-05-17flashrom: Support Pm49FL004/2 Block Locking RegistersNikolay Petukhov
2008-05-16I looked at the datasheet and erase_sector_39sf020() is totally andCarl-Daniel Hailfinger
2008-05-16Doesn't have to be executable (trivial).Uwe Hermann
2008-05-16Geode platforms that use a LPC Super I/O had the LPC serial IRQ set to allMarc Jones
2008-05-16New Target and initial support for the Thomson IP1000.Joseph Smith
2008-05-16ICH8 and ICH9 have an almost identical SPI interface, only the locationCarl-Daniel Hailfinger
2008-05-16Add support for the Atmel AT25DF321 SPI flash (tested).Dominik Geyer
2008-05-16Add support for SPI chips on ICH9. This is done by using the generic SPIDominik Geyer
2008-05-16Enable IT8716F LPC-to-SPI write cycle translation in flashrom if theCarl-Daniel Hailfinger
2008-05-15Print detailed status register information for SST25VF series flash.Carl-Daniel Hailfinger
2008-05-15This patch allows the RCA RM4100 to reboot. Upon rebooting in auto.c it detec...Joseph Smith
2008-05-15Lots of new SST flash chip IDs. Only a subset has been added toCarl-Daniel Hailfinger
2008-05-15Add support for the JEDEC RES (Read Electronic Signature and Resume fromCarl-Daniel Hailfinger
2008-05-14Some NSC Super I/Os can have their config port at 0x15c (trivial).Uwe Hermann
2008-05-14Cosmetics, whitespace, coding style, partially ident-aided (trivial).Uwe Hermann
2008-05-14libpayload: implement wborder functionJordan Crouse
2008-05-14libpayload: Fix the putc functionJordan Crouse
2008-05-14add ICH7-M and ICH7 DH to inteltool (trivial)Stefan Reinauer
2008-05-14Add more infrastructure for flashrom ICH9 support.Carl-Daniel Hailfinger
2008-05-14fix license mentioning in manpage (trivial)Stefan Reinauer
2008-05-14trivial patch: move maintainable parts to the top and add ICH7-M DH southbridgeStefan Reinauer
2008-05-14trivial patch to fix options. Thanks to Uwe Hermann for the hint!Stefan Reinauer
2008-05-14Add the Intel 6300ESB as known chipset to the chipset struct enables.Claus Gindhart
2008-05-14Fix crash caused by division by zero for unknown flash chips.Carl-Daniel Hailfinger
2008-05-14Check the JEDEC vendor ID for correct parity. Flash chips which can beCarl-Daniel Hailfinger
2008-05-14Example on how to add other chipsets to inteltool. ICH/ICH0, ICH4(-M) and ICH7Stefan Reinauer
2008-05-14Add lots of ATMEL SPI flash chips to flash.h.Carl-Daniel Hailfinger
2008-05-13flashrom: Move all IT87xx specific SPI routines from spi.c to a separateCarl-Daniel Hailfinger
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