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2009-02-18Carl-Daniel's part:Carl-Daniel Hailfinger
This patch converts mainboard_$VENDOR_$BOARD_ops to mainboard_ops and mainboard_$VENDOR_$BOARD_config to mainboard_config. Ron's part: The config change that makes the naming change not break every build. Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> Signed-off-by: Ronald G. Minnich <rminnich@gmail.com> Acked-by: Myles Watson <mylesgw@gmail.com> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3954 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-02-17Add QWord support to acpigen.Carl-Daniel Hailfinger
Add TOM2 to the K8 DSDT. Thanks to Rudolf Marek for testing and fixing this patch. Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> Signed-off-by: Rudolf Marek <r.marek@assembler.cz> Acked-by: Peter Stuge <peter@stuge.se> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3953 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-02-17Bayou: Clean up Bayou's window after returning from a payload.Ulf Jordan
Signed-off-by: Ulf Jordan <jordan@chalmers.se> Acked-by: Jordan Crouse <jordan@cosmicpenguin.net> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3952 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-02-17Unify CAR so the same compiled code does the right thing on bothPatrick Georgi
K8 and Fam10+ CPUs. What this patch does: 1. Enable SSE (to get some more registers to play with) 2. Determine CPUID, and stash it in an XMM register, and reference value for comparison in another XMM register (mangled somewhat to simplify inequality comparisons) 3. Add a macro jmp_if_k8, which jumps if the CPU is K8 (using an SSE compare) 4. Replace #if CAR_FAM10 sections with runtime checks using jmp_if_k8. This is pretty mechanical work. The macro uses local labels (1: and 2:) to prevent namespace issues 5. At one time, CPU_ADDR_BITS is used to fill a register. This is replaced with hardcoded values for both cases, and switched appropriately. 6. Disable SSE Signed-off-by: Patrick Georgi <patrick.georgi@coresystems.de> Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> Acked-by: Stefan Reinauer <stepan@coresystems.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3951 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-02-15This is a safety measure, since the shipping buildrom fails badly at present.Ronald G. Minnich
Signed-off-by: Ronald G. Minnich <rminnich@gmail.com> Acked-by: Peter Stuge <peter@stuge.se> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3950 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-02-15- Fix up amd pistachio and dbm690t.Stefan Reinauer
- make uma_memory_base and uma_memory_size uint64_t as they may be 64bit BARs on some platforms. Signed-off-by: Stefan Reinauer <stepan@coresystems.de> Acked-by: Stefan Reinauer <stepan@coresystems.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3949 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-02-14Change Log:Rudolf Marek
Bellongs to r3947 Following patch adds dynamically generated P-States infrastructure as well as M2V-MX SE as example how to do that. It is based on AMD code and mine code for ACPI generation. Signed-off-by: Rudolf Marek <r.marek@assembler.cz> Acked-by: Peter Stuge <peter@stuge.se> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3948 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-02-14Bellongs to r3946 Rudolf Marek
Following patch adds dynamically generated P-States infrastructure as well as M2V-MX SE as example how to do that. It is based on AMD code and mine code for ACPI generation. Signed-off-by: Rudolf Marek <r.marek@assembler.cz> Acked-by: Peter Stuge <peter@stuge.se> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3947 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-02-14Following patch adds dynamically generated P-States infrastructure as well asRudolf Marek
M2V-MX SE as example how to do that. It is based on AMD code and mine code for ACPI generation. Signed-off-by: Rudolf Marek <r.marek@assembler.cz> Acked-by: Peter Stuge <peter@stuge.se> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3946 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-02-13This target is dead. Ronald G. Minnich
The company is dead. It causes builds to fail, and that is not a problem we need to have. Removing it to remove the problems it causes. Signed-off-by: Ronald G. Minnich <rminnich@gmail.com> Acked-by: Stefan Reinauer <stepan@coresystems.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3945 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-02-13Increase ROM_IMAGE_SIZE for the agami aruma to resolve overlappingCarl-Daniel Hailfinger
sections. Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3944 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-02-12This patch converts __FUNCTION__ to __func__, since __func__ is standard.Myles Watson
Signed-off-by: Myles Watson <mylesgw@gmail.com> Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3943 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-02-12Fix mtrr setup for UMA architectures.Stefan Reinauer
If high SMM memory is used (and needs to be uncached for whatever reason; it shouldn't in my opinion), we should do it the same way. Signed-off-by: Stefan Reinauer <stepan@coresystems.de> Acked-by: Peter Stuge <peter@stuge.se> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3942 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-02-12Fix typo in PCI ID (1914 should have been 7914).Carl-Daniel Hailfinger
Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3941 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-02-12Remove dead lines. Trivial.Carl-Daniel Hailfinger
Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3940 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-02-12Rename TOM to TOM1 and refer to the SSDT value with an External(TOM1)Carl-Daniel Hailfinger
clause. An ITE87427 Super I/O does not exist. Use the real name (IT8712F) of the chip on the DBM690T board. Use decimal values for KELV, THOT and TCRT on the Pistachio board for better readability. Tested by Maggie Li on DBM690T and Pistachio. Tested by Carl-Daniel Hailfinger on Asus M2A-VM. Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3939 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-02-12Improve mainboard.c comments for DBM690T and Pistachio.Carl-Daniel Hailfinger
Fix reference to documentation. Use __FUNCTION__ instead of hardcoding function names in printk messages. No functional changes. I'm slowly getting to the point where adding another RS690 board is really easy and needs almost no changes to the existing target. Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> Acked-by: Myles Watson <mylesgw@gmail.com> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3938 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-02-11Print a loud warning message if we run out of MTRRs.Carl-Daniel Hailfinger
Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> Acked-by: Myles Watson <mylesgw@gmail.com> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3937 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-02-11Fix one leftover reference to AmlCode_ssdt which was forgotten in r3929.Carl-Daniel Hailfinger
Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3936 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-02-10Fix bayou payload execution.Ulf Jordan
Bayou must link with its own ldscript to end up at a load address that doesn't interfere with payloads. Make Bayou's ldscript MB compatible, so the link with libpayload/lib/i386/head.o succeeds. Signed-off-by: Ulf Jordan <jordan@chalmers.se> Acked-by: Jordan Crouse <jordan@cosmicpenguin.net> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3935 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-02-10Fix bayou payload execution.Ulf Jordan
Bayou must link with its own ldscript to end up at a load address that doesn't interfere with payloads. Make Bayou's ldscript MB compatible, so the link with libpayload/lib/i386/head.o succeeds. Signed-off-by: Ulf Jordan <jordan@chalmers.se> Acked-by: Jordan Crouse <jordan@cosmicpenguin.net> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3934 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-02-10Change 0x%p to %p. Thanks Stefan for catching the one I introduced in 3931.Myles Watson
Signed-off-by: Myles Watson <mylesgw@gmail.com> Acked-by: Myles Watson <mylesgw@gmail.com> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3933 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-02-09flashrom: Fix broken flash chip base address logicPeter Stuge
Elan SC520 requries us to deal with flash chip base addresses at locations other than top of 4GB. The logic for that was incorrectly triggered also when a board had more than one flash chip. This patch will honor flashbase only when probing for the first flash chip on the board, and look at top of 4GB for later chips. Signed-off-by: Peter Stuge <peter@stuge.se> Acked-by: Myles Watson <mylesgw@gmail.com> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3932 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-02-09Remove some warnings, mainly from format strings which didn't match theMyles Watson
arguments. Signed-off-by: Myles Watson <mylesgw@gmail.com> Acked-by: Peter Stuge <peter@stuge.se> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3931 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-02-05Use the correct device for switching on HDA.Dan Lykowski
Reorder HDA (HD Audio) init: The reordering was based on what order things happen in the BIOS Developers guide, RPR, and SATA driver. I fixed the order of the devices that didn't matter to clean up the change log. 1. Enable the Chip 2. Setup the SMBus registers 3. Setup the Device Registers 4. Look for Codec 5. Init Codec The codec init was changed to match the description in the RRG pg 235. Mem Reg: Base + 08h Bit 0. There were unneeded things happening. Added 1ms delay to match the BKDG while waiting for BAR+0xe to set its bits. Signed-off-by: Dan Lykowski <lykowdk@gmail.com> Tested on AMD DBM690T and AMD Pistachio by Maggie Li. Works. Tested on Asus M2A-VM by Carl-Daniel Hailfinger. Improves the situation, but some warnings remain. Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3930 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-02-03Following patch converts the run-time SSDT patching via update_ssdt funtion toRudolf Marek
new AML code generator. Compile-tested on all changed targets. I think it should work because it works for Asus M2V-MX SE. Signed-off-by: Rudolf Marek <r.marek@assembler.cz> Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3929 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-02-03Following patch adds missing CPU names. Please checkRudolf Marek
http://www.amd.com/us-en/assets/content_type/white_papers_and_tech_docs/33610.pdf if I did not made any mistake. Works for mine CPU ;) Signed-off-by: Rudolf Marek <r.marek@assembler.cz> Acked-by: Stefan Reinauer <stepan@coresystems.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3928 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-02-02flashrom: MSI MS-7046 board enablePeter Stuge
Signed-off-by: Peter Stuge <peter@stuge.se> Acked-by: David Tiemann <davidtiemann@gmail.com> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3927 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-02-01 Following patch fixes VIA SPI (VT8237S). It needs to have opcodesRudolf Marek
initialized same way as ICH7. Signed-off-by: Rudolf Marek <r.marek@assembler.cz> Acked-by: Peter Stuge <peter@stuge.se> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3926 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-02-01Following patch adds dynamic ACPI AML code generator which can be used toRudolf Marek
generate run-time ACPI ASL code. Moreover it demonstrates its use on Asus M2V-MX SE where the SSDT table is generated by new function k8acpi_write_vars (technically similar to update_ssdt). But lot of nicer. x Signed-off-by: Rudolf Marek <r.marek@assembler.cz> Acked-by: Peter Stuge <peter@stuge.se> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3925 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-01-30Bring AMD K8 ACPI mangling more in line with Fam10 ACPI mangling. NoCarl-Daniel Hailfinger
functional changes, only a little bit of (mostly formatting) cleanup to make merging easier. Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3924 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-01-28Factor out read and erase functions from flashrom main().Carl-Daniel Hailfinger
Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> Acked-by: Peter Stuge <peter@stuge.se> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3923 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-01-28Correct FDAT->FADT typo.Carl-Daniel Hailfinger
Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3922 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-01-26msrtool: Allow MSR symbols (names) to also be used as addresses.Peter Stuge
Thanks for the idea Mart! Signed-off-by: Peter Stuge <peter@stuge.se> Acked-by: Peter Stuge <peter@stuge.se> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3921 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-01-26msrtool: Linux /dev/cpu/*/msr returns the low 32 bits before the high 32 bits.Peter Stuge
Thanks to Mart for spotting this! Signed-off-by: Peter Stuge <peter@stuge.se> Acked-by: Peter Stuge <peter@stuge.se> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3920 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-01-26flashrom: Add VT8237A PCI IDPeter Stuge
Signed-off-by: Peter Stuge <peter@stuge.se> Acked-by: Peter Stuge <peter@stuge.se> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3919 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-01-26flashrom: Fix one dead increment and one dead assignment as found by clang.Peter Stuge
Thanks Patrick! Signed-off-by: Peter Stuge <peter@stuge.se> Acked-by: Peter Stuge <peter@stuge.se> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3918 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-01-26flashrom: Driver for ST M29F002T/NT/B. T/NT TEST_OK_ PROBE READ ERASE WRITEPeter Stuge
Test report from Julia. Thanks! Signed-off-by: Peter Stuge <peter@stuge.se> Acked-by: Julia Longtin <juri@solarnetone.org> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3917 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-01-26flashrom: Fix copypaste error in r3913.Peter Stuge
Signed-off-by: Peter Stuge <peter@stuge.se> Acked-by: Peter Stuge <peter@stuge.se> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3916 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-01-26msrtool: AMD CS5536 probe implementation.Peter Stuge
Signed-off-by: Peter Stuge <peter@stuge.se> Acked-by: Peter Stuge <peter@stuge.se> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3915 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-01-26msrtool: Make configure work with zsh, the default shell in Darwin.Peter Stuge
Signed-off-by: Peter Stuge <peter@stuge.se> Acked-by: Peter Stuge <peter@stuge.se> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3914 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-01-26flashrom: SST25VF040B using 0x90 identification and AAI write.Peter Stuge
SST AAI is Auto Address Increment writing, a streamed write to the flash chip where the first write command sets a starting address and following commands simply append data. Unfortunately not supported by Winbond SPI masters. From July 2008. Signed-off-by: Peter Stuge <peter@stuge.se> Acked-by: Peter Stuge <peter@stuge.se> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3913 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-01-26flashrom: Decode SST25VF040B status register, also from July 2008.Peter Stuge
Signed-off-by: Peter Stuge <peter@stuge.se> Acked-by: Peter Stuge <peter@stuge.se> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3912 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-01-26flashrom: Intel Desktop Board D201GLYPeter Stuge
Signed-off-by: Peter Stuge <peter@stuge.se> Acked-by: Peter Stuge <peter@stuge.se> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3911 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-01-26flashrom: Winbond SuperIO SPI driver.Peter Stuge
Developed and tested to work on Intel D201GLY in July 2008. Tested by a helpful person on IRC whose name I've since forgotten. Sorry! Signed-off-by: Peter Stuge <peter@stuge.se> Acked-by: Ward Vandewege <ward@gnu.org> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3910 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-01-26flashrom: Export Winbond SuperIO register access functions in board_enable.c.Peter Stuge
Signed-off-by: Peter Stuge <peter@stuge.se> Acked-by: Peter Stuge <peter@stuge.se> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3909 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-01-26flashrom: Document exit() codes introduced in r3907.Peter Stuge
Signed-off-by: Peter Stuge <peter@stuge.se> Acked-by: Ward Vandewege <ward@gnu.org> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3908 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-01-26flashrom: exit(2) on /dev/mem open() failure and exit(3) on mmap() failure.Peter Stuge
Signed-off-by: Peter Stuge <peter@stuge.se> Acked-by: Ward Vandewege <ward@gnu.org> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3907 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-01-26flashrom: Add license header to physmap.c so everyone is happy. :)Peter Stuge
Signed-off-by: Peter Stuge <peter@stuge.se> Acked-by: Peter Stuge <peter@stuge.se> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3906 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-01-26flashrom: Darwin / Mac OS XStefan Reinauer
Through DirectIO from coresystems GmbH we now support Darwin/Mac OS X. DirectIO is available at http://www.coresystems.de/en/directio Signed-off-by: Stefan Reinauer <stepan@coresystems.de> Signed-off-by: Peter Stuge <peter@stuge.se> Acked-by: Peter Stuge <peter@stuge.se> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3905 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
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