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AgeCommit message (Expand)Author
2011-02-27Prepare for next patches (Improving BKDG implementation of P-states,Xavi Drudis Ferran
2011-02-27Prepare for next patches (Improving BKDG implementation of P-states,Xavi Drudis Ferran
2011-02-27Prepare for next patches (Improving BKDG implementation of P-states,Xavi Drudis Ferran
2011-02-27Prepare for next patches (Improving BKDG implementation of P-states,Xavi Drudis Ferran
2011-02-27Prepare for next patches (Improving BKDG implementation of P-states,Xavi Drudis Ferran
2011-02-27Add 300 MHz and 500 MHz HT frequency limitsXavi Drudis Ferran
2011-02-26Make AMD Fam10h CPU microcode updates optional in Expert modeXavi Drudis Ferran
2011-02-26Following patch fills in the callbacks for PCIe x16 resets. This board uses G...Rudolf Marek
2011-02-26Correct error in ASRock E350M1 commit that breaks build for ASRock 939a785gmh.Scott Duplichan
2011-02-26Add support for the ASRock E350M1, an AMD family 14h Fusion board.Scott Duplichan
2011-02-26It adds support for automatic PSS object generation for AMD pre fam Fh CPU. T...Rudolf Marek
2011-02-24Add compile-time defaults to some K8 CMOS options in case they're absent in CMOSJosef Kellermann
2011-02-24Add new option 'sata_mode' to CMOS and 'SATA_MODE' to Kconfig for AMD SB600Josef Kellermann
2011-02-24Tyan/s2735 doesn't need to define its own hard_reset function anymore.Patrick Georgi
2011-02-24libpayload: Move stdin/stdout/stderr away from headersPatrick Georgi
2011-02-24git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6376 2b7e53f0-3cfb-0310-b3e...Scott Duplichan
2011-02-22Move coreboot specific rules and setup to toplevel Makefile.incPatrick Georgi
2011-02-21[i945] Add SPD adress mappingSven Schnelle
2011-02-19It turns out that the code which enables specific LDN is somewhat buggy.Rudolf Marek
2011-02-17Handle compiler options for source classes more genericallyPatrick Georgi
2011-02-17Make Makefile.inc parser loop more genericPatrick Georgi
2011-02-17add mec1308 support to superiotoolDavid Hendricks
2011-02-16Fix build errors introduced in r6367Alexandru Gagniuc
2011-02-16Add ACPI code for Lenvo X60Sven Schnelle
2011-02-16Extended K8T890 driver to include the K8T800 and K8M800 northbridgesAlexandru Gagniuc
2011-02-16Lenovo ThinkPad X60: Enable SMI handlerSven Schnelle
2011-02-15Remove more files and lines mistakenly copied from Roda to X60Peter Stuge
2011-02-15Remove ACPI mistakenly copied from Roda to ThinkPad X60Peter Stuge
2011-02-15Remove Inagua Kconfig items for external VGA and AHCI binaries. These can be ...Marc Jones
2011-02-15SERIAL_POST was renamed to CONSOLE_POST a while agoStefan Reinauer
2011-02-15use git.seabios.org for checking out seabios. Stefan Reinauer
2011-02-14Lenovo ThinkPad X60 / X60s SupportSven Schnelle
2011-02-14Use fprintf(stderr, ...) in libraryPatrick Georgi
2011-02-14Stub out FILE*, stdout/stdin/stderr and implement fprintf on thesePatrick Georgi
2011-02-14lpgcc was too noisy in some casesPatrick Georgi
2011-02-14Some more POSIX compatibilityPatrick Georgi
2011-02-14Errata #169 works on HT, not MCJosef Kellermann
2011-02-14Removed LPC DMA Deadlock workaround...Josef Kellermann
2011-02-14Fix Typo. (and why is that file, and some of its siblings per-board?)Patrick Georgi
2011-02-14Add IBASE DB-FT1 and AMD Inagua motherboards. Patch 8 of 8.Frank Vibrans
2011-02-14This code provides support for the superio chip on the AMD Inagua platform (n...Frank Vibrans
2011-02-14I missed a file that was part of the AMD AGESA CPU wrapper checkin, r6347.Frank Vibrans
2011-02-14 This code provides support for the superio chip on the IBASE Technology DB-F...Frank Vibrans
2011-02-14This code fixes a number of build issues related to the AMD Agesa code. The p...Frank Vibrans
2011-02-14Add AMD cpu wrapper code. Patch 4 of 8.Frank Vibrans
2011-02-14 This code provides southbridge initialization for SB800 south bridges. It is...Frank Vibrans
2011-02-14This code provides cpu northbridge initialization for Family 14h cpus. It is ...Frank Vibrans
2011-02-14Add AMD Agesa and AMD CIMx SB800 code. Patch 1 of 8.Frank Vibrans
2011-02-12Attached patch fixes the LPC decode ranges of SB600/SB800. We enable early on...Rudolf Marek
2011-02-10According to AMD documentation, cache type WP should be used forScott Duplichan