Age | Commit message (Expand) | Author |
2011-02-27 | Prepare for next patches (Improving BKDG implementation of P-states, | Xavi Drudis Ferran |
2011-02-27 | Prepare for next patches (Improving BKDG implementation of P-states, | Xavi Drudis Ferran |
2011-02-27 | Prepare for next patches (Improving BKDG implementation of P-states, | Xavi Drudis Ferran |
2011-02-27 | Prepare for next patches (Improving BKDG implementation of P-states, | Xavi Drudis Ferran |
2011-02-27 | Prepare for next patches (Improving BKDG implementation of P-states, | Xavi Drudis Ferran |
2011-02-27 | Add 300 MHz and 500 MHz HT frequency limits | Xavi Drudis Ferran |
2011-02-26 | Make AMD Fam10h CPU microcode updates optional in Expert mode | Xavi Drudis Ferran |
2011-02-26 | Following patch fills in the callbacks for PCIe x16 resets. This board uses G... | Rudolf Marek |
2011-02-26 | Correct error in ASRock E350M1 commit that breaks build for ASRock 939a785gmh. | Scott Duplichan |
2011-02-26 | Add support for the ASRock E350M1, an AMD family 14h Fusion board. | Scott Duplichan |
2011-02-26 | It adds support for automatic PSS object generation for AMD pre fam Fh CPU. T... | Rudolf Marek |
2011-02-24 | Add compile-time defaults to some K8 CMOS options in case they're absent in CMOS | Josef Kellermann |
2011-02-24 | Add new option 'sata_mode' to CMOS and 'SATA_MODE' to Kconfig for AMD SB600 | Josef Kellermann |
2011-02-24 | Tyan/s2735 doesn't need to define its own hard_reset function anymore. | Patrick Georgi |
2011-02-24 | libpayload: Move stdin/stdout/stderr away from headers | Patrick Georgi |
2011-02-24 | git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6376 2b7e53f0-3cfb-0310-b3e... | Scott Duplichan |
2011-02-22 | Move coreboot specific rules and setup to toplevel Makefile.inc | Patrick Georgi |
2011-02-21 | [i945] Add SPD adress mapping | Sven Schnelle |
2011-02-19 | It turns out that the code which enables specific LDN is somewhat buggy. | Rudolf Marek |
2011-02-17 | Handle compiler options for source classes more generically | Patrick Georgi |
2011-02-17 | Make Makefile.inc parser loop more generic | Patrick Georgi |
2011-02-17 | add mec1308 support to superiotool | David Hendricks |
2011-02-16 | Fix build errors introduced in r6367 | Alexandru Gagniuc |
2011-02-16 | Add ACPI code for Lenvo X60 | Sven Schnelle |
2011-02-16 | Extended K8T890 driver to include the K8T800 and K8M800 northbridges | Alexandru Gagniuc |
2011-02-16 | Lenovo ThinkPad X60: Enable SMI handler | Sven Schnelle |
2011-02-15 | Remove more files and lines mistakenly copied from Roda to X60 | Peter Stuge |
2011-02-15 | Remove ACPI mistakenly copied from Roda to ThinkPad X60 | Peter Stuge |
2011-02-15 | Remove Inagua Kconfig items for external VGA and AHCI binaries. These can be ... | Marc Jones |
2011-02-15 | SERIAL_POST was renamed to CONSOLE_POST a while ago | Stefan Reinauer |
2011-02-15 | use git.seabios.org for checking out seabios. | Stefan Reinauer |
2011-02-14 | Lenovo ThinkPad X60 / X60s Support | Sven Schnelle |
2011-02-14 | Use fprintf(stderr, ...) in library | Patrick Georgi |
2011-02-14 | Stub out FILE*, stdout/stdin/stderr and implement fprintf on these | Patrick Georgi |
2011-02-14 | lpgcc was too noisy in some cases | Patrick Georgi |
2011-02-14 | Some more POSIX compatibility | Patrick Georgi |
2011-02-14 | Errata #169 works on HT, not MC | Josef Kellermann |
2011-02-14 | Removed LPC DMA Deadlock workaround... | Josef Kellermann |
2011-02-14 | Fix Typo. (and why is that file, and some of its siblings per-board?) | Patrick Georgi |
2011-02-14 | Add IBASE DB-FT1 and AMD Inagua motherboards. Patch 8 of 8. | Frank Vibrans |
2011-02-14 | This code provides support for the superio chip on the AMD Inagua platform (n... | Frank Vibrans |
2011-02-14 | I missed a file that was part of the AMD AGESA CPU wrapper checkin, r6347. | Frank Vibrans |
2011-02-14 | This code provides support for the superio chip on the IBASE Technology DB-F... | Frank Vibrans |
2011-02-14 | This code fixes a number of build issues related to the AMD Agesa code. The p... | Frank Vibrans |
2011-02-14 | Add AMD cpu wrapper code. Patch 4 of 8. | Frank Vibrans |
2011-02-14 | This code provides southbridge initialization for SB800 south bridges. It is... | Frank Vibrans |
2011-02-14 | This code provides cpu northbridge initialization for Family 14h cpus. It is ... | Frank Vibrans |
2011-02-14 | Add AMD Agesa and AMD CIMx SB800 code. Patch 1 of 8. | Frank Vibrans |
2011-02-12 | Attached patch fixes the LPC decode ranges of SB600/SB800. We enable early on... | Rudolf Marek |
2011-02-10 | According to AMD documentation, cache type WP should be used for | Scott Duplichan |