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AgeCommit message (Expand)Author
2011-05-151) Initialize BSP fixed MTRRs to match AP fixed MTRR initialization.Scott Duplichan
2011-05-13siemens/sitemp_g1p1: Adapt read_option() to latest changesJosef Kellermann
2011-05-12Remove uart_init() in Siemens sitemp-g1p1Patrick Georgi
2011-05-11Add Siemens SITEMP-G1 boardJosef Kellermann
2011-05-11Work around unclean CMOS handling for nowPatrick Georgi
2011-05-10Change read_option() to a macro that wraps some API uglynessPatrick Georgi
2011-05-10This replaces the fixed shift values in the apic timer init with macros.Vikram Narayanan
2011-05-10Fix compilation error due to non-unix style line endings in cmos.layout file ...Patrick Georgi
2011-05-09Adds RS740 HT and internal graphics PCI ids.Ivaylo Valkov
2011-05-07ADVANSUS A785E-I Mainboard support, Family10h ASB2, RS880(RS785E) + SB820 pla...Kerry She
2011-05-07RS780 DDI Lanes configure support,Kerry She
2011-05-07SB800 CIMX code can share the AGESA V5 lib code,Kerry She
2011-05-071. move _mm_clflush_fs() to __SSE3__ block, because __builtin_ia32_sfence() i...Kerry She
2011-05-07put the amdlib and agesa constant to .rodata segment.Kerry She
2011-05-05Adds VOID to empty parameter lists to get rid of some build warnings.Frank Vibrans
2011-05-05Remove AMD Agesa requirement for standard include filesFrank Vibrans
2011-05-03Enable caching for ROM area in model_6ex/cache_as_ram.incSven Schnelle
2011-05-03i82801gx: enable SPI prefetchingSven Schnelle
2011-05-02Add option 'compress ramstage'Sven Schnelle
2011-04-30Sorry, my mistake.Scott Duplichan
2011-04-30git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6550 2b7e53f0-3cfb-0310-b3e...Scott Duplichan
2011-04-28Thinkpad: Enable Battery eventsSven Schnelle
2011-04-27X60: enable Ultrabay if device is plugged inSven Schnelle
2011-04-27T60: enable Ultrabay if device is plugged inSven Schnelle
2011-04-27Lenovo PMH7: add pmh7_ultrabay_power_enable()Sven Schnelle
2011-04-27Lenovo H8: add h8_ultrabay_device_present()Sven Schnelle
2011-04-26Add support for memory mapped UARTs to coreboot and add the OXPCIe952 as anStefan Reinauer
2011-04-22Add (partly) support for Nuvoton NCT6776FStefan Reinauer
2011-04-22cosmetic changes to superiotool's nuvoton codeStefan Reinauer
2011-04-22Fix of fix copy and paste errors in ne2k.c (r6512 by stepan)Rudolf Marek
2011-04-22fix typo ttys0_index -> b_indexStefan Reinauer
2011-04-22Get rid of all but one (I/O mapped) UART init functions.Stefan Reinauer
2011-04-22The UART divider should be calculated based on the base frequencyStefan Reinauer
2011-04-21more ifdef -> if fixes.Stefan Reinauer
2011-04-21more ifdef -> if fixesStefan Reinauer
2011-04-21some ifdef --> if fixesStefan Reinauer
2011-04-20drop dead code from sb800 bootblockStefan Reinauer
2011-04-20drop excessive newline in uart8250.cStefan Reinauer
2011-04-20Simplify coreboot's console/console.hStefan Reinauer
2011-04-20run uart_init() from console_init, just like the other console initialization...Stefan Reinauer
2011-04-20Add Lenovo ThinkPad T60Sven Schnelle
2011-04-20PC87384: remove unused init functionSven Schnelle
2011-04-20pci1x2x: remove latency/bridge control/cacheline size settingsSven Schnelle
2011-04-20pci1x2x: use cardbus_read_resources()/cardbus_enable_resources()Sven Schnelle
2011-04-20pci1x2x: use pci_ops set_subsystem instead of custom codeSven Schnelle
2011-04-20pci1x2x: add PCI1510 device IDsSven Schnelle
2011-04-20pci1x2x: use devicetree register configurationSven Schnelle
2011-04-20drop dead uart init code.Stefan Reinauer
2011-04-20fix boards that still had some uart init remaindersStefan Reinauer
2011-04-19Drop baud rate init to an arbitrary baud rate from Super I/O code. ...Stefan Reinauer
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