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2007-10-24This change removes all warnings from romcc in my build environment,Stefan Reinauer
making the output of "make -s" finally usable.. (still trivial, doesn't change any logic or remove any code) Signed-off-by: Stefan Reinauer <stepan@coresystems.de> Acked-by: Stefan Reinauer <stepan@coresystems.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2894 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2007-10-24smaller changes to silence build warnings. (trivial)Stefan Reinauer
Signed-off-by: Stefan Reinauer <stepan@coresystems.de> Acked-by: Stefan Reinauer <stepan@coresystems.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2893 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2007-10-24analog changes for the cpu_driver structures...Stefan Reinauer
make them const before putting them into the read-only segment... (trivial) Signed-off-by: Stefan Reinauer <stepan@coresystems.de> Acked-by: Stefan Reinauer <stepan@coresystems.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2892 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2007-10-24Ever wondered where those "setting incorrect section attributes forStefan Reinauer
rodata.pci_driver" warnings are coming from? We were packing those structures into a read-only segment, but forgot to mark them const. Despite its size, this is a fairly trivial patch created by a simple search/replace Signed-off-by: Stefan Reinauer <stepan@coresystems.de> Acked-by: Stefan Reinauer <stepan@coresystems.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2891 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2007-10-23fix a whole bunch of warnings. (trivial)Stefan Reinauer
Signed-off-by: Stefan Reinauer <stepan@coresystems.de> Acked-by: Stefan Reinauer <stepan@coresystems.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2890 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2007-10-23drop unused variable (and thus warning). trivial patch.Stefan Reinauer
Signed-off-by: Stefan Reinauer <stepan@coresystems.de> Acked-by: Stefan Reinauer <stepan@coresystems.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2889 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2007-10-23Add support for the Intel mFCPGA 478 socket. (trivial)Stefan Reinauer
Signed-off-by: Stefan Reinauer <stepan@coresystems.de> Acked-by: Stefan Reinauer <stepan@coresystems.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2888 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2007-10-23The s2882 ships with a 1MB rom chip. The targets/tyan/s2882/Config.lb fileWard Vandewege
assumes a 1MB rom chip. Hence the default position for the VGA bios should also assume a 1MB rom chip, not a 512KB chip. Signed-off-by: Ward Vandewege <ward@gnu.org> Acked-by: Corey Osgood <corey.osgood@gmail.com> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2887 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2007-10-22Fix typo (trivial)Ward Vandewege
Signed-off-by: Ward Vandewege <ward@gnu.org> Acked-by: Ward Vandewege <ward@gnu.org> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2886 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2007-10-22Add support for a precompressed LZMA payload (trivial).Ward Vandewege
Signed-off-by: Ward Vandewege <ward@gnu.org> Acked-by: Ward Vandewege <ward@gnu.org> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2885 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2007-10-22Flashrom: Add more Vendor IDs and ensure correct sorting in flash.h.Peter Lemenkov
Signed-off-by: Peter Lemenkov <lemenkov@gmail.com> Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2884 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2007-10-22This patch adds support for K8T890CE northbridge.Rudolf Marek
Signed-off-by: Rudolf Marek <r.marek@assembler.cz> Acked-by: Uwe Hermann <uwe@hermann-uwe.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2883 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2007-10-22Trivial: remove unused variable.Ronald G. Minnich
Signed-off-by: Ronald G. Minnich <rminnich@gmail.com> Acked-by: Ronald G. Minnich <rminnich@gmail.com> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2882 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2007-10-22Introduce block and sector erase routines to flashrom, but do not useCarl-Daniel Hailfinger
them yet. Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> Acked-by: Stefan Reinauer <stepan@coresystems.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2881 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2007-10-22This is a hack for easier testing of GRUB2 in LinuxBIOSv2Stefan Reinauer
since it is still our most wide-spread codebase. The patch is pretty trivial, and nobody except Torsten even looked at it in a week, so.... Signed-off-by: Stefan Reinauer <stepan@coresystems.de> Acked-by: Stefan Reinauer <stepan@coresystems.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2880 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2007-10-21Put the print in the right place. This is trivial patch but a veryRonald G. Minnich
serious issue, so I am self-acking. Signed-off-by: Ronald G. Minnich <rminnich@gmail.com> Acked-by: Ronald G. Minnich <rminnich@gmail.com> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2879 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2007-10-21I am signing off and acking this trivial patch, as I just wasted severalRonald G. Minnich
days on a function named pll_reset that, on exit, says "Done cpuRegInit", and which, in turn, made me think it was a lot farther along that it was. Signed-off-by: Ronald G. Minnich <rminnich@gmail.com> Acked-by: Ronald G. Minnich <rminnich@gmail.com> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2878 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2007-10-18Remove hardcoded wait from SPI write/erase routines and check the chipCarl-Daniel Hailfinger
status register instead. This has been tested by Harald Gutmann <harald.gutmann@gmx.net> with a MX25L4005 chip. Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> Acked-by: Stefan Reinauer <stepan@coresystems.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2876 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2007-10-18Documentation fixes and updates (trivial).Uwe Hermann
Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de> Acked-by: Uwe Hermann <uwe@hermann-uwe.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2875 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2007-10-18Add generic SPI flash erase and write support to flashrom. The firstCarl-Daniel Hailfinger
chip the code was tested and verified with is the Macronix MX25L4005, but other chips should work as well. Timeouts are still hardcoded to data sheet maxima, but the status register checking code is already there. Thanks to Harald Gutmann for the initial code on which this is loosely based. Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> Acked-by: Stefan Reinauer <stepan@coresystems.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2874 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2007-10-17Some cosmetic cleanups in the flashrom code and output.Uwe Hermann
Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de> Acked-by: Stefan Reinauer <stepan@coresystems.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2873 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2007-10-17Drop support for the --human-readable option. It's not any more useful thanUwe Hermann
the --dump option, it just means lots of additional work for no gain, IMO. Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de> Acked-by: Stefan Reinauer <stepan@coresystems.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2872 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2007-10-17Print the version number always, not only in verbose mode.Uwe Hermann
We often want to know the exact version number of superiotool which was used to gather a certain output/dump. Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de> Acked-by: Stefan Reinauer <stepan@coresystems.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2871 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2007-10-17Add dump support for the Winbond W83697SF.Idwer Vollering
Signed-off-by: Idwer Vollering <idwer_v@hotmail.com> Acked-by: Uwe Hermann <uwe@hermann-uwe.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2870 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2007-10-17Add a debug message to keyboard init. This helped isolate at least oneCarl-Daniel Hailfinger
case of keyboard failure (the keyboard initialization was never hit). Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> Acked-by: Stefan Reinauer <stepan@coresystems.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2869 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2007-10-17Fix wrong values/typos in chipset_enable.c. This has been confirmed byCarl-Daniel Hailfinger
Ed Swierk in http://www.mail-archive.com/linuxbios@linuxbios.org/msg09788.html . Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> Acked-by: Stefan Reinauer <stepan@coresystems.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2868 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2007-10-17Fix up totally broken Super I/O setup on the MSI MS-7260 (K9N Neo).Uwe Hermann
This has not been working at all until now. With this fix, keyboard, mouse, parallel port, and the Super I/O sensors work fine (tested on actual hardware). Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de> Acked-by: Uwe Hermann <uwe@hermann-uwe.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2867 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2007-10-16Multiple flashrom fixes:Uwe Hermann
- Install binary in /usr/sbin (not /usr/bin), as it's a root-only tool. - Rename manpage from flashrom.1 to flashrom.8, as section 8 contains "System administration commands (usually only for root)". - Actually install the manpage upon 'make install'. Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de> Acked-by: Stefan Reinauer <stepan@coresystems.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2866 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2007-10-16Add detection support for the Winbond W83977AF as found in theUwe Hermann
Advantech PCM-5820 board (confirmed by Erwan Velu <erwan@seanodes.com> on IRC). Trivial (and tested) patch. Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de> Acked-by: Uwe Hermann <uwe@hermann-uwe.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2865 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2007-10-16Add Gigabyte M61P-S3 SPI flash support to board_enable.cMichael van der Kolff
Signed-off-by: Michael van der Kolff <mvanderkolff@gmail.com> Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2864 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2007-10-16Convert the existing it8716f_* functions to generic_spi_* functions byCarl-Daniel Hailfinger
applying abstraction and wrapping. Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> Acked-by: Stefan Reinauer <stepan@coresystems.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2863 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2007-10-16Add resource size and resource granularity reporting to device_util.c.Carl-Daniel Hailfinger
Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> Acked-by: Uwe Hermann <uwe@hermann-uwe.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2862 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2007-10-16Fix the detection for the Winbond W83697SF. Unfortunately the revisionUwe Hermann
has a slightly different format than that of the W83697UF/UG so we have to hack around it a bit. This patch has been verified to work on real hardware by Idwer Vollering <idwer_v@hotmail.com> on IRC (thanks!). Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de> Acked-by: Ronald G. Minnich <rminnich@gmail.com> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2861 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2007-10-16Dump support for the Winbond W83977TF.Idwer Vollering
Signed-off-by: Idwer Vollering <idwer_v@hotmail.com> Acked-by: Uwe Hermann <uwe@hermann-uwe.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2860 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2007-10-16Completely rip out / replace the ASUS P2B code (which wasn't really working),Uwe Hermann
replacing it with a minimal, but working, framework which will be expanded. Drop a bunch of useless and duplicated files, add missing license headers. I'm self-acking it this time, the diff is a huge unreadable mess and the old code is broken anyway... This code is tested to build fine, and can boot a Linux kernel up to a login-prompt via FILO (IDE). This is verified on actual hardware. Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de> Acked-by: Uwe Hermann <uwe@hermann-uwe.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2859 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2007-10-15(forgot to add spi.c)Carl-Daniel Hailfinger
Move SPI code out of board_enable.c where it started its life. The SPI chip finding and SPI chip accessor code is moved as well. This can be split later if we feel like it. The non-use of svn cp is intentional because the only history we'd have to preserve are a few commits which were early prototypes of chip identification code. For those who intend to look at that history, they can look at board_enable.c revision 2853. Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> Acked-by: Stefan Reinauer <stepan@coresystems.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2858 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2007-10-15Move SPI code out of board_enable.c where it started its life. The SPICarl-Daniel Hailfinger
chip finding and SPI chip accessor code is moved as well. This can be split later if we feel like it. The non-use of svn cp is intentional because the only history we'd have to preserve are a few commits which were early prototypes of chip identification code. For those who intend to look at that history, they can look at board_enable.c revision 2853. Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> Acked-by: Stefan Reinauer <stepan@coresystems.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2857 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2007-10-15This patch adds support for the Mobile Intel Celeron CPU (Micro-FC-BGA)Joseph Smith
Signed-off-by: Joseph Smith <joe@smittys.pointclark.net> Acked-by: Corey Osgood <corey.osgood@gmail.com> Acked-by: Stefan Reinauer <stepan@coresystems.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2856 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2007-10-15Fix stupid thinko in the Winbond detection code which prevented someUwe Hermann
of the Winbond chips from being detected (trivial fix). This is verified on real hardware and works fine now. Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de> Acked-by: Uwe Hermann <uwe@hermann-uwe.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2855 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2007-10-14Add dump support for the NSC PC8374L (trivial).Uwe Hermann
Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de> Acked-by: Uwe Hermann <uwe@hermann-uwe.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2854 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2007-10-14Fix the resource end in amdk8/northbridge.c.Rudolf Marek
Without this bugfix, the resource for the PCI/ISA video memory at 0xa0000 - 0xbffff is too big, i.e. it goes up to 0xcffff instead of just 0xbffff as it should. Here's the diff from two runs of the tool from http://www.linuxbios.org/pipermail/linuxbios/2007-June/022449.html on the MSI MS-7260 (K9N Neo), with and without the bugfix. After applying, the resource size is correct again. --- dumpres_lb_pci_vgacard_without_resfix.txt +++ dumpres_lb_pci_vgacard_with_resfix.txt @@ -11,7 +11,7 @@ MMIO map: #2 0x0000000000 - 0x000000ffff Access: / Dstnode:0 DstLink 0 MMIO map: #3 0x0000000000 - 0x000000ffff Access: / Dstnode:0 DstLink 0 MMIO map: #4 0x0000000000 - 0x000000ffff Access: / Dstnode:0 DstLink 0 -MMIO map: #5 0x00000a0000 - 0x00000cffff Access: R/W Dstnode:0 DstLink 0 +MMIO map: #5 0x00000a0000 - 0x00000bffff Access: R/W Dstnode:0 DstLink 0 MMIO map: #6 0x00fc000000 - 0x00fd1fffff Access: R/W Dstnode:0 DstLink 0 MMIO map: #7 0x00fd200000 - 0x00fd1fffff Access: R/W Dstnode:0 DstLink 0 MMIO map: #0 0x000000 - 0x003fff Access: R/W ISA VGA Dstnode:0 DstLink 0 Signed-off-by: Rudolf Marek <r.marek@assembler.cz> Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> Acked-by: Uwe Hermann <uwe@hermann-uwe.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2853 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2007-10-13Set the superiotool version number from svn at build time.Ulf Jordan
Signed-off-by: Ulf Jordan <jordan@chalmers.se> Acked-by: Uwe Hermann <uwe@hermann-uwe.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2852 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2007-10-13Dump support for the SMSC LPC47N227.Stefan Reinauer
Signed-off-by: Stefan Reinauer <stepan@coresystems.de> Acked-by: Uwe Hermann <uwe@hermann-uwe.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2851 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2007-10-12Changes to flashrom to support the K8N-NEO3, first tested at Google on GSOC ↵Ronald G. Minnich
day :-) Also minor changes to remove tab-space combinations where possible. Signed-off-by: Ronald G. Minnich <rminnich@gmail.com> Signed-off-by: David Hendricks <david.hendricks@gmail.com> Acked-by: Stefan Reinauer <stepan@coresystems.de> Index: jedec.c =================================================================== --- jedec.c (revision 2847) +++ jedec.c (working copy) @@ -281,7 +281,7 @@ // dumb check if erase was successful. for (i = 0; i < total_size; i++) { if (bios[i] != (uint8_t) 0xff) { - printf("ERASE FAILED\n"); + printf("ERASE FAILED @%d, val %02x\n", i, bios[i]); return -1; } } Index: board_enable.c =================================================================== --- board_enable.c (revision 2847) +++ board_enable.c (working copy) @@ -153,7 +153,8 @@ return 1; } /* Start IO, 33MHz, readcnt input bytes, writecnt output bytes. Note: - We can't use writecnt directly, but have to use a strange encoding */ + * We can't use writecnt directly, but have to use a strange encoding + */ outb((0x5 << 4) | ((readcnt & 0x3) << 2) | (writeenc), port); do { busy = inb(port) & 0x80; @@ -202,43 +203,39 @@ /* * Helper functions for many Winbond Super I/Os of the W836xx range. */ -#define W836_INDEX 0x2E -#define W836_DATA 0x2F - /* Enter extended functions */ -static void w836xx_ext_enter(void) +static void w836xx_ext_enter(uint16_t port) { - outb(0x87, W836_INDEX); - outb(0x87, W836_INDEX); + outb(0x87, port); + outb(0x87, port); } /* Leave extended functions */ -static void w836xx_ext_leave(void) +static void w836xx_ext_leave(uint16_t port) { - outb(0xAA, W836_INDEX); + outb(0xAA, port); } /* General functions for reading/writing Winbond Super I/Os. */ -static unsigned char wbsio_read(unsigned char index) +static unsigned char wbsio_read(uint16_t index, uint8_t reg) { - outb(index, W836_INDEX); - return inb(W836_DATA); + outb(reg, index); + return inb(index+1); } -static void wbsio_write(unsigned char index, unsigned char data) +static void wbsio_write(uint16_t index, uint8_t reg, uint8_t data) { - outb(index, W836_INDEX); - outb(data, W836_DATA); + outb(reg, index); + outb(data, index+1); } -static void wbsio_mask(unsigned char index, unsigned char data, - unsigned char mask) +static void wbsio_mask(uint16_t index, uint8_t reg, uint8_t data, uint8_t mask) { - unsigned char tmp; + uint8_t tmp; - outb(index, W836_INDEX); - tmp = inb(W836_DATA) & ~mask; - outb(tmp | (data & mask), W836_DATA); + outb(reg, index); + tmp = inb(index+1) & ~mask; + outb(tmp | (data & mask), index+1); } /** @@ -248,37 +245,80 @@ * - Agami Aruma * - IWILL DK8-HTX */ -static int w83627hf_gpio24_raise(const char *name) +static int w83627hf_gpio24_raise(uint16_t index, const char *name) { - w836xx_ext_enter(); + w836xx_ext_enter(index); /* Is this the w83627hf? */ - if (wbsio_read(0x20) != 0x52) { /* SIO device ID register */ + if (wbsio_read(index, 0x20) != 0x52) { /* Super I/O device ID register */ fprintf(stderr, "\nERROR: %s: W83627HF: Wrong ID: 0x%02X.\n", - name, wbsio_read(0x20)); - w836xx_ext_leave(); + name, wbsio_read(index, 0x20)); + w836xx_ext_leave(index); return -1; } /* PIN89S: WDTO/GP24 multiplex -> GPIO24 */ - wbsio_mask(0x2B, 0x10, 0x10); + wbsio_mask(index, 0x2B, 0x10, 0x10); - wbsio_write(0x07, 0x08); /* Select logical device 8: GPIO port 2 */ + wbsio_write(index, 0x07, 0x08); /* Select logical device 8: GPIO port 2 */ - wbsio_mask(0x30, 0x01, 0x01); /* Activate logical device. */ + wbsio_mask(index, 0x30, 0x01, 0x01); /* Activate logical device. */ - wbsio_mask(0xF0, 0x00, 0x10); /* GPIO24 -> output */ + wbsio_mask(index, 0xF0, 0x00, 0x10); /* GPIO24 -> output */ - wbsio_mask(0xF2, 0x00, 0x10); /* Clear GPIO24 inversion */ + wbsio_mask(index, 0xF2, 0x00, 0x10); /* Clear GPIO24 inversion */ - wbsio_mask(0xF1, 0x10, 0x10); /* Raise GPIO24 */ + wbsio_mask(index, 0xF1, 0x10, 0x10); /* Raise GPIO24 */ - w836xx_ext_leave(); + w836xx_ext_leave(index); return 0; } +static int w83627hf_gpio24_raise_2e(const char *name) +{ + return w83627hf_gpio24_raise(0x2d, name); +} + /** + * Winbond W83627THF: GPIO 4, bit 4 + * + * Suited for: + * - MSI K8N-NEO3 + */ +static int w83627thf_gpio4_4_raise(uint16_t index, const char *name) +{ + w836xx_ext_enter(index); + /* Is this the w83627thf? */ + if (wbsio_read(index, 0x20) != 0x82) { /* Super I/O device ID register */ + fprintf(stderr, "\nERROR: %s: W83627THF: Wrong ID: 0x%02X.\n", + name, wbsio_read(index, 0x20)); + w836xx_ext_leave(index); + return -1; + } + + /* PINxxxxS: GPIO4/bit 4 multiplex -> GPIOXXX */ + + wbsio_write(index, 0x07, 0x09); /* Select logical device 9: GPIO port 4 */ + + wbsio_mask(index, 0x30, 0x02, 0x02); /* Activate logical device. */ + + wbsio_mask(index, 0xF4, 0x00, 0x10); /* GPIO4 bit 4 -> output */ + + wbsio_mask(index, 0xF6, 0x00, 0x10); /* Clear GPIO4 bit 4 inversion */ + + wbsio_mask(index, 0xF5, 0x10, 0x10); /* Raise GPIO4 bit 4 */ + + w836xx_ext_leave(index); + + return 0; +} + +static int w83627thf_gpio4_4_raise_4e(const char *name) +{ + return w83627thf_gpio4_4_raise(0x4E, name); +} +/** * Suited for VIAs EPIA M and MII, and maybe other CLE266 based EPIAs. * * We don't need to do this when using LinuxBIOS, GPIO15 is never lowered there. @@ -335,12 +375,12 @@ pci_write_byte(dev, 0x59, val); /* Raise ROM MEMW# line on Winbond w83697 SuperIO */ - w836xx_ext_enter(); + w836xx_ext_enter(0x2E); - if (!(wbsio_read(0x24) & 0x02)) /* flash rom enabled? */ - wbsio_mask(0x24, 0x08, 0x08); /* enable MEMW# */ + if (!(wbsio_read(0x2E, 0x24) & 0x02)) /* flash rom enabled? */ + wbsio_mask(0x2E, 0x24, 0x08, 0x08); /* enable MEMW# */ - w836xx_ext_leave(); + w836xx_ext_leave(0x2E); return 0; } @@ -487,9 +527,11 @@ {0x10de, 0x0360, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, "gigabyte", "m57sli", "GIGABYTE GA-M57SLI", it87xx_probe_serial_flash}, {0x1022, 0x7468, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, - "iwill", "dk8_htx", "IWILL DK8-HTX", w83627hf_gpio24_raise}, + "iwill", "dk8_htx", "IWILL DK8-HTX", w83627hf_gpio24_raise_2e}, + {0x10de, 0x005e, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, + "msi", "k8n-neo3", "MSI K8N Neo3", w83627thf_gpio4_4_raise_4e}, {0x1022, 0x746B, 0x1022, 0x36C0, 0x0000, 0x0000, 0x0000, 0x0000, - "AGAMI", "ARUMA", "agami Aruma", w83627hf_gpio24_raise}, + "AGAMI", "ARUMA", "agami Aruma", w83627hf_gpio24_raise_2e}, {0x1106, 0x3177, 0x1106, 0xAA01, 0x1106, 0x3123, 0x1106, 0xAA01, NULL, NULL, "VIA EPIA M/MII/...", board_via_epia_m}, {0x1106, 0x3177, 0x1043, 0x80A1, 0x1106, 0x3205, 0x1043, 0x8118, @@ -509,8 +551,8 @@ * Match boards on LinuxBIOS table gathered vendor and part name. * Require main PCI IDs to match too as extra safety. */ -static struct board_pciid_enable *board_match_linuxbios_name(char *vendor, - char *part) +static struct board_pciid_enable *board_match_linuxbios_name(char *vendor, + char *part) { struct board_pciid_enable *board = board_pciid_enables; @@ -525,10 +567,11 @@ continue; if (board->second_vendor && - !pci_dev_find(board->second_vendor, board->second_device)) + !pci_dev_find(board->second_vendor, board->second_device)) continue; return board; } + printf("NOT FOUND %s:%s\n", vendor, part); return NULL; } @@ -545,20 +588,20 @@ continue; if (!pci_card_find(board->first_vendor, board->first_device, - board->first_card_vendor, - board->first_card_device)) + board->first_card_vendor, + board->first_card_device)) continue; if (board->second_vendor) { if (board->second_card_vendor) { if (!pci_card_find(board->second_vendor, - board->second_device, - board->second_card_vendor, - board->second_card_device)) + board->second_device, + board->second_card_vendor, + board->second_card_device)) continue; } else { if (!pci_dev_find(board->second_vendor, - board->second_device)) + board->second_device)) continue; } } @@ -582,7 +625,7 @@ if (board) { printf("Found board \"%s\": Enabling flash write... ", - board->name); + board->name); ret = board->enable(board->name); if (ret) git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2850 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2007-10-11Superiotool manpage/documentation improvements (trivial).Uwe Hermann
Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de> Acked-by: Uwe Hermann <uwe@hermann-uwe.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2849 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2007-10-11Set the default video memory to 0 MB for all GX1 boards which don't yetUwe Hermann
use that feature in order to not waste RAM. Also, add missing CONFIG_VIDEO_MB for the eaglelion/5bcm, which should fix the build for that board. Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de> Acked-by: Uwe Hermann <uwe@hermann-uwe.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2848 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2007-10-10Revert my last cleanup patch.Uwe Hermann
Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de> Acked-by: Uwe Hermann <uwe@hermann-uwe.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2847 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2007-10-10Cosmetic changes to make the flashrom output more consistent (trivial).Uwe Hermann
Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de> Acked-by: Uwe Hermann <uwe@hermann-uwe.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2846 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2007-10-10This patch adds the CONFIG_VIDEO_MB option to boards thatCorey Osgood
currently don't have it but need it to compile with the new Geode GX1 VGA support. This sets the size at 4MB, which was the size previously defined in the VGA code. Signed-off-by: Corey Osgood <corey.osgod@gmail.com> Acked-by: Uwe Hermann <uwe@hermann-uwe.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2845 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2007-10-09Minor cosmetic changes (trivial).Uwe Hermann
Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de> Acked-by: Uwe Hermann <uwe@hermann-uwe.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2844 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
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