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2007-09-21Add support for the MSI MS-7260 (K9N Neo) mainboard.Uwe Hermann
Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de> Acked-by: Ward Vandewege <ward@gnu.org> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2797 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2007-09-21Add register dump capability for ITE IT8718F (trivial).Uwe Hermann
Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de> Acked-by: Uwe Hermann <uwe@hermann-uwe.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2796 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2007-09-20Add -D / --dump-readable option which prints the Super I/O registerUwe Hermann
contents in human-readable form (e.g. "COM1 enabled" etc.) instead of the hex-table format from -d / --dump. Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de> Acked-by: Uwe Hermann <uwe@hermann-uwe.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2795 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2007-09-20Decouple the ITE code from fintek.c, it doesn't belong there.Uwe Hermann
Add common 'enter configuration mode' function for most Winbond/Fintek/ITE chips which use the 0x87 0x87 sequence for that reason. Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de> Acked-by: Uwe Hermann <uwe@hermann-uwe.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2794 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2007-09-20Fix up and generalize the ITE IT8708F code. It was only working out ofUwe Hermann
pure luck (and broken code elsewhere). Needs some more fixing. Add more LDN descriptions to various Super I/Os. Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de> Acked-by: Uwe Hermann <uwe@hermann-uwe.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2793 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2007-09-20The s2891 ships with a 1MB rom chip. The targets/tyan/s2891/Config.lb file ↵Ward Vandewege
assumes a 1MB rom chip. Hence the default position for the VGA bios should also assume a 1MB rom chip, instead of a 512KB chip. Signed-off-by: Ward Vandewege <ward@gnu.org> Acked-by: Uwe Hermann <uwe@hermann-uwe.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2792 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2007-09-20Superiotool: Add dump support to the Winbond W83697HF/F.Uwe Hermann
Minor coding style changes and code simplifications. Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de> Acked-by: Uwe Hermann <uwe@hermann-uwe.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2791 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2007-09-19Implement usage for --help and put the same information into the README, too.Uwe Hermann
Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de> Acked-by: Uwe Hermann <uwe@hermann-uwe.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2790 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2007-09-19Add support for the Winbond W83697HF/F and W83627EHF/EF/EHG/EG.Uwe Hermann
Various minor fixes and improvements (trivial). Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de> Acked-by: Uwe Hermann <uwe@hermann-uwe.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2789 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2007-09-19Further code simplifications and improvements.Uwe Hermann
Add command line option handling code. The following options are defined at the moment: -d|--dump Dump Super I/O registers. -V|--verbose Verbose mode. -v|--version Show the superiotool version. -h|--help Show a short help text. Per default (no options) we just probe for a Super I/O and print its vendor, name, ID, version, and config port. Example: $ ./superiotool Found SMSC FDC37N769 Super I/O (id=0x28, rev=0x01) at port=0x03f0 $ ./superiotool -d Found SMSC FDC37N769 Super I/O (id=0x28, rev=0x01) at port=0x03f0 idx 00 01 02 03 04 05 06 07 08 09 0a 0b 0c 0d 0e 0f 10 11 12 13 14 15 16 17 18 19 1a 1b 1c 1d 1e 1f 20 21 22 23 24 25 26 27 28 29 2a 2b 2c 2d 2e 2f val 20 90 80 f4 00 00 ff 00 00 00 40 00 0e 28 01 00 00 00 00 00 02 00 01 03 00 00 00 00 00 00 80 00 00 00 00 00 00 ba 00 00 03 00 00 23 03 03 00 00 def 28 9c 88 70 00 00 ff 00 00 00 00 00 02 28 NA 00 00 80 RR RR NA NA NA 03 RR RR RR RR RR RR 80 00 3c RR RR 00 00 00 00 00 00 00 RR 00 00 03 00 00 $ ./superiotool -s ./superiotool: invalid option -- s $ ./superiotool -h Usage: superiotool [-d] [-V] [-v] [-h] $ ./superiotool -v superiotool 0.1 Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de> Acked-by: Uwe Hermann <uwe@hermann-uwe.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2788 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2007-09-19Add support for a precompressed LZMA payload (trivial).Ward Vandewege
Signed-off-by: Ward Vandewege <ward@gnu.org> Acked-by: Ronald G. Minnich <rminnich@gmail.com> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2787 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2007-09-19Sorry, I mixed up two patches. Reverting this change.Ward Vandewege
Signed-off-by: Ward Vandewege <ward@gnu.org> Acked-by: Ward Vandewege <ward@gnu.org> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2786 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2007-09-19Split out enter_conf_mode_*()/exit_conf_mode_() functions, we'll soon needUwe Hermann
them. Reduce code duplication a bit by improved 'no dump available' handling. Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de> Acked-by: Uwe Hermann <uwe@hermann-uwe.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2785 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2007-09-19Add support for a precompressed LZMA payload (trivial).Ward Vandewege
Signed-off-by: Ward Vandewege <ward@gnu.org> Acked-by: Ronald G. Minnich <rminnich@gmail.com> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2784 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2007-09-19Use uint16_t and friends where appropriate (trivial).Uwe Hermann
Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de> Acked-by: Uwe Hermann <uwe@hermann-uwe.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2783 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2007-09-18Make the code a bit more generic (trivial). Different Super I/OsUwe Hermann
use different config ports. Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de> Acked-by: Uwe Hermann <uwe@hermann-uwe.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2782 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2007-09-18Superiotool: Add support for the SMSC FDC37N769.Uwe Hermann
Here's what a register dump looks like on my test system: No Super I/O chip found at 0x002e No Super I/O chip found at 0x004e No Super I/O chip found at 0x002e No Super I/O chip found at 0x004e No Super I/O chip found at 0x002e No Super I/O chip found at 0x004e Super I/O found at 0x03f0: id=0x28, rev=0x01 SMSC FDC37N769 idx 00 01 02 03 04 05 06 07 08 09 0a 0b 0c 0d 0e 0f 10 11 12 13 14 15 16 17 18 19 1a 1b 1c 1d 1e 1f 20 21 22 23 24 25 26 27 28 29 2a 2b 2c 2d 2e 2f val 20 90 80 f4 00 00 ff 00 00 00 40 00 0e 28 01 00 00 00 00 00 02 00 01 03 00 00 00 00 00 00 80 00 00 00 00 00 00 ba 00 00 03 00 00 23 03 03 00 00 def 28 9c 88 70 00 00 ff 00 00 00 00 00 02 28 NA 00 00 80 RR RR NA NA NA 03 RR RR RR RR RR RR 80 00 3c RR RR 00 00 00 00 00 00 00 RR 00 00 03 00 00 Probing 0x0370, failed (0xff), data returns 0xff I'm self-acking this as it's pretty simple stuff, but please let me know if anything could be improved here, or if you think this is not trivial enough to warrant self-acking. Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de> Acked-by: Uwe Hermann <uwe@hermann-uwe.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2781 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2007-09-18Add a README for superiotool (trivial).Uwe Hermann
Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de> Acked-by: Uwe Hermann <uwe@hermann-uwe.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2780 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2007-09-16Split out a dump_superio() function from ite.c, and make it slightly moreUwe Hermann
generic, so that we can use it for other Super I/Os, too. Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de> Acked-by: Uwe Hermann <uwe@hermann-uwe.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2779 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2007-09-16Make 'struct superio_registers' globally available, pretty muchUwe Hermann
all Super I/Os can (and should!) use this (trivial). Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de> Acked-by: Uwe Hermann <uwe@hermann-uwe.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2778 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2007-09-16Split up superiotool.c into multiple source files, one per vendor.Uwe Hermann
As there will be lots more supported Super I/Os soon, the file is really getting way too big... Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de> Acked-by: Uwe Hermann <uwe@hermann-uwe.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2777 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2007-09-14More range for HT_CHAIN_UNITID_BASE and HT_CHAIN_END_UNITID_BASE.Yinghai Lu
For example: in C51/MCP55 or C51/MCP51 Will allow 1. C51 at 0x10 to 0x14, and MCP at 0 to 4 2. C51 at 1 to 4, and MCP at 7 to 0x0a The reason is c51/mcp51/mcp55 reported unitid is 0x0f (far beyond it needed), and will prevent us from putting them on bus 0. Typical values for c51/mcp55 or c51/mcp51: HT_CHAIN_UNITID_BASE = 0x10 # for C51 HT_CHAIN_END_UNITID_BASE = 0 # for mcp If only have mcp with c51, HT_CHAIN_UNITID_BASE = 0 # for MCP #HT_CHAIN_END_UNITID_BASE = 0 # default value 0x20 Signed-off-by: Yinghai Lu <yinghai.lu@amd.com> Acked-by: Stefan Reinauer <stepan@coresystems.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2776 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2007-09-14This is a full rewrite of all the CS5530/CS5530A code. The previous code wasUwe Hermann
mostly undocumented, had a broken coding style, contained lots of dead code and had several other problems, e.g. it enabled write access to the ROM (why?), it unconditionally enabled primary/secondary IDE (which should have a config option) and that even _twice_ (which is um... wrong). The new code - has 'ide0_enable' and 'ide1_enable' config options (which actually work) to enable/disable the primary/secondary IDE interface in Config.lb. - Does _not_ enable write access to the ROM (or is there some good reason to do that? If so, it should at least have a config option). - Contains a bit more documentation. - Uses readable (and documented) #defines instead of hardcoded magic values. - aaand... it actually compiles ;-) Yep, that's right. The previous code wouldn't even build, as it hadn't been fully ported from v1 (still used v1 functions which are simply not available in v2). Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de> Acked-by: Ronald G. Minnich <rminnich@gmail.com> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2775 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2007-09-13I still don't understand a word, but I tried to improve the documentation. ↵Stefan Reinauer
(trivial) Please fix this if you can. Signed-off-by: Stefan Reinauer <stepan@coresystems.de> Acked-by: Stefan Reinauer <stepan@coresystems.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2774 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2007-09-13Fix abuild run of the MSI MS-6178 (trivial).Uwe Hermann
Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de> Acked-by: Uwe Hermann <uwe@hermann-uwe.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2773 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2007-09-13Add a common/global failover.c file which can be used by allUwe Hermann
(or at least most) mainboards. This should put and end to copy-paste'ing the same file again and again for every mainboard. Fix the build for the MSI MS-6178 target (wrong location of the common failover.c file). Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de> Acked-by: Corey Osgood <corey.osgood@gmail.com> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2772 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2007-09-12Add initial support for the Intel 810 based board MSI MS-6178.Uwe Hermann
Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de> Acked-by: Corey Osgood <corey.osgood@gmail.com> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2771 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2007-09-11Change out/in combinations to pci_read/write_byte inAlex Beregszaszi
sis630 chipset enable. Signed-off-by: Alex Beregszaszi <alex@rtfs.hu> Acked-by: Uwe Hermann <uwe@hermann-uwe.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2770 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2007-09-09Remove useless 'extern' keywords (trivial).Uwe Hermann
Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de> Acked-by: Uwe Hermann <uwe@hermann-uwe.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2769 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2007-09-09Add '(C)' where it's missing (for consistency reasons).Uwe Hermann
Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de> Acked-by: Uwe Hermann <uwe@hermann-uwe.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2768 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2007-09-09Add missing license header to udelay.c.Uwe Hermann
I'm self-ack'ing this, as the origin of the code in udelay.c (and thus the license and copyright owner) is pretty clear. The code which is now in udelay.c was split out from flash_rom.c in r1428, and flash_rom.c, in turn, has been around since the beginning and had a 'Copyright 2000 Silicon Integrated System Corporation' line as well as the usual GPLv2-or-later license header. Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de> Acked-by: Uwe Hermann <uwe@hermann-uwe.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2767 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2007-09-09Partial changes and fixup.Ronald G. Minnich
Removed reset.c and added copyright headers. Remove debug.c. It is not used and should not be here. Signed-off-by: Ronald G. Minnich <rminnich@gmail.com> Acked-by: Uwe Hermann <uwe@hermann-uwe.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2766 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2007-09-08Welcome to PC Engines and the ALIX 1C!Ronald G. Minnich
This is a geode LX board. There are timing settings that are not right yet, we are still trying to get our board to boot Linux :-) Signed-off-by: Ronald G. Minnich <rminnich@gmail.com> Acked-by: Stefan Reinauer <stepan@coresystems.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2765 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2007-09-08Add a copy of the GPL in the flashrom repository as it's an independentUwe Hermann
project (being packaged by distros, among other things). Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de> Acked-by: Uwe Hermann <uwe@hermann-uwe.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2764 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2007-09-01Small consistency fixes (trivial).Uwe Hermann
Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de> Acked-by: Uwe Hermann <uwe@hermann-uwe.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2762 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2007-09-01Various coding style and whitespace fixes (trivial).Uwe Hermann
Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de> Acked-by: Uwe Hermann <uwe@hermann-uwe.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2761 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2007-09-01Add ITE IT8716F support to probe_superio. This helps especiallyCarl-Daniel Hailfinger
GA-M57SLI board owners who wish to debug remaining problems or handle SPI flash of newer board versions. Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> Acked-by: Uwe Hermann <uwe@hermann-uwe.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2760 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2007-09-01Rename probe_superio.c to superiotool.c.Uwe Hermann
Flesh out Makefile with all the usual stuff, e.g. install targets etc. Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de> Acked-by: Uwe Hermann <uwe@hermann-uwe.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2759 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2007-09-01Move probe_superio into the global util/ directory.Uwe Hermann
Rename it to superiotool while we're at it. Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de> Acked-by: Uwe Hermann <uwe@hermann-uwe.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2758 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2007-09-01Add support for the ITE IT8708F.Uwe Hermann
Here's a dump from my test system which has an IT8708F: No SuperI/O chip found at 0x002e probing 0x002e, failed (0x87), data returns 0x87 SuperI/O found at 0x2e: id=0x8708, chipver=0x0 ITE IT8708 idx 07 20 21 22 23 24 25 26 27 28 29 2a 2e 2f val 02 87 08 00 00 00 00 00 03 01 01 00 00 00 def NA 87 08 00 00 NA 3f 00 ff ff ff ff 00 00 switching to LDN 0x0 idx 30 60 61 70 74 f0 f1 val 01 03 f0 06 02 00 80 def 00 03 f0 06 02 00 00 switching to LDN 0x1 idx 30 60 61 70 f0 val 01 03 f8 04 00 def 00 03 f8 04 00 switching to LDN 0x2 idx 30 60 61 70 f0 f1 f2 f3 val 01 02 f8 03 00 50 01 7f def 00 02 f8 03 00 50 00 7f switching to LDN 0x3 idx 30 60 61 62 63 64 65 70 74 f0 val 01 03 78 07 78 00 80 07 03 0b def 00 03 78 07 78 00 80 07 03 03 switching to LDN 0x4 idx e0 e1 e2 e3 e4 e5 e6 e7 f0 f1 f2 f3 f4 f5 f6 val 80 61 00 00 00 00 00 00 80 00 30 00 80 00 de def NA NA 00 00 00 00 00 00 00 00 00 00 00 NA NA switching to LDN 0x5 idx 30 60 61 62 63 70 71 f0 val 01 00 60 00 64 01 02 0c def 01 00 60 00 64 01 02 00 switching to LDN 0x6 idx 30 70 71 f0 val 01 0c 02 00 def 00 0c 02 00 switching to LDN 0x7 idx 70 b0 b1 b2 b3 b4 b5 b8 b9 ba bb bc bd c0 c1 c2 c3 c4 c5 c8 c9 ca cb cc cd d0 d1 d2 d3 d4 d5 d6 d7 d8 d9 da db dc f0 f1 f2 f3 f4 f5 f6 f7 f8 f9 fa fb fc val 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 03 01 01 00 00 00 03 00 01 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ff 7f 20 51 00 0e 00 00 00 00 00 00 00 def 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 NA NA NA NA NA NA 00 00 00 00 00 00 00 00 00 00 00 NA 00 switching to LDN 0x8 idx 30 60 61 val 00 02 01 def 00 02 01 switching to LDN 0x9 idx 30 60 61 70 f0 val 00 03 10 0b 06 def 00 03 10 0b 00 switching to LDN 0xa idx 30 60 61 70 f0 val 00 03 00 0a 40 def 00 03 00 0a 00 No SuperI/O chip found at 0x004e No SuperIO chip found at 0x004e No SuperIO chip found at 0x004e Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de> Acked-by: Uwe Hermann <uwe@hermann-uwe.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2757 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2007-08-31Fix typo for the ITE IT8712F (trivial).Uwe Hermann
The default for LDN 5 (keyboard), index 0xF0 is not 0x00 but rather 0x08 as per datasheet. Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de> Acked-by: Uwe Hermann <uwe@hermann-uwe.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2755 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2007-08-30Add support for the Athlon64 x2 5000+ CPU.Torsten Duwe
A trivial one-liner for the CPU I happen to have. The sales docs said it's a "G1 revision", but the Rev F code works just fine. Signed-off-by: Torsten Duwe <duwe@lst.de> Acked-by: Uwe Hermann <uwe@hermann-uwe.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2754 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2007-08-30Add support for the Winbond W29EE011.Markus Boas
Signed-off-by: Markus Boas <ryven@ryven.de> Acked-by: Uwe Hermann <uwe@hermann-uwe.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2753 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2007-08-30Add support for the Winbond W29C040P.Markus Boas
Signed-off-by: Markus Boas <ryven@ryven.de> Acked-by: Uwe Hermann <uwe@hermann-uwe.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2752 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2007-08-29Change all flashrom license headers to use our standard format.Uwe Hermann
No changes in content of the files. Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de> Acked-by: Uwe Hermann <uwe@hermann-uwe.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2751 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2007-08-28This patch makes ITE Super I/O probing/dumping a little bit more generic,Carl-Daniel Hailfinger
fixes minor coding style issues and prepares the table for supporting more chips of the ITE IT87xx Super I/O family. Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> Acked-by: Uwe Hermann <uwe@hermann-uwe.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2750 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2007-08-27This patch rewrites probe_superio almost completely.Carl-Daniel Hailfinger
Common code sequences have been factored out, the code has been made more generic, has better handling of corner cases and is actually much shorter. It also adds probing for almost all recent (since 1999) ITE Super I/O chips to probe_superio. I did verify against all ITE datasheets (including those not available any more) that the probing was non-destructive. For the ITE IT8712F, the complete configuration is dumped and as comparison the default value from the data sheet is printed. More information can be extracted easily, however this needs loads of datasheet surfing. This code has been tested extensively, dumping for other ITE chips will follow as a separate patch. Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> Acked-by: Stefan Reinauer <stepan@coresystems.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2749 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2007-08-23Cosmetic fixes (trivial).Uwe Hermann
Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de> Acked-by: Uwe Hermann <uwe@hermann-uwe.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2748 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2007-08-23Drop duplicated code (copies of plain JEDEC functions).Uwe Hermann
Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de> Acked-by: Stefan Reinauer <stepan@coresystems.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2747 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2007-08-23Drop a bunch of useless header files, merge them into flash.h.Uwe Hermann
Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de> Acked-by: Stefan Reinauer <stepan@coresystems.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2746 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
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