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AgeCommit message (Expand)Author
2020-06-15arch/x86: Remove NO_FIXED_XIP_ROM_SIZEKyösti Mälkki
2020-06-15arch/x86: Remove XIP_ROM_SIZEKyösti Mälkki
2020-06-15util/cbfstool: Add option --pow2pageKyösti Mälkki
2020-06-153rdparty/amd_blobs: advance submodule pointerFelix Held
2020-06-14soc/amd/picasso/graphics: implement map_oprom_vendev_revMartin Roth
2020-06-14drivers/intel/fsp2_0: Add FSP 2.2 specific supportSubrata Banik
2020-06-14mb/google/volteer: Disable HDA PCI device when AUDIO=NONEDuncan Laurie
2020-06-14mb/google/zork: Drop OEM_BIN configsFurquan Shaikh
2020-06-14mb/google/zork: Enable ELOG optionsFurquan Shaikh
2020-06-14southbridge/intel/common: Introduce ASL2.0 syntaxAlexey Buyanov
2020-06-14soc/amd/picasso/aoac: Add wait_for_aoac_enabledRaul E Rangel
2020-06-14soc/amd/picasso/aoac: Set the Target Device State when powering onRaul E Rangel
2020-06-14soc/amd/picasso: Move aoac functions to new fileRaul E Rangel
2020-06-14soc/amd/picasso: Explicitly disable legacy UARTRaul E Rangel
2020-06-14console, PCI: Remove EARLY_PCI_BRIDGE support in verstageKyösti Mälkki
2020-06-14mb/google/volteer/var/terrador: Update dq/dqs mappingsDavid Wu
2020-06-14soc/intel/xeon_sp/cpx: select CACHE_MRC_SETTINGSJonathan Zhang
2020-06-14soc/amd/picasso: correct MCFG ACPI tableAaron Durbin
2020-06-14mb/google/volteer: Enable thermal sensor 4 in DPTF for volteerDeepika Punyamurtula
2020-06-14dptf: Introduce new paradigm for configuring DPTF parametersTim Wawrzynczak
2020-06-14soc/intel/tigerlake: enable CPU_INTEL_COMMONAlex Levin
2020-06-14soc/amd/picasso: Increase SMM_RESERVED_SIZEMarshall Dawson
2020-06-14mb/google/puff: add MST and LSPCON details to devicetreeShiyu Sun
2020-06-14soc/intel/cannonlake/acpi: Capitalize hex number to unify with SkylakePaul Menzel
2020-06-14soc/intel/xeon_sp/cpx: configure FSP-M UPD parametersJonathan Zhang
2020-06-14soc/intel/xeon_sp/cpx: add cpu entries in ssdtJonathan Zhang
2020-06-14soc/intel/xeon_sp/cpx: fix MADT ACPI tableJonathan Zhang
2020-06-14soc/intel/xeon_sp/cpx: add IIO stack resources to DSDTJonathan Zhang
2020-06-14soc/intel/xeon_sp/cpx: add NUMA ACPI tablesJonathan Zhang
2020-06-14util/board_status: Also check remotely retrieved coreboot console logPaul Menzel
2020-06-14mb/google/hatch/vr/puff: Set up PL2 and PsysPL2Tim Chen
2020-06-14mb/google/fizz: add variant chipset display initJeff Chase
2020-06-14util/intelmetool: Add support for Intel Cannon Point LP HECI ControllerMatt DeVillier
2020-06-14mb/google/dedede: Enable early EC software syncMeera Ravindranath
2020-06-14mb/google/dedede: Select Recovery Cache Kconfig optionMeera Ravindranath
2020-06-14sb/intel/i82801ix: Fix SPDX license headerKyösti Mälkki
2020-06-14mb/google/hatch: Switch USB2 port1 and port3 on NoibatEdward O'Callaghan
2020-06-14soc/amd/picasso/acpi: Add a wrapper method WAL1 for calling ALIB function 1Furquan Shaikh
2020-06-14ec/google/chromeec: Call \PNOT () on initializing AC power stateFurquan Shaikh
2020-06-13cpu/intel/car: Use symbols for CAR MTRR setupKyösti Mälkki
2020-06-13arch/x86: Add symbols for CAR MTRRs in linker scriptKyösti Mälkki
2020-06-13soc/intel/common: Introduce ASL2.0 syntaxAlexey Buyanov
2020-06-13arch/x86: Include id.ld unconditionally in memlayout.ldFurquan Shaikh
2020-06-13arch/x86: Drop early_ram.ldFurquan Shaikh
2020-06-13soc/amd/picasso: Place early stages and data buffers at the bottom of DRAMFurquan Shaikh
2020-06-13util/cbfstool: Drop IS_TOP_ALIGNED_ADDRESS() check in cbfstool_convert_fspFurquan Shaikh
2020-06-13cbmem_id: Add CBMEM ID for early DRAM usageFurquan Shaikh
2020-06-13soc/amd/picasso: Add custom memlayout.ld fileFurquan Shaikh
2020-06-13treewide: Add Kconfig variable MEMLAYOUT_LD_FILEFurquan Shaikh
2020-06-13mb/google/zork: update DRAM SPD table for vilbozPaul Ma